1.9.6

Update

• split_read_write method is added: The method splits an AXI port into two independent AXI ports for read and write respectively.

Test environment

macOS 11.2.3

• Python 3.9.4
• Icarus Verilog 11.0
• Pyverilog 1.3.0
• numpy: 1.20.2

Ubuntu 20.04.2

• Python 3.7.7
• Icarus Verilog 10.3
• Pyverilog 1.3.0
• numpy: 1.20.2