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fix(rvc): NEMU should also properly handle illegal instruction cases in non-dynamic library mode #810

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merged 1 commit into from
Feb 17, 2025

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@Gao-Zeyu Gao-Zeyu merged commit 1ff3030 into OpenXiangShan:master Feb 17, 2025
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Tang-Haojin pushed a commit to OpenXiangShan/XiangShan that referenced this pull request Mar 4, 2025
* NEMU commit: b2e8c05ec83f2b2b15b891e361c9a84218436872
* NEMU configs:
    * riscv64-xs-ref_defconfig
    * riscv64-dual-xs-ref_defconfig
    * riscv64-xs-ref-debug_defconfig
    * riscv64-dual-xs-ref-debug_defconfig
* Including:
    * fix(rvc): NEMU should also properly handle illegal instruction cases in non-dynamic library mode (OpenXiangShan/NEMU#810)
    * submodule(ready-to-run): Bump spike ref in ready-to-run
    * feat(simpoint): Support writting basic block info (first pc and second pc) into simpoint_bbv file (OpenXiangShan/NEMU#817)
    * fix(csr): add prefetch control by spfctl
    * fix(csr): remove useless custom csr
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3 participants