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feat(Smcsrind): implement Smcsrind extension and enable it. #741

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feat(Smcsrind): implement Smcsrind extension and enable it. #741

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1 change: 1 addition & 0 deletions configs/riscv64-dual-xs-ref_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,7 @@ CONFIG_RV_SVPBMT=y
CONFIG_RV_SSNPM=y
CONFIG_RV_SMNPM=y
CONFIG_RV_SMMPM=y
CONFIG_RV_SMCSRIND=y
CONFIG_RV_SSCOFPMF=y
CONFIG_RV_SHLCOFIDELEG=y
CONFIG_RV_SMSTATEEN=y
Expand Down
1 change: 1 addition & 0 deletions configs/riscv64-xs-cpt_defconfig
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Expand Up @@ -64,6 +64,7 @@ CONFIG_RV_SMNPM=y
CONFIG_RV_SMMPM=y
CONFIG_RV_SVNAPOT=y
CONFIG_RV_SVPBMT=y
CONFIG_RV_SMCSRIND=y
CONFIG_RV_SSCOFPMF=y
CONFIG_RV_SHLCOFIDELEG=y
CONFIG_RV_SMSTATEEN=y
Expand Down
1 change: 1 addition & 0 deletions configs/riscv64-xs-diff-spike_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,7 @@ CONFIG_RV_SVPBMT=y
CONFIG_RV_SSNPM=y
CONFIG_RV_SMNPM=y
CONFIG_RV_SMMPM=y
# CONFIG_RV_SMCSRIND is not set
CONFIG_RV_SSCOFPMF=y
# CONFIG_RV_SHLCOFIDELEG is not set
# CONFIG_RV_SMSTATEEN is not set
Expand Down
1 change: 1 addition & 0 deletions configs/riscv64-xs-ref_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,7 @@ CONFIG_RV_SVPBMT=y
CONFIG_RV_SSNPM=y
CONFIG_RV_SMNPM=y
CONFIG_RV_SMMPM=y
CONFIG_RV_SMCSRIND=y
CONFIG_RV_SSCOFPMF=y
CONFIG_RV_SHLCOFIDELEG=y
CONFIG_RV_SMSTATEEN=y
Expand Down
1 change: 1 addition & 0 deletions configs/riscv64-xs_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,7 @@ CONFIG_RV_SVPBMT=y
CONFIG_RV_SSNPM=y
CONFIG_RV_SMNPM=y
CONFIG_RV_SMMPM=y
CONFIG_RV_SMCSRIND=y
CONFIG_RV_SSCOFPMF=y
CONFIG_RV_SHLCOFIDELEG=y
CONFIG_RV_SMSTATEEN=y
Expand Down
4 changes: 4 additions & 0 deletions src/isa/riscv64/Kconfig
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Expand Up @@ -423,6 +423,10 @@ config RV_SMMPM
help
A machine-level extension that provides pointer masking for M-mode.

config RV_SMCSRIND
bool "RISC-V Smcsrind/Sscsrind Indirect CSR Access, Version 1.0"
default n

config RV_SVNAPOT
bool "RISC-V Svnapot extension for NAPOT Translation Contiguity (beta)"
default n
Expand Down
12 changes: 4 additions & 8 deletions src/isa/riscv64/init.c
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Expand Up @@ -23,6 +23,9 @@ void init_csr();
#ifdef CONFIG_RV_SDTRIG
void init_trigger();
#endif // CONFIG_RV_SDTRIG
#ifdef CONFIG_RV_SMSTATEEN
void init_smstateen();
#endif // CONFIG_RV_SMSTATEEN
#ifdef CONFIG_RV_IMSIC
void init_iprio();
#endif
Expand Down Expand Up @@ -201,14 +204,7 @@ void init_isa() {
init_iprio();
#endif

#define MSTATEEN0_RESET 0xdc00000000000001ULL
#define HSTATEEN0_RESET 0xdc00000000000001ULL
#define SSTATEEN0_RESET 0x0000000000000001ULL
#ifdef CONFIG_RV_SMSTATEEN
mstateen0->val = MSTATEEN0_RESET;
hstateen0->val = HSTATEEN0_RESET;
sstateen0->val = SSTATEEN0_RESET;
#endif // CONFIG_RV_SMSTATEEN
IFDEF(CONFIG_RV_SMSTATEEN, init_smstateen());

init_riscv_timer();

Expand Down
171 changes: 146 additions & 25 deletions src/isa/riscv64/local-include/csr.h
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Expand Up @@ -197,13 +197,26 @@


/** Supervisor Advanced Interrupt Architecture Registers **/
#ifdef CONFIG_RV_IMSIC
#if defined(CONFIG_RV_IMSIC) && defined(CONFIG_RV_SMCSRIND)
#define CSRS_S_AIA(f) \
f(stopei , 0x15C) f(stopi , 0xDB0)
#elif defined(CONFIG_RV_IMSIC)
#define CSRS_S_AIA(f) \
f(siselect , 0x150) f(sireg , 0x151) \
f(stopei , 0x15C) f(stopi , 0xDB0)
#else
#define CSRS_S_AIA(f)
#endif // CONFIG_RV_IMSIC
#endif

/** Supervisor Indirect Access CSRs **/
#ifdef CONFIG_RV_SMCSRIND
#define CSRS_S_CSRIND(f) \
f(siselect , 0x150) \
f(sireg , 0x151) f(sireg2 , 0x152) f(sireg3 , 0x153) \
f(sireg4 , 0x155) f(sireg5 , 0x156) f(sireg6 , 0x157)
#else
#define CSRS_S_CSRIND(f)
#endif // CONFIG_RV_SMCSRIND

/** ALL **/
#define CSRS_S(f) \
Expand All @@ -216,6 +229,7 @@
CSRS_S_STATE_ENABLE(f) \
CSRS_S_SCOFPMF(f) \
CSRS_S_AIA(f) \
CSRS_S_CSRIND(f) \
CSRS_S_SSTC(f) \
CSRS_S_CUSTOM_1(f)

Expand Down Expand Up @@ -267,15 +281,30 @@
f(vstval , 0x243) f(vsip , 0x244) f(vsatp , 0x280)

/** Hypervisor and VS AIA Registers **/
#ifdef CONFIG_RV_IMSIC
#if defined(CONFIG_RV_IMSIC) && defined(CONFIG_RV_SMCSRIND)
#define CSRS_H_VS_AIA(f) \
f(vstopei , 0x25C) f(hvien , 0x608) \
f(hvictl , 0x609) f(hviprio1 , 0x646) \
f(hviprio2 , 0x647) f(vstopi , 0xEB0)
#elif defined(CONFIG_RV_IMSIC)
#define CSRS_H_VS_AIA(f) \
f(vsiselect , 0x250) f(vsireg , 0x251) \
f(vstopei , 0x25C) f(hvien , 0x608) \
f(hvictl , 0x609) f(hviprio1 , 0x646) \
f(hviprio2 , 0x647) f(vstopi , 0xEB0)
#else
#define CSRS_H_VS_AIA(f)
#endif // CONFIG_RV_IMSIC
#endif

/** VS Indirect Access CSRs **/
#ifdef CONFIG_RV_SMCSRIND
#define CSRS_VS_CSRIND(f) \
f(vsiselect , 0x250) \
f(vsireg , 0x251) f(vsireg2 , 0x252) f(vsireg3 , 0x253) \
f(vsireg4 , 0x255) f(vsireg5 , 0x256) f(vsireg6 , 0x257)
#else
#define CSRS_VS_CSRIND(f)
#endif // CONFIG_RV_SMCSRIND

#ifdef CONFIG_RV_SSTC
#define CSRS_VS_SSTC(f) \
Expand All @@ -294,6 +323,7 @@
CSRS_H_CONUTER_TIMER_VIRTUALIZATION(f) \
CSRS_H_STATE_ENABLE(f) \
CSRS_H_VS_AIA(f) \
CSRS_VS_CSRIND(f) \
CSRS_VS_SSTC(f) \
CSRS_VS(f)

Expand Down Expand Up @@ -450,14 +480,28 @@
CSRS_M_MBMC(f)

/** Machine AIA Registers **/
#ifdef CONFIG_RV_IMSIC
#if defined(CONFIG_RV_IMSIC) && defined(CONFIG_RV_SMCSRIND)
#define CSRS_M_AIA(f) \
f(mvien , 0x308) f(mvip , 0x309) \
f(miselect , 0x350) f(mireg , 0x351) \
f(mtopei , 0x35C) f(mtopi , 0xFB0)
f(mvien , 0x308) f(mvip , 0x309) \
f(mtopei , 0x35C) f(mtopi , 0xFB0)
#elif defined(CONFIG_RV_IMSIC)
#define CSRS_M_AIA(f) \
f(mvien , 0x308) f(mvip , 0x309) \
f(miselect , 0x350) f(mireg , 0x351) \
f(mtopei , 0x35C) f(mtopi , 0xFB0)
#else
#define CSRS_M_AIA(f)
#endif // CONFIG_RV_IMSIC
#endif

/** Machine Indirect Access CSRs **/
#ifdef CONFIG_RV_SMCSRIND
#define CSRS_M_CSRIND(f) \
f(miselect , 0x350) \
f(mireg , 0x351) f(mireg2 , 0x352) f(mireg3 , 0x353) \
f(mireg4 , 0x355) f(mireg5 , 0x356) f(mireg6 , 0x357)
#else
#define CSRS_M_CSRIND(f)
#endif // CONFIG_RV_SMCSRIND

/** Machine Non-Maskable Interrupt Handling **/
#ifdef CONFIG_RV_SMRNMI
Expand All @@ -481,6 +525,7 @@
CSRS_M_COUNTER_SETUP(f) \
CSRS_M_DEBUG_TRACE(f) \
CSRS_M_AIA(f) \
CSRS_M_CSRIND(f) \
CSRS_M_SMRNMI(f) \
CSRS_DEBUG_MODE(f) \
CSRS_M_CUSTOM(f)
Expand Down Expand Up @@ -888,13 +933,15 @@ CSR_STRUCT_START(mflushpwr)
uint64_t l2flushed : 1; // [1] L2 flush is done and L2 exit coherency
CSR_STRUCT_END(mflushpwr)

#ifdef CONFIG_RV_IMSIC
#if defined(CONFIG_RV_IMSIC) && !defined(CONFIG_RV_SMCSRIND)
CSR_STRUCT_START(miselect)
CSR_STRUCT_END(miselect)

CSR_STRUCT_START(mireg)
CSR_STRUCT_END(mireg)
#endif

#ifdef CONFIG_RV_IMSIC
CSR_STRUCT_START(mtopei)
uint64_t iprio : 11; // [10: 0]
uint64_t pad : 5; // [15:11]
Expand Down Expand Up @@ -928,6 +975,30 @@ CSR_STRUCT_START(mvip)
CSR_STRUCT_END(mvip)
#endif // CONFIG_RV_IMSIC

/** Machine Indirect Access CSRs **/
#ifdef CONFIG_RV_SMCSRIND
CSR_STRUCT_START(miselect)
CSR_STRUCT_END(miselect)

CSR_STRUCT_START(mireg)
CSR_STRUCT_END(mireg)

CSR_STRUCT_START(mireg2)
CSR_STRUCT_END(mireg2)

CSR_STRUCT_START(mireg3)
CSR_STRUCT_END(mireg3)

CSR_STRUCT_START(mireg4)
CSR_STRUCT_END(mireg4)

CSR_STRUCT_START(mireg5)
CSR_STRUCT_END(mireg5)

CSR_STRUCT_START(mireg6)
CSR_STRUCT_END(mireg6)
#endif // CONFIG_RV_SMCSRIND

/* Supervisor-level CSR */

CSR_STRUCT_START(sstatus)
Expand Down Expand Up @@ -1106,13 +1177,15 @@ CSR_STRUCT_END(stimecmp)
#endif

/** Supervisor Advanced Interrupt Architecture CSRs **/
#ifdef CONFIG_RV_IMSIC
#if defined(CONFIG_RV_IMSIC) && !defined(CONFIG_RV_SMCSRIND)
CSR_STRUCT_START(siselect)
CSR_STRUCT_END(siselect)

CSR_STRUCT_START(sireg)
CSR_STRUCT_END(sireg)
#endif

#ifdef CONFIG_RV_IMSIC
CSR_STRUCT_START(stopei)
uint64_t iid : 11; // [10: 0]
uint64_t pad : 5; // [15:11]
Expand All @@ -1126,6 +1199,30 @@ CSR_STRUCT_START(stopi)
CSR_STRUCT_END(stopi)
#endif // CONFIG_RV_IMSIC

/** Supervisor Indirect Access CSRs **/
#ifdef CONFIG_RV_SMCSRIND
CSR_STRUCT_START(siselect)
CSR_STRUCT_END(siselect)

CSR_STRUCT_START(sireg)
CSR_STRUCT_END(sireg)

CSR_STRUCT_START(sireg2)
CSR_STRUCT_END(sireg2)

CSR_STRUCT_START(sireg3)
CSR_STRUCT_END(sireg3)

CSR_STRUCT_START(sireg4)
CSR_STRUCT_END(sireg4)

CSR_STRUCT_START(sireg5)
CSR_STRUCT_END(sireg5)

CSR_STRUCT_START(sireg6)
CSR_STRUCT_END(sireg6)
#endif // CONFIG_RV_SMCSRIND

/* hypervisor and Virtual Supervisor CSR */

#ifdef CONFIG_RVH
Expand Down Expand Up @@ -1319,6 +1416,14 @@ CSR_STRUCT_END(vsatp)
#endif // CONFIG_RVH

/** Hypervisor and VS AIA CSRs **/
#if defined(CONFIG_RV_IMSIC) && !defined(CONFIG_RV_SMCSRIND)
CSR_STRUCT_START(vsiselect)
CSR_STRUCT_END(vsiselect)

CSR_STRUCT_START(vsireg)
CSR_STRUCT_END(vsireg)
#endif

#ifdef CONFIG_RV_IMSIC
CSR_STRUCT_START(hvien)
uint64_t pad : 13;
Expand Down Expand Up @@ -1351,12 +1456,6 @@ CSR_STRUCT_END(hviprio1)
CSR_STRUCT_START(hviprio2)
CSR_STRUCT_END(hviprio2)

CSR_STRUCT_START(vsiselect)
CSR_STRUCT_END(vsiselect)

CSR_STRUCT_START(vsireg)
CSR_STRUCT_END(vsireg)

CSR_STRUCT_START(vstopei)
uint64_t iid : 11; // [10: 0]
uint64_t pad : 5; // [15:11]
Expand All @@ -1370,6 +1469,30 @@ CSR_STRUCT_START(vstopi)
CSR_STRUCT_END(vstopi)
#endif // CONFIG_RV_IMSIC

/** VS Indirect Access CSRs **/
#ifdef CONFIG_RV_SMCSRIND
CSR_STRUCT_START(vsiselect)
CSR_STRUCT_END(vsiselect)

CSR_STRUCT_START(vsireg)
CSR_STRUCT_END(vsireg)

CSR_STRUCT_START(vsireg2)
CSR_STRUCT_END(vsireg2)

CSR_STRUCT_START(vsireg3)
CSR_STRUCT_END(vsireg3)

CSR_STRUCT_START(vsireg4)
CSR_STRUCT_END(vsireg4)

CSR_STRUCT_START(vsireg5)
CSR_STRUCT_END(vsireg5)

CSR_STRUCT_START(vsireg6)
CSR_STRUCT_END(vsireg6)
#endif // CONFIG_RV_SMCSRIND

/* Unprivileged CSR */

/** Unprivileged Floating-Point CSRs **/
Expand Down Expand Up @@ -1598,14 +1721,12 @@ MAP(CSRS, CSRS_DECL)
#define SSTATUS_RMASK (SSTATUS_BASE | MUXDEF(CONFIG_RV_SMRNMI, SSTATUS_SDT, 0))

/** AIA **/
#ifdef CONFIG_RV_IMSIC
#define ISELECT_2F_MASK 0x2F
#define ISELECT_3F_MASK 0x3F
#define ISELECT_6F_MASK 0x6F
#define ISELECT_7F_MASK 0x7F
#define ISELECT_MAX_MASK 0xFF
#define VSISELECT_MAX_MASK 0x1FF
#endif // CONFIG_RV_IMSIC
#define ISELECT_2F_MASK 0x2F
#define ISELECT_3F_MASK 0x3F
#define ISELECT_6F_MASK 0x6F
#define ISELECT_7F_MASK 0x7F
#define ISELECT_MAX_MASK 0xFF
#define VSISELECT_MAX_MASK 0x1FF

/** Double Trap**/
#ifdef CONFIG_RV_SMRNMI
Expand Down
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