Marvell eHSM crypto engine support to offload AES crypto algorithms #7556
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anilreddy3
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Add marvell eHSM crypto engine support to offload AES crypto algorithms for CN10K and CN20K platforms, this will be a base for authenc and cipher drvcrypt driver operations. Signed-off-by: Anil Kumar Reddy <[email protected]>
This driver registers the eHSM crypto engine with-in the drvcrypto framework, and uses eHSM service to deliver authentication functionality of AES-GCM. Signed-off-by: Anil Kumar Reddy <[email protected]>
This driver registers the eHSM crypto aes engine with-in the cipher framework, and uses eHSM service to deliver cipher operations. Signed-off-by: Anil Kumar Reddy <[email protected]>
Have combined CN10K and CN20K directories, Thanks for the suggestion. |
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I don't think my changes are responsible for CI failures. I see in other PR that issue is fixed. May i know how to retry the CI again, thanks. |
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@anilreddy3 CI is currently unstable ("no space left on device" errors in various jobs). The QEMUv8 Hafnium job is supposedly fixed in master by 3d0429a but now we're seeing more of this failure in the other QEMUv8 jobs (1..4/4). I am investigating. |
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@etienne-lms @jenswi-linaro Have addressed your review comments and pushed updated patches. Please review further and provide your comments if any, thanks. |
| cmd.opcode = BCM_AES_ZEROIZE; | ||
| estat = ehsm_command(handle, &cmd); | ||
| if (estat != STATUS_SUCCESS) | ||
| return (enum sec_return)estat; |
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This is a bit strange. We have enum ehsm_status and enum sec_return, where, from what I understand, the value 0 SEC_NO_ERROR or STATUS_SUCCESS are compatible and mean the same thing. What is this cast supposed to do?
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enum ehsm_status contains the error types which truly returned by the eHSM hardware block, whereas enum sec_return contains the other error types related crypto engine like we may return SEC_INVALID_MAILBOX based on the mailbox number check in ehsm_initialize(), and SEC_INVALID_PARAMETER and soon and so forth.
And finally we are combining enum ehsm_status with enum sec_return by typecasting and returning this sec_return error type to upper driver layer.
@jforissier Seems CI reelated issues are fixed, could you please retry CI for this PR, thanks. |
Please rebase onto master and force-push. Simply restarting the jobs would not get the updated CI script. Thanks! |
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Marvell eHSM crypto engine support to offload AES crypto algorithms