Ensure all bindings have GIL released #768
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leofang
added
enhancement
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/ok to test 67a8837 |
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/ok to test e21dee5 |
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/ok to test 79d2461 |
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/ok to test 5eb1fee |
kkraus14
approved these changes
Jul 21, 2025
| @@ -243,7 +243,7 @@ Enable device code optimization. When specified along with ``-G``\ , enables lim | |||
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| - ``--Ofast-compile={0|min|mid|max}``\ (``-Ofc``\ ) | |||
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| Specify level to prefer device code compilation speed, where 'max' focuses only on the fastest compilation speed, 'mid' balances compile time and runtime, 'min' has a more minimal impact on both, and 0 (default) is normal compilation | |||
| Specify the fast-compile level for device code, which controls the tradeoff between compilation speed and runtime performance by disabling certain optimizations at varying levels. | |||
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Pinged offline regarding this being incorrectly generated
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Discussed offline, this change is coming from CUDA 12.9.1 header (which mismatches with the public NVRTC 12.9.1 documentation). The description looks incomplete because of #770, which is a generic issue to all APIs that have inner lists in the docs, not unique to just this option.
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Description
closes #624
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