Re-organize VIXL's doc/ and mention AArch32

Updates the top README to reflect changes done with the support for
AArch32. Take the opportunity to re-organize our documentation files
structure and seperate `aarch32` and `aarch64` at the top-level.

Additionally, the title now mentions this is the
development version of VIXL.

doc/
├── aarch32
│   ├── design
│   │   ├── code-generation-aarch32.md
│   │   └── literal-pool-aarch32.md
│   └── getting-started-aarch32.md
├── aarch64
│   ├── getting-started-aarch64.md
│   ├── supported-instructions-aarch64.md
│   └── topics
│       ├── extending-the-disassembler.md
│       ├── index.md
│       └── ycm.md
└── changelog.md

Change-Id: Ida9547a1de30886a112360e4b2beafa7cb0ac7b9

README.md

@@ -1,5 +1,5 @@
-VIXL: AArch64 Runtime Code Generation Library Version 1.13
-==========================================================
+VIXL: ARMv8 Runtime Code Generation Library, Development Version
+================================================================
 
 Contents:
 
@@ -15,15 +15,15 @@ Overview
 
 VIXL contains three components.
 
- 1. A programmatic **assembler** to generate A64 code at runtime. The assembler
-    abstracts some of the constraints of the A64 ISA; for example, most
+ 1. Programmatic **assemblers** to generate A64, A32 or T32 code at runtime. The
+    assemblers abstract some of the constraints of each ISA; for example, most
     instructions support any immediate.
- 2. A **disassembler** that can print any instruction emitted by the assembler.
- 3. A **simulator** that can simulate any instruction emitted by the assembler.
-    The simulator allows generated code to be run on another architecture
-    without the need for a full ISA model.
+ 2. **Disassemblers** that can print any instruction emitted by the assemblers.
+ 3. A **simulator** that can simulate any instruction emitted by the A64
+    assembler. The simulator allows generated code to be run on another
+    architecture without the need for a full ISA model.
 
-The VIXL git repository can be found [on GitHub][vixl].
+The VIXL git repository can be found [on 'https://git.linaro.org'][vixl].
 
 Changes from previous versions of VIXL can be found in the
 [Changelog](doc/changelog.md).
@@ -59,8 +59,8 @@ software is also required:
 Refer to the 'Usage' section for details.
 
 
-Known Limitations
-=================
+Known Limitations for AArch64 code generation
+=============================================
 
 VIXL was developed for JavaScript engines so a number of features from A64 were
 deemed unnecessary:
@@ -72,7 +72,7 @@ deemed unnecessary:
 
 The VIXL simulator supports only those instructions that the VIXL assembler can
 generate. The `doc` directory contains a
-[list of supported instructions](doc/supported-instructions.md).
+[list of supported A64 instructions](doc/aarch64/supported-instructions-aarch64.md).
 
 The VIXL simulator was developed to run on 64-bit amd64 platforms. Whilst it
 builds and mostly works for 32-bit x86 platforms, there are a number of
@@ -162,24 +162,25 @@ fail.
 Getting Started
 ---------------
 
-A short introduction to using VIXL can be found [here](doc/getting-started.md).
-Example source code is provided in the [examples](examples) directory. You can
-build all the examples with `scons examples` from the root directory, or use
+We have separate guides for introducing VIXL, depending on what architecture you
+are targeting. A guide for working with AArch32 can be found
+[here][getting-started-aarch32], while the AArch64 guide is
+[here][getting-started-aarch64]. Example source code is provided in the
+[examples](examples) directory. You can build examples with either `scons
+aarch32_examples` or `scons aarch64_examples` from the root directory, or use
 `scons --help` to get a detailed list of available build targets.
 
-Using VIXL
-----------
-
-In addition to [getting started](doc/getting-started.md) and the
-[examples](examples), you can find documentation and guides on various topics
-that may be helpful [here](doc/topics/index.md).
-
-
 
 
 
 [cpplint]: http://google-styleguide.googlecode.com/svn/trunk/cpplint/cpplint.py
            "Google's cpplint.py script."
 
-[vixl]: https://github.com/armvixl/vixl
-        "The VIXL repository on GitHub."
+[vixl]: https://git.linaro.org/arm/vixl.git
+        "The VIXL repository at 'https://git.linaro.org'."
+
+[getting-started-aarch32]: doc/aarch32/getting-started-aarch32.md
+                           "Introduction to VIXL for AArch32."
+
+[getting-started-aarch64]: doc/aarch64/getting-started-aarch64.md
+                           "Introduction to VIXL for AArch64."

doc/getting-started-aarch64.md → doc/aarch64/getting-started-aarch64.md

@@ -197,3 +197,11 @@ The example shown in this tutorial is very simple, because the goal was to
 demonstrate the basics of the VIXL framework. There are more complex code
 examples in the VIXL `examples/aarch64` directory showing more features of both the
 macro assembler and the ARMv8 architecture.
+
+
+Extras
+------
+
+In addition to this document and the [examples](/examples/aarch64), you can find
+documentation and guides on various topics that may be helpful
+[here](/doc/aarch64/topics/index.md).

doc/topics/aarch64/index.md → doc/aarch64/topics/index.md

@@ -2,7 +2,7 @@ We will try to add documentation for topics that may be useful to VIXL users. If
 you think of any topic that may be useful and is not listed here, please contact
 us at <[email protected]>.
 
-You can also have a look at the ['getting started' page](../getting-started.md).
+You can also have a look at the ['getting started' page](../getting-started-aarch64.md).
 
 * [Extending and customizing the disassembler](extending-the-disassembler.md)
 * [Using VIM YouCompleteMe with VIXL](ycm.md)

examples/aarch32/examples.h

@@ -93,7 +93,7 @@ void GenerateAbs(MacroAssembler* masm);
 // Generate a function with the following prototype:
 //   uint32_t demo_function(uint32_t x)
 //
-// This is the example used in doc/getting-started-a32.txt
+// This is the example used in doc/getting-started-aarch32.md
 void GenerateDemo(MacroAssembler* masm);
 
 #endif  // VIXL_EXAMPLE_EXAMPLES_H_