- 🔧 Focus: VLSI Design (RTL-to-GDS), ASICs, FPGA development & implementation
- ⚙️ AI Hardware Acceleration: Systolic arrays, TPUs, custom processors & neural accelerators
- 🧪 Research & Innovation: Patent-worthy architectures, practical research-driven projects
- 🛠️ Hardware Design: PCB design & layout, analog/digital circuit implementation, signal integrity
- 🧰 Hands-on Engineering: Verilog/SystemVerilog controllers, HW-SW co-design, embedded systems
- 🤖 Project MANAS @ MIT: SNA (Sensing and Automation) subsystem hardware development
- ⚡ Board-Level Design: Multi-layer PCB routing, component selection, DFM optimization
- ⚡ Systolic arrays/TPU-like designs for acceleration
- 🧩 RTL design, verification, synthesis, timing, and PnR exposure
- 🔭 Open to research collaborations and patentable ideas
 VLSI & AI Hardware Collaborative research |
 Academic Papers IEEE/ACM conferences and journal submissions |
 Patent Development Novel hardware architectures and methodologies |
 Partnerships Internships, consulting, and industry projects |
Let's Build the Future of Hardware Together
Contact for Collaboration: 📧 [email protected] • 🔗 LinkedIn • 🌐 Portfolio