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Merge remote-tracking branch 'decomp/main' into decomp_merge
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@Yanis002
Yanis002 committed Jan 6, 2025
2 parents 62057cf + c6cceea commit aa3503b
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Showing 9 changed files with 415 additions and 68 deletions.
14 changes: 8 additions & 6 deletions Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -283,6 +283,9 @@ CPP_DEFINES += -DOOT_REGION=REGION_$(REGION)
CPP_DEFINES += -DBUILD_CREATOR="\"$(BUILD_CREATOR)\"" -DBUILD_DATE="\"$(BUILD_DATE)\"" -DBUILD_TIME="\"$(BUILD_TIME)\""
CPP_DEFINES += -DLIBULTRA_VERSION=LIBULTRA_VERSION_$(LIBULTRA_VERSION)
CPP_DEFINES += -DLIBULTRA_PATCH=$(LIBULTRA_PATCH)
ifeq ($(PLATFORM),IQUE)
CPP_DEFINES += -DBBPLAYER
endif

ifeq ($(VERSION),hackeroot-mq)
CPP_DEFINES += -DENABLE_HACKEROOT=1
Expand Down Expand Up @@ -356,6 +359,9 @@ OBJDUMP := $(MIPS_BINUTILS_PREFIX)objdump
NM := $(MIPS_BINUTILS_PREFIX)nm
STRIP := $(MIPS_BINUTILS_PREFIX)strip

# Command to patch certain object files after they are built
POSTPROCESS_OBJ := @:

# The default iconv on macOS has some differences from GNU iconv, so we use the Homebrew version instead
ifeq ($(UNAME_S),Darwin)
ICONV := $(shell brew --prefix)/opt/libiconv/bin/iconv
Expand Down Expand Up @@ -639,11 +645,6 @@ ifeq ($(TARGET),iso)
endif
endif

SET_ABI_BIT = @:
$(BUILD_DIR)/src/libultra/os/exceptasm.o: SET_ABI_BIT = $(PYTHON) tools/set_o32abi_bit.py $@
$(BUILD_DIR)/src/libultra/libc/ll.o: SET_ABI_BIT = $(PYTHON) tools/set_o32abi_bit.py $@
$(BUILD_DIR)/src/libultra/libc/llcvt.o: SET_ABI_BIT = $(PYTHON) tools/set_o32abi_bit.py $@

#### Main Targets ###

all: rom
Expand Down Expand Up @@ -883,6 +884,7 @@ $(BUILD_DIR)/src/makerom/ipl3.o: $(EXTRACTED_DIR)/incbin/ipl3
$(BUILD_DIR)/src/%.o: src/%.s
$(call print,Compiling:,$<,$@)
$(V)$(CCAS) -c $(CCASFLAGS) $(MIPS_VERSION) $(ASOPTFLAGS) -o $@ $<
$(V)$(POSTPROCESS_OBJ) $@
$(V)$(OBJDUMP_CMD)

# Incremental link to move z_message and z_game_over data into rodata
Expand Down Expand Up @@ -914,7 +916,7 @@ ifneq ($(RUN_CC_CHECK),0)
endif
$(call print,Compiling:,$<,$@)
$(V)$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $<
$(V)$(SET_ABI_BIT)
$(V)$(POSTPROCESS_OBJ) $@
$(V)$(OBJDUMP_CMD)

$(BUILD_DIR)/src/audio/session_init.o: src/audio/session_init.c $(BUILD_DIR)/assets/audio/soundfont_sizes.h $(BUILD_DIR)/assets/audio/sequence_sizes.h
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164 changes: 164 additions & 0 deletions include/ultra64/bcp.h
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Expand Up @@ -26,4 +26,168 @@
*/
#define MI_SECURE_EXCEPTION_REG (MI_BASE_REG + 0x14)

/**
* Read:
* [25] MD (active, 1 if card is currently disconnected else 0)
* [24] Power Button (active, 1 if button is currently pressed else 0)
* [13] MD (pending interrupt)
* [12] Power Button (pending interrupt)
* [11] USB1
* [10] USB0
* [ 9] PI_ERR
* [ 8] IDE
* [ 7] AES
* [ 6] FLASH
* [ 5] DP
* [ 4] PI
* [ 3] VI
* [ 2] AI
* [ 1] SI
* [ 0] SP
*
* Write:
* [13] Clear MD Interrupt
*/
#define MI_EX_INTR_REG (MI_BASE_REG + 0x38)

/*
* MI_EX_INTR_REG: read bits
*/
#define MI_EX_INTR_SP (1 << 0)
#define MI_EX_INTR_SI (1 << 1)
#define MI_EX_INTR_AI (1 << 2)
#define MI_EX_INTR_VI (1 << 3)
#define MI_EX_INTR_PI (1 << 4)
#define MI_EX_INTR_DP (1 << 5)
#define MI_EX_INTR_FLASH (1 << 6)
#define MI_EX_INTR_AES (1 << 7)
#define MI_EX_INTR_IDE (1 << 8)
#define MI_EX_INTR_PI_ERR (1 << 9)
#define MI_EX_INTR_USB0 (1 << 10)
#define MI_EX_INTR_USB1 (1 << 11)
#define MI_EX_INTR_PWR_BTN (1 << 12)
#define MI_EX_INTR_MD (1 << 13)
#define MI_EX_INTR_PWR_BTN_PRESSED (1 << 24) /* updated in real-time, unrelated to interrupt */
#define MI_EX_INTR_CARD_NOT_PRESENT (1 << 25) /* updated in real-time, unrelated to interrupt */

#define MI_EX_INTR_ALL \
(MI_EX_INTR_FLASH | MI_EX_INTR_AES | MI_EX_INTR_IDE | MI_EX_INTR_PI_ERR | \
MI_EX_INTR_USB0 | MI_EX_INTR_USB1 | MI_EX_INTR_PWR_BTN | MI_EX_INTR_MD)

/*
* MI_EX_INTR_REG: write bits
*/
#define MI_EX_INTR_CLR_MD (1 << 13)

/**
* Write:
* [27:26] Set/Clear MD
* [25:24] Set/Clear BUTTON
* [23:22] Set/Clear USB1
* [21:20] Set/Clear USB0
* [19:18] Set/Clear PI_ERR
* [17:16] Set/Clear IDE
* [15:14] Set/Clear AES
* [13:12] Set/Clear FLASH
* [11:10] Set/Clear DP
* [ 9: 8] Set/Clear PI
* [ 7: 6] Set/Clear VI
* [ 5: 4] Set/Clear AI
* [ 3: 2] Set/Clear SI
* [ 1: 0] Set/Clear SP
*
* Read:
* [13] MD
* [12] BUTTON
* [11] USB1
* [10] USB0
* [ 9] PI_ERR
* [ 8] IDE
* [ 7] AES
* [ 6] FLASH
* [ 5] DP
* [ 4] PI
* [ 3] VI
* [ 2] AI
* [ 1] SI
* [ 0] SP
*/
#define MI_EX_INTR_MASK_REG (MI_BASE_REG + 0x3C)

/*
* MI_EX_INTR_MASK_REG: write bits
*/
#define MI_EX_INTR_MASK_CLR_SP (1 << 0) /* clear SP mask */
#define MI_EX_INTR_MASK_SET_SP (1 << 1) /* set SP mask */
#define MI_EX_INTR_MASK_CLR_SI (1 << 2) /* clear SI mask */
#define MI_EX_INTR_MASK_SET_SI (1 << 3) /* set SI mask */
#define MI_EX_INTR_MASK_CLR_AI (1 << 4) /* clear AI mask */
#define MI_EX_INTR_MASK_SET_AI (1 << 5) /* set AI mask */
#define MI_EX_INTR_MASK_CLR_VI (1 << 6) /* clear VI mask */
#define MI_EX_INTR_MASK_SET_VI (1 << 7) /* set VI mask */
#define MI_EX_INTR_MASK_CLR_PI (1 << 8) /* clear PI mask */
#define MI_EX_INTR_MASK_SET_PI (1 << 9) /* set PI mask */
#define MI_EX_INTR_MASK_CLR_DP (1 << 10) /* clear DP mask */
#define MI_EX_INTR_MASK_SET_DP (1 << 11) /* set DP mask */
#define MI_EX_INTR_MASK_CLR_FLASH (1 << 12) /* clear FLASH mask */
#define MI_EX_INTR_MASK_SET_FLASH (1 << 13) /* set FLASH mask */
#define MI_EX_INTR_MASK_CLR_AES (1 << 14) /* clear AES mask */
#define MI_EX_INTR_MASK_SET_AES (1 << 15) /* set AES mask */
#define MI_EX_INTR_MASK_CLR_IDE (1 << 16) /* clear IDE mask */
#define MI_EX_INTR_MASK_SET_IDE (1 << 17) /* set IDE mask */
#define MI_EX_INTR_MASK_CLR_PI_ERR (1 << 18) /* clear PI_ERR mask */
#define MI_EX_INTR_MASK_SET_PI_ERR (1 << 19) /* set PI_ERR mask */
#define MI_EX_INTR_MASK_CLR_USB0 (1 << 20) /* clear USB0 mask */
#define MI_EX_INTR_MASK_SET_USB0 (1 << 21) /* set USB0 mask */
#define MI_EX_INTR_MASK_CLR_USB1 (1 << 22) /* clear USB1 mask */
#define MI_EX_INTR_MASK_SET_USB1 (1 << 23) /* set USB1 mask */
#define MI_EX_INTR_MASK_CLR_PWR_BTN (1 << 24) /* clear PWR_BTN mask */
#define MI_EX_INTR_MASK_SET_PWR_BTN (1 << 25) /* set PWR_BTN mask */
#define MI_EX_INTR_MASK_CLR_MD (1 << 26) /* clear MD mask */
#define MI_EX_INTR_MASK_SET_MD (1 << 27) /* set MD mask */

/*
* MI_EX_INTR_MASK_REG: read bits
*/
#define MI_EX_INTR_MASK_SP (1 << 0) /* SP intr mask */
#define MI_EX_INTR_MASK_SI (1 << 1) /* SI intr mask */
#define MI_EX_INTR_MASK_AI (1 << 2) /* AI intr mask */
#define MI_EX_INTR_MASK_VI (1 << 3) /* VI intr mask */
#define MI_EX_INTR_MASK_PI (1 << 4) /* PI intr mask */
#define MI_EX_INTR_MASK_DP (1 << 5) /* DP intr mask */
#define MI_EX_INTR_MASK_FLASH (1 << 6) /* FLASH intr mask */
#define MI_EX_INTR_MASK_AES (1 << 7) /* AES intr mask */
#define MI_EX_INTR_MASK_IDE (1 << 8) /* IDE intr mask */
#define MI_EX_INTR_MASK_PI_ERR (1 << 9) /* PI_ERR intr mask */
#define MI_EX_INTR_MASK_USB0 (1 << 10) /* USB0 intr mask */
#define MI_EX_INTR_MASK_USB1 (1 << 11) /* USB1 intr mask */
#define MI_EX_INTR_MASK_PWR_BTN (1 << 12) /* PWR_BTN intr mask */
#define MI_EX_INTR_MASK_MD (1 << 13) /* MD intr mask */

/******************************************************************************
* Additional Parallel Interface (PI) Registers
*/

/**
* Write:
* [31] Execute command after write
* [30] Interrupt when done
* [29:24] ?
* [23:16] NAND Command
* [15] ?
* [14] Buffer Select
* [13:12] Device Select
* [11] Do Error Correction
* [10] NAND Command is Multi-Cycle
* [ 9: 0] Data Transfer Length in Bytes
*
* Writing 0 to this register clears the interrupt
*
* Read:
* [31] Busy
* [11] Single-Bit Error Corrected
* [10] Double-Bit Error Uncorrectable
*/
#define PI_NAND_CTRL_REG (PI_BASE_REG + 0x48)

#endif
10 changes: 10 additions & 0 deletions include/ultra64/message.h
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Expand Up @@ -21,6 +21,16 @@
#define OS_EVENT_FAULT 12 /* CPU fault event: used by rmon */
#define OS_EVENT_THREADSTATUS 13 /* CPU thread status: used by rmon */
#define OS_EVENT_PRENMI 14 /* Pre NMI interrupt */
#ifdef BBPLAYER
#define OS_EVENT_FLASH 23 /* NAND flash operation complete */
#define OS_EVENT_AES 24 /* AES decryption complete */
#define OS_EVENT_IDE 25 /* IDE transfer complete */
#define OS_EVENT_PI_ERR 26 /* PI Error? */
#define OS_EVENT_USB0 27 /* USB Controller 0 */
#define OS_EVENT_USB1 28 /* USB Controller 1 */
#define OS_EVENT_UNK_29 29 /* ? */
#define OS_EVENT_MD 30 /* Memory card removed */
#endif

#ifdef _LANGUAGE_C

Expand Down
7 changes: 7 additions & 0 deletions src/boot/driverominit.c
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Expand Up @@ -3,7 +3,14 @@
OSPiHandle __DriveRomHandle;

OSPiHandle* osDriveRomInit(void) {
#if PLATFORM_IQUE && defined(NON_MATCHING)
// On iQue, the compiled output of this file is patched so that the
// `!first` check is always taken. For non-matching builds, we edit the
// source code instead.
static u32 first = false;
#else
static u32 first = true;
#endif
register s32 status;
register u32 value;
register u32 prevInt;
Expand Down
2 changes: 1 addition & 1 deletion src/code/z_skelanime.c
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Expand Up @@ -849,7 +849,7 @@ AnimTask* AnimTaskQueue_NewTask(AnimTaskQueue* animTaskQueue, s32 type) {
return task;
}

#if PLATFORM_N64
#if !PLATFORM_GC
#define LINK_ANIMATION_OFFSET(addr, offset) \
(((uintptr_t)_link_animetionSegmentRomStart) + SEGMENT_OFFSET(addr) + (offset))
#else
Expand Down
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