Predicate cache alternative implementation #4292
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| @@ -1631,9 +1631,13 @@ DEF_OP(StoreMemPredicate) { | |||
| DEF_OP(LoadMemPredicate) { | |||
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I think it makes sense to introduce a new op here, or at least rename/fixup the description as appropriate
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Right ... done. To be honest, I am thinking that the work done to enable RA of predicate registers can be reverted. I see no reason to keep code in FEX that doesn't have any users and this is this was the only user of that code.
@Sonicadvance1 what do you think about reverting the predicate register RA?
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Sure, sounds reasonable to me.
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| if (FillP2) { | ||
| ptrue(ARMEmitter::SubRegSize::i16Bit, PRED_X87_SVEOPT, ARMEmitter::PredicatePattern::SVE_VL5); | ||
| } |
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you can just move this into the above if and drop the FillP2 check
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SetPreds and FillP2 are not really equivalent. We only need to fill P2 if we really need the optimization enabled. This is not true in non-SVE cabable systems or if we don't have X87 ldst instructions in the block.
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I mentioned this prior but perhaps you missed, the current behaviour is incorrect for some fills in the dispatcher as they will be emitted without it. Setting it in the above block (which is guarded by an sve check alone) is reasonable enough
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Do I understand correctly that suggest I move it into the SetPredRegs block? I have done that. I haven't dropped the FillP2 conditional. That is necessary to only generate this when strictly necessary.
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Whenever the control float leaves the block, it might clobber the predicate register so we reset the cache whenever that happens. Fixes FEX-Emu#4264
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Alternative implementation to #4274
In draft mode as it's incomplete and broken.