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| 1 | +2025-05-16 Pengxuan Zheng < [email protected]> |
| 2 | + |
| 3 | + PR target/100165 |
| 4 | + * config/aarch64/aarch64-protos.h (aarch64_output_fmov): New prototype. |
| 5 | + (aarch64_simd_valid_and_imm_fmov): Likewise. |
| 6 | + * config/aarch64/aarch64-simd.md (and<mode>3<vczle><vczbe>): Allow FMOV |
| 7 | + codegen. |
| 8 | + * config/aarch64/aarch64.cc (aarch64_simd_valid_and_imm_fmov): New. |
| 9 | + (aarch64_output_fmov): Likewise. |
| 10 | + * config/aarch64/constraints.md (Df): New constraint. |
| 11 | + * config/aarch64/predicates.md (aarch64_reg_or_and_imm): Update |
| 12 | + predicate to support FMOV codegen. |
| 13 | + |
| 14 | +2025-05-16 Pengxuan Zheng < [email protected]> |
| 15 | + |
| 16 | + PR target/100165 |
| 17 | + * config/aarch64/aarch64.cc (aarch64_evpc_and): New. |
| 18 | + (aarch64_expand_vec_perm_const_1): Call aarch64_evpc_and. |
| 19 | + * optabs.cc (vec_perm_and_mask): New. |
| 20 | + * optabs.h (vec_perm_and_mask): New prototype. |
| 21 | + |
| 22 | +2025-05-16 Pengxuan Zheng < [email protected]> |
| 23 | + |
| 24 | + * config/aarch64/aarch64.cc (aarch64_evpc_reencode): Zero initialize |
| 25 | + newd. |
| 26 | + |
| 27 | +2025-05-16 Andrew Pinski < [email protected]> |
| 28 | + |
| 29 | + * tree-ssa-forwprop.cc (forward_propagate_into_comparison): Dump |
| 30 | + when replacing statement. |
| 31 | + |
| 32 | +2025-05-16 Martin Jambor < [email protected]> |
| 33 | + |
| 34 | + |
| 35 | + * cgraph.h (symtab_node): Make member function get_uid const. |
| 36 | + * cgraphclones.cc (dump_callgraph_transformation): Dump m_uid of the |
| 37 | + call graph nodes instead of order. |
| 38 | + * cgraph.cc (cgraph_node::remove): Likewise. |
| 39 | + * ipa-cp.cc (ipcp_lattice<valtype>::print): Likewise. |
| 40 | + * ipa-sra.cc (ipa_sra_summarize_function): Likewise. |
| 41 | + * symtab.cc (symtab_node::dump_base): Likewise. |
| 42 | + |
| 43 | +2025-05-16 Ville Voutilainen < [email protected]> |
| 44 | + |
| 45 | + * doc/invoke.texi: Add to_underlying to -ffold-simple-inlines. |
| 46 | + |
| 47 | +2025-05-16 Andrew Pinski < [email protected]> |
| 48 | + |
| 49 | + PR target/118603 |
| 50 | + * config/aarch64/driver-aarch64.cc (aarch64_cpu_data): Add cast to unsigned |
| 51 | + to VARIANT of the define AARCH64_CORE. |
| 52 | + |
| 53 | +2025-05-16 Andrew Pinski < [email protected]> |
| 54 | + |
| 55 | + * config/aarch64/aarch64-protos.h (struct sve_vec_cost): Change gather_load_x32_cost |
| 56 | + and gather_load_x64_cost fields to unsigned. |
| 57 | + |
| 58 | +2025-05-16 Andrew Pinski < [email protected]> |
| 59 | + |
| 60 | + * tree-ssa-forwprop.cc (optimize_memcpy_to_memset): Add a limit on the alias walk. |
| 61 | + |
| 62 | +2025-05-16 Andrew Pinski < [email protected]> |
| 63 | + |
| 64 | + * gimple-fold.cc (optimize_memcpy_to_memset): Move to |
| 65 | + tree-ssa-forwprop.cc. |
| 66 | + (gimple_fold_builtin_memory_op): Remove call to |
| 67 | + optimize_memcpy_to_memset. |
| 68 | + (fold_stmt_1): Likewise. |
| 69 | + * tree-ssa-forwprop.cc (optimize_memcpy_to_memset): Move from |
| 70 | + gimple-fold.cc. |
| 71 | + (simplify_builtin_call): Try to optimize memcpy/memset. |
| 72 | + (pass_forwprop::execute): Try to optimize memcpy like assignment |
| 73 | + from a previous memset. |
| 74 | + |
| 75 | +2025-05-16 Richard Sandiford < [email protected]> |
| 76 | + |
| 77 | + * config/arm/arm.cc (arm_gen_load_multiple_1): Simplify use of |
| 78 | + end_sequence. |
| 79 | + (arm_gen_store_multiple_1): Likewise. |
| 80 | + * expr.cc (gen_move_insn): Likewise. |
| 81 | + * gentarget-def.cc (main): Likewise. |
| 82 | + |
| 83 | +2025-05-16 Richard Sandiford < [email protected]> |
| 84 | + |
| 85 | + * asan.cc (asan_emit_allocas_unpoison): Directly return the |
| 86 | + result of end_sequence. |
| 87 | + (hwasan_emit_untag_frame): Likewise. |
| 88 | + * config/aarch64/aarch64-speculation.cc |
| 89 | + (aarch64_speculation_clobber_sp): Likewise. |
| 90 | + (aarch64_speculation_establish_tracker): Likewise. |
| 91 | + * config/arm/arm.cc (arm_call_tls_get_addr): Likewise. |
| 92 | + * config/avr/avr-passes.cc (avr_parallel_insn_from_insns): Likewise. |
| 93 | + * config/sh/sh_treg_combine.cc |
| 94 | + (sh_treg_combine::make_not_reg_insn): Likewise. |
| 95 | + * tree-outof-ssa.cc (emit_partition_copy): Likewise. |
| 96 | + |
| 97 | +2025-05-16 Richard Sandiford < [email protected]> |
| 98 | + |
| 99 | + * asan.cc (asan_clear_shadow): Use the return value of end_sequence, |
| 100 | + rather than calling get_insns separately. |
| 101 | + (asan_emit_stack_protection, asan_emit_allocas_unpoison): Likewise. |
| 102 | + (hwasan_frame_base, hwasan_emit_untag_frame): Likewise. |
| 103 | + * auto-inc-dec.cc (attempt_change): Likewise. |
| 104 | + * avoid-store-forwarding.cc (process_store_forwarding): Likewise. |
| 105 | + * bb-reorder.cc (fix_crossing_unconditional_branches): Likewise. |
| 106 | + * builtins.cc (expand_builtin_apply_args): Likewise. |
| 107 | + (expand_builtin_return, expand_builtin_mathfn_ternary): Likewise. |
| 108 | + (expand_builtin_mathfn_3, expand_builtin_int_roundingfn): Likewise. |
| 109 | + (expand_builtin_int_roundingfn_2, expand_builtin_saveregs): Likewise. |
| 110 | + (inline_string_cmp): Likewise. |
| 111 | + * calls.cc (expand_call): Likewise. |
| 112 | + * cfgexpand.cc (expand_asm_stmt, pass_expand::execute): Likewise. |
| 113 | + * cfgloopanal.cc (init_set_costs): Likewise. |
| 114 | + * cfgrtl.cc (insert_insn_on_edge, prepend_insn_to_edge): Likewise. |
| 115 | + (rtl_lv_add_condition_to_bb): Likewise. |
| 116 | + * config/aarch64/aarch64-speculation.cc |
| 117 | + (aarch64_speculation_clobber_sp): Likewise. |
| 118 | + (aarch64_speculation_establish_tracker): Likewise. |
| 119 | + (aarch64_do_track_speculation): Likewise. |
| 120 | + * config/aarch64/aarch64.cc (aarch64_load_symref_appropriately) |
| 121 | + (aarch64_expand_vector_init, aarch64_gen_ccmp_first): Likewise. |
| 122 | + (aarch64_gen_ccmp_next, aarch64_mode_emit): Likewise. |
| 123 | + (aarch64_md_asm_adjust): Likewise. |
| 124 | + (aarch64_switch_pstate_sm_for_landing_pad): Likewise. |
| 125 | + (aarch64_switch_pstate_sm_for_jump): Likewise. |
| 126 | + (aarch64_switch_pstate_sm_for_call): Likewise. |
| 127 | + * config/alpha/alpha.cc (alpha_legitimize_address_1): Likewise. |
| 128 | + (alpha_emit_xfloating_libcall, alpha_gp_save_rtx): Likewise. |
| 129 | + * config/arc/arc.cc (hwloop_optimize): Likewise. |
| 130 | + * config/arm/aarch-common.cc (arm_md_asm_adjust): Likewise. |
| 131 | + * config/arm/arm-builtins.cc: Likewise. |
| 132 | + * config/arm/arm.cc (require_pic_register): Likewise. |
| 133 | + (arm_call_tls_get_addr, arm_gen_load_multiple_1): Likewise. |
| 134 | + (arm_gen_store_multiple_1, cmse_clear_registers): Likewise. |
| 135 | + (cmse_nonsecure_call_inline_register_clear): Likewise. |
| 136 | + (arm_attempt_dlstp_transform): Likewise. |
| 137 | + * config/avr/avr-passes.cc (bbinfo_t::optimize_one_block): Likewise. |
| 138 | + (avr_parallel_insn_from_insns): Likewise. |
| 139 | + * config/avr/avr.cc (avr_prologue_setup_frame): Likewise. |
| 140 | + (avr_expand_epilogue): Likewise. |
| 141 | + * config/bfin/bfin.cc (hwloop_optimize): Likewise. |
| 142 | + * config/c6x/c6x.cc (c6x_expand_compare): Likewise. |
| 143 | + * config/cris/cris.cc (cris_split_movdx): Likewise. |
| 144 | + * config/cris/cris.md: Likewise. |
| 145 | + * config/csky/csky.cc (csky_call_tls_get_addr): Likewise. |
| 146 | + * config/epiphany/resolve-sw-modes.cc |
| 147 | + (pass_resolve_sw_modes::execute): Likewise. |
| 148 | + * config/fr30/fr30.cc (fr30_move_double): Likewise. |
| 149 | + * config/frv/frv.cc (frv_split_scc, frv_split_cond_move): Likewise. |
| 150 | + (frv_split_minmax, frv_split_abs): Likewise. |
| 151 | + * config/frv/frv.md: Likewise. |
| 152 | + * config/gcn/gcn.cc (move_callee_saved_registers): Likewise. |
| 153 | + (gcn_expand_prologue, gcn_restore_exec, gcn_md_reorg): Likewise. |
| 154 | + * config/i386/i386-expand.cc |
| 155 | + (ix86_expand_carry_flag_compare, ix86_expand_int_movcc): Likewise. |
| 156 | + (ix86_vector_duplicate_value, expand_vec_perm_interleave2): Likewise. |
| 157 | + (expand_vec_perm_vperm2f128_vblend): Likewise. |
| 158 | + (expand_vec_perm_2perm_interleave): Likewise. |
| 159 | + (expand_vec_perm_2perm_pblendv): Likewise. |
| 160 | + (expand_vec_perm2_vperm2f128_vblend, ix86_gen_ccmp_first): Likewise. |
| 161 | + (ix86_gen_ccmp_next): Likewise. |
| 162 | + * config/i386/i386-features.cc |
| 163 | + (scalar_chain::make_vector_copies): Likewise. |
| 164 | + (scalar_chain::convert_reg, scalar_chain::convert_op): Likewise. |
| 165 | + (timode_scalar_chain::convert_insn): Likewise. |
| 166 | + * config/i386/i386.cc (ix86_init_pic_reg, ix86_va_start): Likewise. |
| 167 | + (ix86_get_drap_rtx, legitimize_tls_address): Likewise. |
| 168 | + (ix86_md_asm_adjust): Likewise. |
| 169 | + * config/ia64/ia64.cc (ia64_expand_tls_address): Likewise. |
| 170 | + (ia64_expand_compare, spill_restore_mem): Likewise. |
| 171 | + (expand_vec_perm_interleave_2): Likewise. |
| 172 | + * config/loongarch/loongarch.cc |
| 173 | + (loongarch_call_tls_get_addr): Likewise. |
| 174 | + * config/m32r/m32r.cc (gen_split_move_double): Likewise. |
| 175 | + * config/m32r/m32r.md: Likewise. |
| 176 | + * config/m68k/m68k.cc (m68k_call_tls_get_addr): Likewise. |
| 177 | + (m68k_call_m68k_read_tp, m68k_sched_md_init_global): Likewise. |
| 178 | + * config/m68k/m68k.md: Likewise. |
| 179 | + * config/microblaze/microblaze.cc |
| 180 | + (microblaze_call_tls_get_addr): Likewise. |
| 181 | + * config/mips/mips.cc (mips_call_tls_get_addr): Likewise. |
| 182 | + (mips_ls2_init_dfa_post_cycle_insn): Likewise. |
| 183 | + (mips16_split_long_branches): Likewise. |
| 184 | + * config/nvptx/nvptx.cc (nvptx_gen_shuffle): Likewise. |
| 185 | + (nvptx_gen_shared_bcast, nvptx_propagate): Likewise. |
| 186 | + (workaround_uninit_method_1, workaround_uninit_method_2): Likewise. |
| 187 | + (workaround_uninit_method_3): Likewise. |
| 188 | + * config/or1k/or1k.cc (or1k_init_pic_reg): Likewise. |
| 189 | + * config/pa/pa.cc (legitimize_tls_address): Likewise. |
| 190 | + * config/pru/pru.cc (pru_expand_fp_compare, pru_reorg_loop): Likewise. |
| 191 | + * config/riscv/riscv-shorten-memrefs.cc |
| 192 | + (pass_shorten_memrefs::transform): Likewise. |
| 193 | + * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Likewise. |
| 194 | + * config/riscv/riscv.cc (riscv_call_tls_get_addr): Likewise. |
| 195 | + (riscv_frm_emit_after_bb_end): Likewise. |
| 196 | + * config/rl78/rl78.cc (rl78_emit_libcall): Likewise. |
| 197 | + * config/rs6000/rs6000.cc (rs6000_debug_legitimize_address): Likewise. |
| 198 | + * config/s390/s390.cc (legitimize_tls_address): Likewise. |
| 199 | + (s390_two_part_insv, s390_load_got, s390_va_start): Likewise. |
| 200 | + * config/sh/sh_treg_combine.cc |
| 201 | + (sh_treg_combine::make_not_reg_insn): Likewise. |
| 202 | + * config/sparc/sparc.cc (sparc_legitimize_tls_address): Likewise. |
| 203 | + (sparc_output_mi_thunk, sparc_init_pic_reg): Likewise. |
| 204 | + * config/stormy16/stormy16.cc (xstormy16_split_cbranch): Likewise. |
| 205 | + * config/xtensa/xtensa.cc (xtensa_copy_incoming_a7): Likewise. |
| 206 | + (xtensa_expand_block_set_libcall): Likewise. |
| 207 | + (xtensa_expand_block_set_unrolled_loop): Likewise. |
| 208 | + (xtensa_expand_block_set_small_loop, xtensa_call_tls_desc): Likewise. |
| 209 | + * dse.cc (emit_inc_dec_insn_before, find_shift_sequence): Likewise. |
| 210 | + (replace_read): Likewise. |
| 211 | + * emit-rtl.cc (reorder_insns, gen_clobber, gen_use): Likewise. |
| 212 | + * except.cc (dw2_build_landing_pads, sjlj_mark_call_sites): Likewise. |
| 213 | + (sjlj_emit_function_enter, sjlj_emit_function_exit): Likewise. |
| 214 | + (sjlj_emit_dispatch_table): Likewise. |
| 215 | + * expmed.cc (expmed_mult_highpart_optab, expand_sdiv_pow2): Likewise. |
| 216 | + * expr.cc (convert_mode_scalar, emit_move_multi_word): Likewise. |
| 217 | + (gen_move_insn, expand_cond_expr_using_cmove): Likewise. |
| 218 | + (expand_expr_divmod, expand_expr_real_2): Likewise. |
| 219 | + (maybe_optimize_pow2p_mod_cmp, maybe_optimize_mod_cmp): Likewise. |
| 220 | + * function.cc (emit_initial_value_sets): Likewise. |
| 221 | + (instantiate_virtual_regs_in_insn, expand_function_end): Likewise. |
| 222 | + (get_arg_pointer_save_area, make_split_prologue_seq): Likewise. |
| 223 | + (make_prologue_seq, gen_call_used_regs_seq): Likewise. |
| 224 | + (thread_prologue_and_epilogue_insns): Likewise. |
| 225 | + (match_asm_constraints_1): Likewise. |
| 226 | + * gcse.cc (prepare_copy_insn): Likewise. |
| 227 | + * ifcvt.cc (noce_emit_store_flag, noce_emit_move_insn): Likewise. |
| 228 | + (noce_emit_cmove): Likewise. |
| 229 | + * init-regs.cc (initialize_uninitialized_regs): Likewise. |
| 230 | + * internal-fn.cc (expand_POPCOUNT): Likewise. |
| 231 | + * ira-emit.cc (emit_move_list): Likewise. |
| 232 | + * ira.cc (ira): Likewise. |
| 233 | + * loop-doloop.cc (doloop_modify): Likewise. |
| 234 | + * loop-unroll.cc (compare_and_jump_seq): Likewise. |
| 235 | + (unroll_loop_runtime_iterations, insert_base_initialization): Likewise. |
| 236 | + (split_iv, insert_var_expansion_initialization): Likewise. |
| 237 | + (combine_var_copies_in_loop_exit): Likewise. |
| 238 | + * lower-subreg.cc (resolve_simple_move,resolve_shift_zext): Likewise. |
| 239 | + * lra-constraints.cc (match_reload, check_and_process_move): Likewise. |
| 240 | + (process_addr_reg, insert_move_for_subreg): Likewise. |
| 241 | + (process_address_1, curr_insn_transform): Likewise. |
| 242 | + (inherit_reload_reg, process_invariant_for_inheritance): Likewise. |
| 243 | + (inherit_in_ebb, remove_inheritance_pseudos): Likewise. |
| 244 | + * lra-remat.cc (do_remat): Likewise. |
| 245 | + * mode-switching.cc (commit_mode_sets): Likewise. |
| 246 | + (optimize_mode_switching): Likewise. |
| 247 | + * optabs.cc (expand_binop, expand_twoval_binop_libfunc): Likewise. |
| 248 | + (expand_clrsb_using_clz, expand_doubleword_clz_ctz_ffs): Likewise. |
| 249 | + (expand_doubleword_popcount, expand_ctz, expand_ffs): Likewise. |
| 250 | + (expand_absneg_bit, expand_unop, expand_copysign_bit): Likewise. |
| 251 | + (prepare_float_lib_cmp, expand_float, expand_fix): Likewise. |
| 252 | + (expand_fixed_convert, gen_cond_trap): Likewise. |
| 253 | + (expand_atomic_fetch_op): Likewise. |
| 254 | + * ree.cc (combine_reaching_defs): Likewise. |
| 255 | + * reg-stack.cc (compensate_edge): Likewise. |
| 256 | + * reload1.cc (emit_input_reload_insns): Likewise. |
| 257 | + * sel-sched-ir.cc (setup_nop_and_exit_insns): Likewise. |
| 258 | + * shrink-wrap.cc (emit_common_heads_for_components): Likewise. |
| 259 | + (emit_common_tails_for_components): Likewise. |
| 260 | + (insert_prologue_epilogue_for_components): Likewise. |
| 261 | + * tree-outof-ssa.cc (emit_partition_copy): Likewise. |
| 262 | + (insert_value_copy_on_edge): Likewise. |
| 263 | + * tree-ssa-loop-ivopts.cc (computation_cost): Likewise. |
| 264 | + |
| 265 | +2025-05-16 Richard Sandiford < [email protected]> |
| 266 | + |
| 267 | + * rtl.h (end_sequence): Return the sequence. |
| 268 | + * emit-rtl.cc (end_sequence): Likewise. |
| 269 | + |
| 270 | +2025-05-16 Pan Li < [email protected]> |
| 271 | + |
| 272 | + * config/riscv/autovec-opt.md (*<optab>_vx_<mode>): Add new |
| 273 | + pattern to convert vec_duplicate + vsub.vv to vsub.vx. |
| 274 | + * config/riscv/riscv.cc (riscv_rtx_costs): Add minus as plus op. |
| 275 | + * config/riscv/vector-iterators.md: Add minus to iterator |
| 276 | + any_int_binop_no_shift_vx. |
| 277 | + |
1 | 278 | 2025-05-15 Andrew MacLeod < [email protected]>
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2 | 279 |
|
3 | 280 | PR tree-optimization/116546
|
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