fix(RX DMA Calypte): deactivate relaxed ordering

The relaxed ordering causes some packets in the upstream direction to not be registered at all, e.g. to be dropped. The ordering of the transactions needs to be retained and therefore, this Relaxed ordering setting in the PCIe header should never be activated again.
CESNET · Nov 27, 2024 · faff9f9 · faff9f9
1 parent 5b50d24
commit faff9f9
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Showing 2 changed files with 3 additions and 3 deletions.
diff --git a/comp/dma/dma_calypte/comp/rx/comp/hdr_manager/rx_dma_calypte_hdr_manager.vhd b/comp/dma/dma_calypte/comp/rx/comp/hdr_manager/rx_dma_calypte_hdr_manager.vhd
@@ -774,7 +774,7 @@ begin
             IN_VFID       => (others => '0'),
             IN_TAG        => (others => '0'),
             IN_DW_CNT     => std_logic_vector(to_unsigned(DATA_SEGMENT_SIZE/4, 11)),
-            IN_ATTRIBUTES => "010",
+            IN_ATTRIBUTES => "000",     -- NOTE: Do not activate Relaxed ordering (bit 1) ever again
             IN_FBE        => "1111",
             IN_LBE        => "1111",
             IN_ADDR_LEN   => pcie_addr_len_data_tran,
@@ -820,7 +820,7 @@ begin
             IN_VFID       => (others => '0'),
             IN_TAG        => (others => '0'),
             IN_DW_CNT     => std_logic_vector(to_unsigned(8/4, 11)),
-            IN_ATTRIBUTES => "010",
+            IN_ATTRIBUTES => "000",     -- NOTE: Do not activate Relaxed ordering (bit 1) ever again
             IN_FBE        => "1111",
             IN_LBE        => "1111",
             IN_ADDR_LEN   => pcie_addr_len_dma_hdr_tran,

diff --git a/comp/dma/dma_calypte/comp/rx/uvm/tbench/env/model.sv b/comp/dma/dma_calypte/comp/rx/uvm/tbench/env/model.sv
@@ -163,7 +163,7 @@ class model #(CHANNELS, PKT_SIZE_MAX, META_WIDTH, DEVICE) extends uvm_component;
     function void get_pcie_header(int unsigned packet_size, logic [64-1:0] addr, output logic[32-1 : 0] header[], output logic[168-1 : 0] meta);
         logic [2-1:0]  at       = 0;
         logic [1-1:0]  ecrc     = 0;
-        logic [3-1:0]  attr     = 2;
+        logic [3-1:0]  attr     = 0;
         logic [3-1:0]  tc       = 0;
         logic [1-1:0]  rq_id_enabled = 0;
         logic [16-1:0] cm_id    = 0; //compleater ID