Merge branch 'friedl-fix-netmod_ts_demo_ports' into 'devel'

fix(network_mod): width of demo/testing ports

See merge request ndk/ndk-fpga!99

core/comp/eth/network_mod/network_mod_ent.vhd

@@ -156,9 +156,9 @@ port(
 
     -- This interface is to transmit Channel IDs and Timestamps of packets
     -- from the APP Core to the demo/testing logic in the Network Mod Core (E-Tile).
-    ETH_TX_MVB_CHANNEL   : in std_logic_vector(ETH_PORTS*REGIONS*max(1,log2(TX_DMA_CHANNELS))-1 downto 0);
-    ETH_TX_MVB_TIMESTAMP : in std_logic_vector(ETH_PORTS*REGIONS*48-1 downto 0);
-    ETH_TX_MVB_VLD       : in std_logic_vector(ETH_PORTS*REGIONS-1 downto 0);
+    ETH_TX_MVB_CHANNEL   : in std_logic_vector(ETH_STREAMS*REGIONS*max(1,log2(TX_DMA_CHANNELS))-1 downto 0);
+    ETH_TX_MVB_TIMESTAMP : in std_logic_vector(ETH_STREAMS*REGIONS*48-1 downto 0);
+    ETH_TX_MVB_VLD       : in std_logic_vector(ETH_STREAMS*REGIONS-1 downto 0);
 
     -- =====================================================================
     -- TX interface (Packets received from Ethernet)