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rx_dma_calypte_hdr_manager [FEATURE]: activate relaxed ordering for RQ transactions
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2 files changed

+3
-3
lines changed

2 files changed

+3
-3
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comp/dma/dma_calypte/comp/rx/comp/hdr_manager/rx_dma_calypte_hdr_manager.vhd

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -774,7 +774,7 @@ begin
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IN_VFID => (others => '0'),
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IN_TAG => (others => '0'),
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IN_DW_CNT => std_logic_vector(to_unsigned(DATA_SEGMENT_SIZE/4, 11)),
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IN_ATTRIBUTES => "000",
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IN_ATTRIBUTES => "010",
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IN_FBE => "1111",
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IN_LBE => "1111",
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IN_ADDR_LEN => pcie_addr_len_data_tran,
@@ -820,7 +820,7 @@ begin
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IN_VFID => (others => '0'),
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IN_TAG => (others => '0'),
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IN_DW_CNT => std_logic_vector(to_unsigned(8/4, 11)),
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IN_ATTRIBUTES => "000",
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IN_ATTRIBUTES => "010",
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IN_FBE => "1111",
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IN_LBE => "1111",
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IN_ADDR_LEN => pcie_addr_len_dma_hdr_tran,

comp/dma/dma_calypte/comp/rx/uvm/tbench/env/model.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,7 @@ class model #(CHANNELS, PKT_SIZE_MAX, META_WIDTH, DEVICE) extends uvm_component;
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function void get_pcie_header(int unsigned packet_size, logic [64-1:0] addr, output logic[32-1 : 0] header[], output logic[168-1 : 0] meta);
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logic [2-1:0] at = 0;
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logic [1-1:0] ecrc = 0;
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logic [3-1:0] attr = 0;
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logic [3-1:0] attr = 2;
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logic [3-1:0] tc = 0;
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logic [1-1:0] rq_id_enabled = 0;
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logic [16-1:0] cm_id = 0; //compleater ID

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