Merge branch 'spinler-feat-platform_tags' into 'devel'

Spinler feat platform tags

See merge request ndk/ndk-fpga!71

build/Modelsim.inc.fdo

@@ -294,6 +294,14 @@ proc nb_sim_sanitize_vars {user_sim_flags sim_flags hierarchy VARS} {
     lappend MOD
     lappend TB_FILE
 
+    global NB_PLATFORM_TAGS env
+
+    if {[info exists env(PLATFORM_TAGS)]} {
+        set NB_PLATFORM_TAGS "$env(PLATFORM_TAGS)"
+    } else {
+        set NB_PLATFORM_TAGS "altera xilinx"
+    }
+
     set HIERARCHY(PACKAGES) $PACKAGES
     set HIERARCHY(COMPONENTS) $COMPONENTS
     set HIERARCHY(MOD) $MOD

build/Quartus.inc.tcl

@@ -588,6 +588,13 @@ proc nb_sanitize_vars {synth_flags hierarchy} {
 
     set SYNTH_FLAGS(TOOL) "quartus"
 
+    global NB_PLATFORM_TAGS env
+    if {[info exists env(PLATFORM_TAGS)]} {
+        set NB_PLATFORM_TAGS "$env(PLATFORM_TAGS)"
+    } else {
+        set NB_PLATFORM_TAGS "altera"
+    }
+
     # Set default values
     if {![info exists SYNTH_FLAGS(PROJ_ONLY)]} {
         set SYNTH_FLAGS(PROJ_ONLY) false

build/Shared.tcl

@@ -36,6 +36,16 @@ proc nb_batch_finish {} {
     }
 }
 
+proc nb_preference_filter {PLATFORM_TAGS SUPPORTED_TAGS} {
+    set preferred ""
+    foreach tag $PLATFORM_TAGS {
+        if {$tag in $SUPPORTED_TAGS} {
+            set preferred $tag
+        }
+    }
+    return $preferred
+}
+
 # ---------------------- Common procedures ----------------------------
 # String Generation
 proc GenStr {NUM CH} {
@@ -347,8 +357,11 @@ proc ApplyToComponent {COMPONENT COMMAND FILES SV_LIBS LEVEL EVAL_COMP} {
 
     # script execution ----------------------------
     global NB_COMP_BASE
+    global NB_PLATFORM_TAGS
     global OFM_PATH
     global FIRMWARE_BASE
+
+    set PLATFORM_TAGS $NB_PLATFORM_TAGS
     set COMP_BASE $NB_COMP_BASE
     set MOD ""
     set SV_LIB ""

build/Synplify.inc.tcl

@@ -247,6 +247,10 @@ proc nb_sanitize_vars {synth_flags hierarchy} {
 
     set SYNTH_FLAGS(TOOL) "synplify"
 
+    global NB_PLATFORM_TAGS
+    global PLATFORM_TAGS
+    set NB_PLATFORM_TAGS "$PLATFORM_TAGS"
+
     # Set default values
     if {![info exists SYNTH_FLAGS(PROJ_ONLY)]} {
         set SYNTH_FLAGS(PROJ_ONLY) false

build/Vivado.inc.tcl

@@ -719,6 +719,13 @@ proc nb_sanitize_vars {synth_flags hierarchy} {
 
     set SYNTH_FLAGS(TOOL) "vivado"
 
+    global NB_PLATFORM_TAGS env
+    if {[info exists env(PLATFORM_TAGS)]} {
+        set NB_PLATFORM_TAGS "$env(PLATFORM_TAGS)"
+    } else {
+        set NB_PLATFORM_TAGS "xilinx"
+    }
+
     if {[info commands version] != ""} {
         set SYNTH_FLAGS(TOOL_VERSION) [version -short]
     } else {

build/Vivado_non_prj.inc.tcl

@@ -655,6 +655,10 @@ proc nb_sanitize_vars {synth_flags hierarchy} {
 
     set SYNTH_FLAGS(TOOL) "vivado"
 
+    global NB_PLATFORM_TAGS
+    global PLATFORM_TAGS
+    set NB_PLATFORM_TAGS "xilinx $PLATFORM_TAGS"
+
     if {[info commands version] != ""} {
         set SYNTH_FLAGS(TOOL_VERSION) [version -short]
     } else {

build/readme.rst

@@ -83,6 +83,41 @@ Variables ``ENTITY``, ``ENTITY_BASE`` and ``ARCHGRP`` are predefined (provided)
   Prefer to use :tcl:`lappend MOD "myfile.vhd"` instead of :tcl:`set MOD "$MOD myfile.vhd"`,
   because the ``lappend`` better express the operation and is faster.
 
+PLATFORM_TAGS
+~~~~~~~~~~~~~
+
+In the situation, when a platform (build tool: Quartus, Vivado, simulator: Questa Sim, etc.) supports various architectures / implementation schemes,
+the PLATFORM_TAGS list variable can be used to distinguish, which source file should be included into project.
+
+List of available platforms:
+
+- **xilinx** - platform supports complete set of Xilinx component and products
+- **altera** - platform supports complete set of Intel/Altera component and products
+
+.. - **empty** - platform, on which the empty architectures are enabled; this is used e.g. when user wants to check the code syntax even if the codebase for toplevel is not completed yet.
+
+.. If the component doesn't have common/universal platform implementation and the "empty" tag is not in PLATFORM_TAGS, the process should exit with error.
+
+Those tags are currently not available, but show the way of potential extension and usage:
+
+- **vivado:ge_2024.0** - Vivado version is equal or greater than 2024.0 (this doesn't means automatic comparison)
+- **xilinx:usp** - Restrict for UltraScale+ platform.
+- **xilinx:sim:gty** - Inculde simulation models from highspeed transceivers.
+
+Priority for PLATFORM_TAGS
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The PLATFORM_TAGS list can be potentially used also for specifying preference/priority (latter position in list means higher priority):
+``set PLATFORM_TAGS "xilinx:bram:behav xilinx:bram:macro"``
+The priority can be easily overriden simply by appending item to the list.
+(Also the ``lsearch`` can be easily used as returns -1 for non-existing item, which means lowest priority.)
+In general, the highest priority tag from set of supported tags can be obtained by the ``proc nb_preference_filter {PLATFORM_TAGS SUPPORTED_TAGS}``
+
+    .. code-block:: tcl
+
+        set SUPPORTED_PLATFORM_TAGS "xilinx altera"
+        set TARGET_TAG [nb_preference_filter $PLATFORM_TAGS $SUPPORTED_PLATFORM_TAGS]
+
 .. _extra file properties:
 
 List of properties used in MOD variables

build/scripts/cocotb/cocotb.fdo

@@ -16,16 +16,12 @@ source_with_args $env(SYNTHFILES) "-tnone"
 set PACKAGES $HIERARCHY(PACKAGES)
 set COMPONENTS $HIERARCHY(COMPONENTS)
 
-set SYNTH_FLAGS(TOOL) "modelsim"
 set SIM_FLAGS(EXTRA_VFLAGS) [list -quiet -suppress 1130,1339,8664,8683,8684,8822,12110,1549,143 -L unisims_ver -L secureip]
 set SIM_FLAGS(MAKEFILE_GEN) true
 set SIM_FLAGS(MAKEFILE_NAME) simulation.Makefile
 set SIM_FLAGS(VSIM_MANUAL_START) true
 set SIM_FLAGS(DEBUG) true
 
-if {[info exists env(SYNTH_TOOL)]} {
-    set SYNTH_FLAGS(TOOL) $env(SYNTH_TOOL)
-}
 
 set COCOTB_PATH [eval cocotb-config --lib-name-path fli modelsim]
 lappend SIM_FLAGS(EXTRA_VFLAGS) -foreign "cocotb_init $COCOTB_PATH"

comp/base/dsp/dsp_comparator_intel/Modules.tcl

@@ -4,8 +4,6 @@
 #
 # SPDX-License-Identifier: BSD-3-Clause
 
-global SYNTH_FLAGS
-
 # Set paths
 
 set PKG_BASE       "$OFM_PATH/comp/base/pkg"
@@ -19,17 +17,13 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/ver/vhdl_ver_tools/basics/basics_test_pkg
 
 set MOD "$MOD $ENTITY_BASE/dsp_comparator_intel_ent.vhd"
 
-if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "vivado" } {
-
-    set MOD "$MOD $ENTITY_BASE/dsp_comparator_intel_empty.vhd"
-
-} else {
-
+if {"altera" in $PLATFORM_TAGS} {
     set COMPONENTS [list \
         [list "AGILEX_COMP"    $AGILEX_BASE    "FULL"] \
         [list "STRATIX10_COMP" $STRATIX10_BASE "FULL"] \
     ]
 
     set MOD "$MOD $ENTITY_BASE/dsp_comparator_intel.vhd"
-
+} else {
+    set MOD "$MOD $ENTITY_BASE/dsp_comparator_intel_empty.vhd"
 }

comp/base/dsp/dsp_counter_intel/Modules.tcl

@@ -4,8 +4,6 @@
 #
 # SPDX-License-Identifier: BSD-3-Clause
 
-global SYNTH_FLAGS
-
 # Set paths
 set PKG_BASE "$OFM_PATH/comp/base/pkg"
 set INTEL_CNT_COMP_BASE "$OFM_PATH/comp/base/dsp/dsp_counter_intel/comp"
@@ -20,13 +18,13 @@ lappend PACKAGES "$OFM_PATH/comp/ver/vhdl_ver_tools/basics/basics_test_pkg.vhd"
 lappend MOD "$ENTITY_BASE/dsp_counter_intel_ent.vhd"
 
 # choose empty architecure when using Intel DSPs in Vivado
-if {[info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "vivado"} {
-    lappend MOD "$ENTITY_BASE/dsp_counter_intel_empty.vhd"
-} else {
+if {"altera" in $PLATFORM_TAGS} {
     set COMPONENTS [list \
         [list "AGILEX_CNT"    "$INTEL_CNT_COMP_BASE/dsp_counter_stratix10" "STRUCT"] \
         [list "STRATIX10_CNT" "$INTEL_CNT_COMP_BASE/dsp_counter_agilex"    "STRUCT"] \
     ]
 
     lappend MOD "$ENTITY_BASE/dsp_counter_intel.vhd"
+} else {
+    lappend MOD "$ENTITY_BASE/dsp_counter_intel_empty.vhd"
 }

comp/base/fifo/fifo_bram_xilinx/Modules.tcl

@@ -9,10 +9,9 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/base/pkg/type_pack.vhd"
 
 set MOD "$MOD $ENTITY_BASE/fifo_bram_xilinx_ent.vhd"
 
-global SYNTH_FLAGS
-if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus" } {
-    set MOD "$MOD $ENTITY_BASE/fifo_bram_xilinx_empty.vhd"
-} else {
+if {"xilinx" in $PLATFORM_TAGS} {
     set MOD "$MOD $ENTITY_BASE/fifo_bram_xilinx.vhd"
     lappend SRCS(CONSTR_VIVADO) [list $ENTITY_BASE/fifo_bram_xilinx.xdc SCOPED_TO_REF FIFO_BRAM_XILINX]
+} else {
+    set MOD "$MOD $ENTITY_BASE/fifo_bram_xilinx_empty.vhd"
 }

comp/base/logic/cmp/comp/cmp_dsp/Modules.tcl

@@ -5,23 +5,17 @@
 #
 # SPDX-License-Identifier: BSD-3-Clause
 
-global SYNTH_FLAGS
-
 
 set COMPONENTS [ list \
     [ list "MATH_PACK" "$OFM_PATH/comp/base/pkg" "MATH" ] \
 ]
 
 set MOD "$MOD $ENTITY_BASE/cmp_dsp_ent.vhd"
 
-if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus" } {
-
-    set MOD "$MOD $ENTITY_BASE/cmp_dsp_empty.vhd"
-
-} else {
-
+if {"xilinx" in $PLATFORM_TAGS} {
     set MOD "$MOD $ENTITY_BASE/cmp_decode.vhd"
     set MOD "$MOD $ENTITY_BASE/cmp48.vhd"
     set MOD "$MOD $ENTITY_BASE/cmp_dsp.vhd"
-
+} else {
+    set MOD "$MOD $ENTITY_BASE/cmp_dsp_empty.vhd"
 }

comp/base/logic/count/Modules.tcl

@@ -5,21 +5,16 @@
 #
 # SPDX-License-Identifier: BSD-3-Clause
 
-global SYNTH_FLAGS
 
 # Set paths
 set MOD "$MOD $ENTITY_BASE/count_dsp_ent.vhd"
 
-if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus" } {
-
-    set MOD "$MOD $ENTITY_BASE/count_dsp_empty.vhd"
-
-} else {
-
+if {"xilinx" in $PLATFORM_TAGS} {
     set MOD "$MOD $ENTITY_BASE/count48.vhd"
     set MOD "$MOD $ENTITY_BASE/count_dsp.vhd"
 
     # COUNT_TOP with input and output registers for measurements
     # set MOD "$MOD $ENTITY_BASE/synth/count_top.vhd"
-
+} else {
+    set MOD "$MOD $ENTITY_BASE/count_dsp_empty.vhd"
 }

comp/base/mem/gen_lutram/altdpram/Modules.tcl

@@ -10,9 +10,8 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/base/pkg/type_pack.vhd"
 
 set MOD "$MOD $ENTITY_BASE/altdpram_wrap_ent.vhd"
 
-global SYNTH_FLAGS
-if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) != "quartus" } {
-    set MOD "$MOD $ENTITY_BASE/altdpram_wrap_empty.vhd"
-} else {
+if {"altera" in $PLATFORM_TAGS} {
     set MOD "$MOD $ENTITY_BASE/altdpram_wrap.vhd"
+} else {
+    set MOD "$MOD $ENTITY_BASE/altdpram_wrap_empty.vhd"
 }

comp/base/mem/sdp_bram/sdp_bram_intel/Modules.tcl

@@ -9,9 +9,8 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/base/pkg/type_pack.vhd"
 
 set MOD "$MOD $ENTITY_BASE/sdp_bram_intel_ent.vhd"
 
-global SYNTH_FLAGS
-if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) != "quartus" } {
-    set MOD "$MOD $ENTITY_BASE/sdp_bram_intel_empty.vhd"
-} else {
+if {"altera" in $PLATFORM_TAGS} {
     set MOD "$MOD $ENTITY_BASE/sdp_bram_intel.vhd"
+} else {
+    set MOD "$MOD $ENTITY_BASE/sdp_bram_intel_empty.vhd"
 }

comp/base/mem/sdp_bram/sdp_bram_xilinx/Modules.tcl

@@ -9,9 +9,8 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/base/pkg/type_pack.vhd"
 
 set MOD "$MOD $ENTITY_BASE/sdp_bram_xilinx_ent.vhd"
 
-global SYNTH_FLAGS
-if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) != "vivado" } {
-    set MOD "$MOD $ENTITY_BASE/sdp_bram_xilinx_empty.vhd"
-} else {
+if {"xilinx" in $PLATFORM_TAGS} {
     set MOD "$MOD $ENTITY_BASE/sdp_bram_xilinx.vhd"
+} else {
+    set MOD "$MOD $ENTITY_BASE/sdp_bram_xilinx_empty.vhd"
 }

comp/tsu/tsu_gen/Modules.tcl

@@ -7,8 +7,6 @@
 # SPDX-License-Identifier: BSD-3-Clause
 #
 
-global SYNTH_FLAGS
-
 set TSU_CORE_BASE             "$ENTITY_BASE/comp/tsu_gen_core"
 set MI32_ASYNC_HANDSHAKE_BASE "$OFM_PATH/comp/mi_tools/async"
 set ASYNC_RESET_BASE          "$OFM_PATH/comp/base/async/reset"
@@ -22,27 +20,20 @@ set MOD "$MOD $ENTITY_BASE/tsu_gen_ent.vhd"
 set MOD "$MOD $ENTITY_BASE/mult_1e9_ent.vhd"
 
 # components
-if {[info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus"} {
-
-    set COMPONENTS [ list \
-        [ list "TSU_CORE"             $TSU_CORE_BASE             "FULL" ] \
-        [ list "MI32_ASYNC_HANDSHAKE" $MI32_ASYNC_HANDSHAKE_BASE "FULL" ] \
-        [ list "ASYNC_RESET"          $ASYNC_RESET_BASE          "FULL" ] \
-        [ list "ASYNC_BUS_HANDSHAKE"  $ASYNC_HANDSHAKE_BASE      "FULL" ] \
-    ]
-    set MOD "$MOD $ENTITY_BASE/mult_1e9_empty.vhd"
+set COMPONENTS [ list \
+    [ list "TSU_CORE"             $TSU_CORE_BASE             "FULL" ] \
+    [ list "MI32_ASYNC_HANDSHAKE" $MI32_ASYNC_HANDSHAKE_BASE "FULL" ] \
+    [ list "ASYNC_RESET"          $ASYNC_RESET_BASE          "FULL" ] \
+    [ list "ASYNC_BUS_HANDSHAKE"  $ASYNC_HANDSHAKE_BASE      "FULL" ] \
+]
 
-} else {
+if {"xilinx" in $PLATFORM_TAGS} {
+    lappend COMPONENTS \
+        [list "ALU_DSP" $ALU "STRUCTUAL"]
 
-    set COMPONENTS [ list \
-        [ list "TSU_CORE"             $TSU_CORE_BASE             "FULL"      ] \
-        [ list "MI32_ASYNC_HANDSHAKE" $MI32_ASYNC_HANDSHAKE_BASE "FULL"      ] \
-        [ list "ASYNC_RESET"          $ASYNC_RESET_BASE          "FULL"      ] \
-        [ list "ASYNC_BUS_HANDSHAKE"  $ASYNC_HANDSHAKE_BASE      "FULL"      ] \
-        [ list "ALU_DSP"              $ALU                       "STRUCTUAL" ] \
-    ]
     set MOD "$MOD $ENTITY_BASE/mult_1e9.vhd"
-
+} else {
+    set MOD "$MOD $ENTITY_BASE/mult_1e9_empty.vhd"
 }
 
 # mods

comp/tsu/tsu_gen/comp/tsu_gen_core/Modules.tcl

@@ -7,18 +7,16 @@
 # SPDX-License-Identifier: BSD-3-Clause
 #
 
-global SYNTH_FLAGS
-
 set MI32_ASYNC_HANDSHAKE_BASE "$OFM_PATH/comp/mi_tools/async"
 
 set COMPONENTS [list [ list "MI32_ASYNC_HANDSHAKE" $MI32_ASYNC_HANDSHAKE_BASE "FULL" ]]
 
 set MOD "$MOD $ENTITY_BASE/tsu_adder_ent.vhd"
 
-if {[info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus"} {
-    set MOD "$MOD $ENTITY_BASE/tsu_adder_common.vhd"
-} else {
+if {"xilinx" in $PLATFORM_TAGS} {
     set MOD "$MOD $ENTITY_BASE/tsu_adder_xilinx.vhd"
+} else {
+    set MOD "$MOD $ENTITY_BASE/tsu_adder_common.vhd"
 }
 
 set MOD "$MOD $ENTITY_BASE/tsu_gen_core.vhd"