From fcf431553c19f147687fa264570825645ab93d8b Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Thu, 22 May 2025 11:26:47 +0800
Subject: [PATCH 01/11] drivers: net: sam_gmac: centralize the lists used for
 different queues

The lists optimized includes:
 - RX descriptors list
 - TX descriptors list
 - RX buffer accounting list
 - TX buffer accounting list
 - TX frames accounting list

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c      | 233 ++++++++++-----------------
 drivers/ethernet/eth_sam_gmac_priv.h |  50 +++---
 2 files changed, 111 insertions(+), 172 deletions(-)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index c0893566b976b..08e65285a0fa9 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -154,110 +154,45 @@ BUILD_ASSERT(DT_INST_ENUM_IDX(0, phy_connection_type) <= SAM_GMAC_PHY_CONNECTION
 	     "Invalid PHY connection");
 
 /* RX descriptors list */
-static struct gmac_desc rx_desc_que0[MAIN_QUEUE_RX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#if GMAC_PRIORITY_QUEUE_NUM >= 1
-static struct gmac_desc rx_desc_que1[PRIORITY_QUEUE1_RX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 2
-static struct gmac_desc rx_desc_que2[PRIORITY_QUEUE2_RX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 3
-static struct gmac_desc rx_desc_que3[PRIORITY_QUEUE3_RX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 4
-static struct gmac_desc rx_desc_que4[PRIORITY_QUEUE4_RX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 5
-static struct gmac_desc rx_desc_que5[PRIORITY_QUEUE5_RX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
+#define DEFN_RX_DESC(n)									\
+		static struct gmac_desc rx_desc##n##_que[PRIORITY_QUEUE_RX_DESC_COUNT]	\
+			__nocache __aligned(GMAC_DESC_ALIGNMENT);
 
 /* TX descriptors list */
-static struct gmac_desc tx_desc_que0[MAIN_QUEUE_TX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#if GMAC_PRIORITY_QUEUE_NUM >= 1
-static struct gmac_desc tx_desc_que1[PRIORITY_QUEUE1_TX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 2
-static struct gmac_desc tx_desc_que2[PRIORITY_QUEUE2_TX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 3
-static struct gmac_desc tx_desc_que3[PRIORITY_QUEUE3_TX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 4
-static struct gmac_desc tx_desc_que4[PRIORITY_QUEUE4_TX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 5
-static struct gmac_desc tx_desc_que5[PRIORITY_QUEUE5_TX_DESC_COUNT]
-	__nocache __aligned(GMAC_DESC_ALIGNMENT);
-#endif
+#define DEFN_TX_DESC(n)									\
+		static struct gmac_desc tx_desc##n##_que[PRIORITY_QUEUE_TX_DESC_COUNT]	\
+			__nocache __aligned(GMAC_DESC_ALIGNMENT);
 
 /* RX buffer accounting list */
-static struct net_buf *rx_frag_list_que0[MAIN_QUEUE_RX_DESC_COUNT];
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1
-static struct net_buf *rx_frag_list_que1[PRIORITY_QUEUE1_RX_DESC_COUNT];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 2
-static struct net_buf *rx_frag_list_que2[PRIORITY_QUEUE2_RX_DESC_COUNT];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 3
-static struct net_buf *rx_frag_list_que3[PRIORITY_QUEUE3_RX_DESC_COUNT];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 4
-static struct net_buf *rx_frag_list_que4[PRIORITY_QUEUE4_RX_DESC_COUNT];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 5
-static struct net_buf *rx_frag_list_que5[PRIORITY_QUEUE5_RX_DESC_COUNT];
-#endif
+#define DEFN_RX_FRAG(n)									\
+		static struct net_buf *rx_frag_list##n##_que[PRIORITY_QUEUE_RX_DESC_COUNT];
 
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 /* TX buffer accounting list */
-static struct net_buf *tx_frag_list_que0[MAIN_QUEUE_TX_DESC_COUNT];
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1
-static struct net_buf *tx_frag_list_que1[PRIORITY_QUEUE1_TX_DESC_COUNT];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 2
-static struct net_buf *tx_frag_list_que2[PRIORITY_QUEUE2_TX_DESC_COUNT];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 3
-static struct net_buf *tx_frag_list_que3[PRIORITY_QUEUE3_TX_DESC_COUNT];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 4
-static struct net_buf *tx_frag_list_que4[PRIORITY_QUEUE4_TX_DESC_COUNT];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 5
-static struct net_buf *tx_frag_list_que5[PRIORITY_QUEUE5_TX_DESC_COUNT];
-#endif
+#define DEFN_TX_FRAG(n)									\
+		static struct net_buf *tx_frag_list##n##_que[PRIORITY_QUEUE_TX_DESC_COUNT];
 
-#if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
+#if  defined(CONFIG_PTP_CLOCK_SAM_GMAC)
+#define NET_PKT_PER_QUE (CONFIG_NET_PKT_TX_COUNT + 1)
 /* TX frames accounting list */
-static struct net_pkt *tx_frame_list_que0[CONFIG_NET_PKT_TX_COUNT + 1];
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1
-static struct net_pkt *tx_frame_list_que1[CONFIG_NET_PKT_TX_COUNT + 1];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 2
-static struct net_pkt *tx_frame_list_que2[CONFIG_NET_PKT_TX_COUNT + 1];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 3
-static struct net_pkt *tx_frame_list_que3[CONFIG_NET_PKT_TX_COUNT + 1];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 4
-static struct net_pkt *tx_frame_list_que4[CONFIG_NET_PKT_TX_COUNT + 1];
-#endif
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 5
-static struct net_pkt *tx_frame_list_que5[CONFIG_NET_PKT_TX_COUNT + 1];
-#endif
-#endif
-#endif
+#define DEFN_TX_FRAME(n)								\
+		static struct net_pkt *tx_frame_list##n##_que[NET_PKT_PER_QUE *		\
+							      (GMAC_ACTIVE_PRIORITY_QUEUE_NUM + 1)];
+#else
+#define DEFN_TX_FRAME(n)
+#endif /* CONFIG_PTP_CLOCK_SAM_GMAC */
+#else
+#define DEFN_TX_FRAG(n)
+#define DEFN_TX_FRAME(n)
+#endif /* GMAC_MULTIPLE_TX_PACKETS */
+
+#define SAM_GMAC_LISTS_DEFN(n)								\
+		DEFN_RX_DESC(n)								\
+		DEFN_TX_DESC(n)								\
+		DEFN_RX_FRAG(n)								\
+		DEFN_TX_FRAG(n)								\
+		DEFN_TX_FRAME(n)
+DT_INST_FOREACH_STATUS_OKAY(SAM_GMAC_LISTS_DEFN)
 
 #define MODULO_INC(val, max) {val = (++val < max) ? val : 0; }
 
@@ -2204,23 +2139,23 @@ static struct eth_sam_dev_data eth0_data = {
 		{
 			.que_idx = GMAC_QUE_0,
 			.rx_desc_list = {
-				.buf = rx_desc_que0,
-				.len = ARRAY_SIZE(rx_desc_que0),
+				.buf = &rx_desc0_que[PRIORITY_QUEUE0_RX_DESC_IDX],
+				.len = MAIN_QUEUE_RX_DESC_COUNT,
 			},
 			.tx_desc_list = {
-				.buf = tx_desc_que0,
-				.len = ARRAY_SIZE(tx_desc_que0),
+				.buf = &tx_desc0_que[PRIORITY_QUEUE0_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
-			.rx_frag_list = rx_frag_list_que0,
+			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE0_RX_DESC_IDX],
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 			.tx_frag_list = {
-				.buf = (uint32_t *)tx_frag_list_que0,
-				.len = ARRAY_SIZE(tx_frag_list_que0),
+				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE0_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
 			.tx_frames = {
-				.buf = (uint32_t *)tx_frame_list_que0,
-				.len = ARRAY_SIZE(tx_frame_list_que0),
+				.buf = (uint32_t *)&tx_frame_list0_que[0 * NET_PKT_PER_QUE],
+				.len = NET_PKT_PER_QUE,
 			},
 #endif
 #endif
@@ -2228,24 +2163,24 @@ static struct eth_sam_dev_data eth0_data = {
 		}, {
 			.que_idx = GMAC_QUE_1,
 			.rx_desc_list = {
-				.buf = rx_desc_que1,
-				.len = ARRAY_SIZE(rx_desc_que1),
+				.buf = &rx_desc0_que[PRIORITY_QUEUE1_RX_DESC_IDX],
+				.len = MAIN_QUEUE_RX_DESC_COUNT,
 			},
 			.tx_desc_list = {
-				.buf = tx_desc_que1,
-				.len = ARRAY_SIZE(tx_desc_que1),
+				.buf = &tx_desc0_que[PRIORITY_QUEUE1_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1
-			.rx_frag_list = rx_frag_list_que1,
+			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE1_RX_DESC_IDX],
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 			.tx_frag_list = {
-				.buf = (uint32_t *)tx_frag_list_que1,
-				.len = ARRAY_SIZE(tx_frag_list_que1),
+				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE1_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
 			.tx_frames = {
-				.buf = (uint32_t *)tx_frame_list_que1,
-				.len = ARRAY_SIZE(tx_frame_list_que1),
+				.buf = (uint32_t *)&tx_frame_list0_que[1 * NET_PKT_PER_QUE],
+				.len = NET_PKT_PER_QUE,
 			}
 #endif
 #endif
@@ -2255,24 +2190,24 @@ static struct eth_sam_dev_data eth0_data = {
 		}, {
 			.que_idx = GMAC_QUE_2,
 			.rx_desc_list = {
-				.buf = rx_desc_que2,
-				.len = ARRAY_SIZE(rx_desc_que2),
+				.buf = &rx_desc0_que[PRIORITY_QUEUE2_RX_DESC_IDX],
+				.len = MAIN_QUEUE_RX_DESC_COUNT,
 			},
 			.tx_desc_list = {
-				.buf = tx_desc_que2,
-				.len = ARRAY_SIZE(tx_desc_que2),
+				.buf = &tx_desc0_que[PRIORITY_QUEUE2_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 2
-			.rx_frag_list = rx_frag_list_que2,
+			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE2_RX_DESC_IDX],
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 			.tx_frag_list = {
-				.buf = (uint32_t *)tx_frag_list_que2,
-				.len = ARRAY_SIZE(tx_frag_list_que2),
+				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE2_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
 			.tx_frames = {
-				.buf = (uint32_t *)tx_frame_list_que2,
-				.len = ARRAY_SIZE(tx_frame_list_que2),
+				.buf = (uint32_t *)&tx_frame_list0_que[2 * NET_PKT_PER_QUE],
+				.len = NET_PKT_PER_QUE,
 			}
 #endif
 #endif
@@ -2282,24 +2217,24 @@ static struct eth_sam_dev_data eth0_data = {
 		}, {
 			.que_idx = GMAC_QUE_3,
 			.rx_desc_list = {
-				.buf = rx_desc_que3,
-				.len = ARRAY_SIZE(rx_desc_que3),
+				.buf = &rx_desc0_que[PRIORITY_QUEUE3_RX_DESC_IDX],
+				.len = MAIN_QUEUE_RX_DESC_COUNT,
 			},
 			.tx_desc_list = {
-				.buf = tx_desc_que3,
-				.len = ARRAY_SIZE(tx_desc_que3),
+				.buf = &tx_desc0_que[PRIORITY_QUEUE3_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 3
-			.rx_frag_list = rx_frag_list_que3,
+			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE3_RX_DESC_IDX],
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 			.tx_frag_list = {
-				.buf = (uint32_t *)tx_frag_list_que3,
-				.len = ARRAY_SIZE(tx_frag_list_que3),
+				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE3_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
 			.tx_frames = {
-				.buf = (uint32_t *)tx_frame_list_que3,
-				.len = ARRAY_SIZE(tx_frame_list_que3),
+				.buf = (uint32_t *)&tx_frame_list0_que[3 * NET_PKT_PER_QUE],
+				.len = NET_PKT_PER_QUE,
 			}
 #endif
 #endif
@@ -2309,24 +2244,24 @@ static struct eth_sam_dev_data eth0_data = {
 		}, {
 			.que_idx = GMAC_QUE_4,
 			.rx_desc_list = {
-				.buf = rx_desc_que4,
-				.len = ARRAY_SIZE(rx_desc_que4),
+				.buf = &rx_desc0_que[PRIORITY_QUEUE4_RX_DESC_IDX],
+				.len = MAIN_QUEUE_RX_DESC_COUNT,
 			},
 			.tx_desc_list = {
-				.buf = tx_desc_que4,
-				.len = ARRAY_SIZE(tx_desc_que4),
+				.buf = &tx_desc0_que[PRIORITY_QUEUE4_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 4
-			.rx_frag_list = rx_frag_list_que4,
+			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE4_RX_DESC_IDX],
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 			.tx_frag_list = {
-				.buf = (uint32_t *)tx_frag_list_que4,
-				.len = ARRAY_SIZE(tx_frag_list_que4),
+				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE4_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
 			.tx_frames = {
-				.buf = (uint32_t *)tx_frame_list_que4,
-				.len = ARRAY_SIZE(tx_frame_list_que4),
+				.buf = (uint32_t *)&tx_frame_list0_que[4 * NET_PKT_PER_QUE],
+				.len = NET_PKT_PER_QUE,
 			}
 #endif
 #endif
@@ -2336,24 +2271,24 @@ static struct eth_sam_dev_data eth0_data = {
 		}, {
 			.que_idx = GMAC_QUE_5,
 			.rx_desc_list = {
-				.buf = rx_desc_que5,
-				.len = ARRAY_SIZE(rx_desc_que5),
+				.buf = &rx_desc0_que[PRIORITY_QUEUE5_RX_DESC_IDX],
+				.len = MAIN_QUEUE_RX_DESC_COUNT,
 			},
 			.tx_desc_list = {
-				.buf = tx_desc_que5,
-				.len = ARRAY_SIZE(tx_desc_que5),
+				.buf = &tx_desc0_que[PRIORITY_QUEUE5_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 5
-			.rx_frag_list = rx_frag_list_que5,
+			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE5_RX_DESC_IDX],
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 			.tx_frag_list = {
-				.buf = (uint32_t *)tx_frag_list_que5,
-				.len = ARRAY_SIZE(tx_frag_list_que5),
+				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE5_TX_DESC_IDX],
+				.len = MAIN_QUEUE_TX_DESC_COUNT,
 			},
 #if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
 			.tx_frames = {
-				.buf = (uint32_t *)tx_frame_list_que5,
-				.len = ARRAY_SIZE(tx_frame_list_que5),
+				.buf = (uint32_t *)&tx_frame_list0_que[5 * NET_PKT_PER_QUE],
+				.len = NET_PKT_PER_QUE,
 			}
 #endif
 #endif
diff --git a/drivers/ethernet/eth_sam_gmac_priv.h b/drivers/ethernet/eth_sam_gmac_priv.h
index a2be538f212ef..f8e562fc94b30 100644
--- a/drivers/ethernet/eth_sam_gmac_priv.h
+++ b/drivers/ethernet/eth_sam_gmac_priv.h
@@ -47,44 +47,48 @@ BUILD_ASSERT(ARRAY_SIZE(GMAC->GMAC_TBQBAPQ) + 1 == GMAC_QUEUE_NUM,
 #define MAIN_QUEUE_TX_DESC_COUNT        (CONFIG_NET_BUF_TX_COUNT + 1)
 
 /** RX/TX descriptors count for priority queues */
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1
-#define PRIORITY_QUEUE1_RX_DESC_COUNT   MAIN_QUEUE_RX_DESC_COUNT
-#define PRIORITY_QUEUE1_TX_DESC_COUNT   MAIN_QUEUE_TX_DESC_COUNT
-#else
-#define PRIORITY_QUEUE1_RX_DESC_COUNT   1
-#define PRIORITY_QUEUE1_TX_DESC_COUNT   1
-#endif
+#define PRIORITY_QUEUE_RX_DESC_COUNT						\
+		(5 - (GMAC_ACTIVE_PRIORITY_QUEUE_NUM) +				\
+		 (MAIN_QUEUE_RX_DESC_COUNT) * (1 + (GMAC_ACTIVE_PRIORITY_QUEUE_NUM)))
+#define PRIORITY_QUEUE_TX_DESC_COUNT						\
+		(5 - (GMAC_ACTIVE_PRIORITY_QUEUE_NUM) +				\
+		 (MAIN_QUEUE_TX_DESC_COUNT) * (1 + (GMAC_ACTIVE_PRIORITY_QUEUE_NUM)))
+
+#define PRIORITY_QUEUE0_RX_DESC_IDX     0
+#define PRIORITY_QUEUE0_TX_DESC_IDX     0
+#define PRIORITY_QUEUE1_RX_DESC_IDX     MAIN_QUEUE_RX_DESC_COUNT
+#define PRIORITY_QUEUE1_TX_DESC_IDX     MAIN_QUEUE_TX_DESC_COUNT
 
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 2
-#define PRIORITY_QUEUE2_RX_DESC_COUNT   MAIN_QUEUE_RX_DESC_COUNT
-#define PRIORITY_QUEUE2_TX_DESC_COUNT   MAIN_QUEUE_TX_DESC_COUNT
+#define PRIORITY_QUEUE2_RX_DESC_IDX     (MAIN_QUEUE_RX_DESC_COUNT * 2)
+#define PRIORITY_QUEUE2_TX_DESC_IDX     (MAIN_QUEUE_TX_DESC_COUNT * 2)
 #else
-#define PRIORITY_QUEUE2_RX_DESC_COUNT   1
-#define PRIORITY_QUEUE2_TX_DESC_COUNT   1
+#define PRIORITY_QUEUE2_RX_DESC_IDX     (MAIN_QUEUE_RX_DESC_COUNT + 1)
+#define PRIORITY_QUEUE2_TX_DESC_IDX     (MAIN_QUEUE_TX_DESC_COUNT + 1)
 #endif
 
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 3
-#define PRIORITY_QUEUE3_RX_DESC_COUNT   MAIN_QUEUE_RX_DESC_COUNT
-#define PRIORITY_QUEUE3_TX_DESC_COUNT   MAIN_QUEUE_TX_DESC_COUNT
+#define PRIORITY_QUEUE3_RX_DESC_IDX     (MAIN_QUEUE_RX_DESC_COUNT * 3)
+#define PRIORITY_QUEUE3_TX_DESC_IDX     (MAIN_QUEUE_TX_DESC_COUNT * 3)
 #else
-#define PRIORITY_QUEUE3_RX_DESC_COUNT   1
-#define PRIORITY_QUEUE3_TX_DESC_COUNT   1
+#define PRIORITY_QUEUE3_RX_DESC_IDX     (MAIN_QUEUE_RX_DESC_COUNT + 2)
+#define PRIORITY_QUEUE3_TX_DESC_IDX     (MAIN_QUEUE_TX_DESC_COUNT + 2)
 #endif
 
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 4
-#define PRIORITY_QUEUE4_RX_DESC_COUNT   MAIN_QUEUE_RX_DESC_COUNT
-#define PRIORITY_QUEUE4_TX_DESC_COUNT   MAIN_QUEUE_TX_DESC_COUNT
+#define PRIORITY_QUEUE4_RX_DESC_IDX     (MAIN_QUEUE_RX_DESC_COUNT * 4)
+#define PRIORITY_QUEUE4_TX_DESC_IDX     (MAIN_QUEUE_TX_DESC_COUNT * 4)
 #else
-#define PRIORITY_QUEUE4_RX_DESC_COUNT   1
-#define PRIORITY_QUEUE4_TX_DESC_COUNT   1
+#define PRIORITY_QUEUE4_RX_DESC_IDX     (MAIN_QUEUE_RX_DESC_COUNT + 3)
+#define PRIORITY_QUEUE4_TX_DESC_IDX     (MAIN_QUEUE_TX_DESC_COUNT + 3)
 #endif
 
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 5
-#define PRIORITY_QUEUE5_RX_DESC_COUNT   MAIN_QUEUE_RX_DESC_COUNT
-#define PRIORITY_QUEUE5_TX_DESC_COUNT   MAIN_QUEUE_TX_DESC_COUNT
+#define PRIORITY_QUEUE5_RX_DESC_IDX     (MAIN_QUEUE_RX_DESC_COUNT * 5)
+#define PRIORITY_QUEUE5_TX_DESC_IDX     (MAIN_QUEUE_TX_DESC_COUNT * 5)
 #else
-#define PRIORITY_QUEUE5_RX_DESC_COUNT   1
-#define PRIORITY_QUEUE5_TX_DESC_COUNT   1
+#define PRIORITY_QUEUE5_RX_DESC_IDX     (MAIN_QUEUE_RX_DESC_COUNT + 4)
+#define PRIORITY_QUEUE5_TX_DESC_IDX     (MAIN_QUEUE_TX_DESC_COUNT + 4)
 #endif
 
 /*

From 02a2b6617a4fbb750b0c159f124dfccce3fff47b Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Wed, 21 May 2025 15:30:58 +0800
Subject: [PATCH 02/11] drivers: net: sam_gmac: add var num_queues to config,
 update LOG info

Changes includes:
 - add the variable for num_queues to eth_sam_dev_cfg
 - update LOG with dev->name to distinguish different instances

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c      | 39 ++++++++++++++--------------
 drivers/ethernet/eth_sam_gmac_priv.h |  1 +
 2 files changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index 08e65285a0fa9..803b68e08b5d5 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -269,7 +269,7 @@ static int priority_queue_init(Gmac *gmac, struct gmac_queue *queue)
 	queue->err_rx_flushed_count = 0U;
 	queue->err_tx_flushed_count = 0U;
 
-	LOG_INF("Queue %d activated", queue->que_idx);
+	LOG_INF("ethernet@%x Queue %d activated", (uint32_t)gmac, queue->que_idx);
 
 	return 0;
 }
@@ -301,7 +301,7 @@ static int priority_queue_init_as_idle(Gmac *gmac, struct gmac_queue *queue)
 	/* Set Transmit Buffer Queue Pointer Register */
 	gmac->GMAC_TBQBAPQ[queue->que_idx - 1] = (uint32_t)tx_desc_list->buf;
 
-	LOG_INF("Queue %d set to idle", queue->que_idx);
+	LOG_INF("ethernet@%x Queue %d set to idle", (uint32_t)gmac, queue->que_idx);
 
 	return 0;
 }
@@ -1175,7 +1175,7 @@ static int nonpriority_queue_init(Gmac *gmac, struct gmac_queue *queue)
 	queue->err_rx_flushed_count = 0U;
 	queue->err_tx_flushed_count = 0U;
 
-	LOG_INF("Queue %d activated", queue->que_idx);
+	LOG_INF("ethernet@%x Queue %d activated", (uint32_t)gmac, queue->que_idx);
 
 	return 0;
 }
@@ -1388,7 +1388,7 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
 	__ASSERT(pkt, "buf pointer is NULL");
 	__ASSERT(pkt->frags, "Frame data missing");
 
-	LOG_DBG("ETH tx");
+	LOG_DBG("%s tx", dev->name);
 
 	/* Decide which queue should be used */
 	pkt_prio = net_pkt_priority(pkt);
@@ -1548,7 +1548,7 @@ static void queue0_isr(const struct device *dev)
 
 	/* Interrupt Status Register is cleared on read */
 	isr = gmac->GMAC_ISR;
-	LOG_DBG("GMAC_ISR=0x%08x", isr);
+	LOG_DBG("%s GMAC_ISR=0x%08x", dev->name, isr);
 
 	queue = &dev_data->queue_list[0];
 	rx_desc_list = &queue->rx_desc_list;
@@ -1559,7 +1559,7 @@ static void queue0_isr(const struct device *dev)
 		rx_error_handler(gmac, queue);
 	} else if (isr & GMAC_ISR_RCOMP) {
 		tail_desc = &rx_desc_list->buf[rx_desc_list->tail];
-		LOG_DBG("rx.w1=0x%08x, tail=%d",
+		LOG_DBG("%s rx.w1=0x%08x, tail=%d", dev->name,
 			tail_desc->w1,
 			rx_desc_list->tail);
 		eth_rx(queue);
@@ -1571,7 +1571,7 @@ static void queue0_isr(const struct device *dev)
 	} else if (isr & GMAC_ISR_TCOMP) {
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 		tail_desc = &tx_desc_list->buf[tx_desc_list->tail];
-		LOG_DBG("tx.w1=0x%08x, tail=%d",
+		LOG_DBG("%s tx.w1=0x%08x, tail=%d", dev->name,
 			tail_desc->w1,
 			tx_desc_list->tail);
 #endif
@@ -1580,7 +1580,7 @@ static void queue0_isr(const struct device *dev)
 	}
 
 	if (isr & GMAC_IER_HRESP) {
-		LOG_DBG("IER HRESP");
+		LOG_DBG("%s IER HRESP", dev->name);
 	}
 }
 
@@ -1598,7 +1598,7 @@ static inline void priority_queue_isr(const struct device *dev,
 	uint32_t isrpq;
 
 	isrpq = gmac->GMAC_ISRPQ[queue_idx - 1];
-	LOG_DBG("GMAC_ISRPQ%d=0x%08x", queue_idx - 1,  isrpq);
+	LOG_DBG("%s GMAC_ISRPQ%d=0x%08x", dev->name, queue_idx - 1,  isrpq);
 
 	queue = &dev_data->queue_list[queue_idx];
 	rx_desc_list = &queue->rx_desc_list;
@@ -1609,7 +1609,7 @@ static inline void priority_queue_isr(const struct device *dev,
 		rx_error_handler(gmac, queue);
 	} else if (isrpq & GMAC_ISRPQ_RCOMP) {
 		tail_desc = &rx_desc_list->buf[rx_desc_list->tail];
-		LOG_DBG("rx.w1=0x%08x, tail=%d",
+		LOG_DBG("%s rx.w1=0x%08x, tail=%d", dev->name,
 			tail_desc->w1,
 			rx_desc_list->tail);
 		eth_rx(queue);
@@ -1621,7 +1621,7 @@ static inline void priority_queue_isr(const struct device *dev,
 	} else if (isrpq & GMAC_ISRPQ_TCOMP) {
 #if GMAC_MULTIPLE_TX_PACKETS == 1
 		tail_desc = &tx_desc_list->buf[tx_desc_list->tail];
-		LOG_DBG("tx.w1=0x%08x, tail=%d",
+		LOG_DBG("%s tx.w1=0x%08x, tail=%d", dev->name,
 			tail_desc->w1,
 			tx_desc_list->tail);
 #endif
@@ -1630,7 +1630,7 @@ static inline void priority_queue_isr(const struct device *dev,
 	}
 
 	if (isrpq & GMAC_IERPQ_HRESP) {
-		LOG_DBG("IERPQ%d HRESP", queue_idx - 1);
+		LOG_DBG("%s IERPQ%d HRESP", dev->name, queue_idx - 1);
 	}
 }
 #endif
@@ -1737,7 +1737,7 @@ static void phy_link_state_changed(const struct device *pdev,
 	is_up = state->is_up;
 
 	if (is_up && !dev_data->link_up) {
-		LOG_INF("Link up");
+		LOG_INF("%s Link up", dev->name);
 
 		/* Announce link up status */
 		dev_data->link_up = true;
@@ -1748,7 +1748,7 @@ static void phy_link_state_changed(const struct device *pdev,
 			       PHY_LINK_IS_FULL_DUPLEX(state->speed),
 			       PHY_LINK_IS_SPEED_100M(state->speed));
 	} else if (!is_up && dev_data->link_up) {
-		LOG_INF("Link down");
+		LOG_INF("%s Link down", dev->name);
 
 		/* Announce link down status */
 		dev_data->link_up = false;
@@ -1799,13 +1799,13 @@ static void eth0_iface_init(struct net_if *iface)
 		| GMAC_MAX_FRAME_SIZE;
 	result = gmac_init(cfg->regs, gmac_ncfgr_val);
 	if (result < 0) {
-		LOG_ERR("Unable to initialize ETH driver");
+		LOG_ERR("%s Unable to initialize ETH driver", dev->name);
 		return;
 	}
 
 	generate_mac(dev_data->mac_addr);
 
-	LOG_INF("MAC: %02x:%02x:%02x:%02x:%02x:%02x",
+	LOG_INF("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x", dev->name,
 		dev_data->mac_addr[0], dev_data->mac_addr[1],
 		dev_data->mac_addr[2], dev_data->mac_addr[3],
 		dev_data->mac_addr[4], dev_data->mac_addr[5]);
@@ -1819,10 +1819,10 @@ static void eth0_iface_init(struct net_if *iface)
 			     NET_LINK_ETHERNET);
 
 	/* Initialize GMAC queues */
-	for (i = GMAC_QUE_0; i < GMAC_QUEUE_NUM; i++) {
+	for (i = GMAC_QUE_0; i < cfg->num_queues; i++) {
 		result = queue_init(cfg->regs, &dev_data->queue_list[i]);
 		if (result < 0) {
-			LOG_ERR("Unable to initialize ETH queue%d", i);
+			LOG_ERR("%s Unable to initialize ETH queue%d", dev->name, i);
 			return;
 		}
 	}
@@ -1874,7 +1874,7 @@ static void eth0_iface_init(struct net_if *iface)
 				      (void *)dev);
 
 	} else {
-		LOG_ERR("PHY device not ready");
+		LOG_ERR("%s PHY device not ready", dev->name);
 	}
 
 	init_done = true;
@@ -2129,6 +2129,7 @@ static const struct eth_sam_dev_cfg eth0_config = {
 #endif
 	.config_func = eth0_irq_config,
 	.phy_dev = DEVICE_DT_GET(DT_INST_PHANDLE(0, phy_handle))
+	.num_queues = DT_INST_PROP(0, num_queues),
 };
 
 static struct eth_sam_dev_data eth0_data = {
diff --git a/drivers/ethernet/eth_sam_gmac_priv.h b/drivers/ethernet/eth_sam_gmac_priv.h
index f8e562fc94b30..1ce941631a8a1 100644
--- a/drivers/ethernet/eth_sam_gmac_priv.h
+++ b/drivers/ethernet/eth_sam_gmac_priv.h
@@ -275,6 +275,7 @@ struct eth_sam_dev_cfg {
 	const struct pinctrl_dev_config *pcfg;
 	void (*config_func)(void);
 	const struct device *phy_dev;
+	const uint8_t num_queues;
 };
 
 /* Device run time data */

From cbd3ebcc2d43998fa7de8675bec2ba65ed724f77 Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Wed, 21 May 2025 10:50:43 +0800
Subject: [PATCH 03/11] drivers: net: sam_gmac: update macros for multi GMAC
 instances support

Change the driver from support 1 instance to support multi instances.

Changes includes:
 - irq_config()
 - config & data definitions
 - ETH_NET_DEVICE_DT_INST_DEFINE
 - PTP content / init / DEVICE_DEFINE

Limitations:
 - generate_mac() to be updated for supporting multi instances.
 - the configurations in Kconfig.sam_gmac are used for all instances.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c | 413 +++++++++++++++-----------------
 1 file changed, 193 insertions(+), 220 deletions(-)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index 803b68e08b5d5..b8d424693120b 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -192,7 +192,6 @@ BUILD_ASSERT(DT_INST_ENUM_IDX(0, phy_connection_type) <= SAM_GMAC_PHY_CONNECTION
 		DEFN_RX_FRAG(n)								\
 		DEFN_TX_FRAG(n)								\
 		DEFN_TX_FRAME(n)
-DT_INST_FOREACH_STATUS_OKAY(SAM_GMAC_LISTS_DEFN)
 
 #define MODULO_INC(val, max) {val = (++val < max) ? val : 0; }
 
@@ -1763,7 +1762,7 @@ static const struct device *eth_sam_gmac_get_phy(const struct device *dev)
 	return cfg->phy_dev;
 }
 
-static void eth0_iface_init(struct net_if *iface)
+static void eth_iface_init(struct net_if *iface)
 {
 	const struct device *dev = net_if_get_device(iface);
 	struct eth_sam_dev_data *const dev_data = dev->data;
@@ -2063,7 +2062,7 @@ static const struct device *eth_sam_gmac_get_ptp_clock(const struct device *dev)
 #endif
 
 static const struct ethernet_api eth_api = {
-	.iface_api.init = eth0_iface_init,
+	.iface_api.init = eth_iface_init,
 
 	.get_capabilities = eth_sam_gmac_get_capabilities,
 	.set_config = eth_sam_gmac_set_config,
@@ -2076,240 +2075,192 @@ static const struct ethernet_api eth_api = {
 #endif
 };
 
-static void eth0_irq_config(void)
-{
-	IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, gmac, irq),
-		    DT_INST_IRQ_BY_NAME(0, gmac, priority),
-		    queue0_isr, DEVICE_DT_INST_GET(0), 0);
-	irq_enable(DT_INST_IRQ_BY_NAME(0, gmac, irq));
-
+#define DEFN_IRQ_CONFIG(n, x, name)							\
+		IRQ_CONNECT(DT_INST_IRQ_BY_NAME(n, name, irq),				\
+			DT_INST_IRQ_BY_NAME(n, name, priority),				\
+			queue##x##_isr, DEVICE_DT_INST_GET(n), 0);			\
+		irq_enable(DT_INST_IRQ_BY_NAME(n, name, irq));
+#define DEFN_IRQ_CONFIG_0(n) DEFN_IRQ_CONFIG(n, 0, gmac)
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1
-	IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, q1, irq),
-		    DT_INST_IRQ_BY_NAME(0, q1, priority),
-		    queue1_isr, DEVICE_DT_INST_GET(0), 0);
-	irq_enable(DT_INST_IRQ_BY_NAME(0, q1, irq));
+#define DEFN_IRQ_CONFIG_1(n) DEFN_IRQ_CONFIG(n, 1, q1)
+#else
+#define DEFN_IRQ_CONFIG_1(n)
 #endif
-
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 2
-	IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, q2, irq),
-		    DT_INST_IRQ_BY_NAME(0, q1, priority),
-		    queue2_isr, DEVICE_DT_INST_GET(0), 0);
-	irq_enable(DT_INST_IRQ_BY_NAME(0, q2, irq));
+#define DEFN_IRQ_CONFIG_2(n) DEFN_IRQ_CONFIG(n, 2, q2)
+#else
+#define DEFN_IRQ_CONFIG_2(n)
 #endif
-
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 3
-	IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, q3, irq),
-		    DT_INST_IRQ_BY_NAME(0, q3, priority),
-		    queue3_isr, DEVICE_DT_INST_GET(0), 0);
-	irq_enable(DT_INST_IRQ_BY_NAME(0, q3, irq));
+#define DEFN_IRQ_CONFIG_3(n) DEFN_IRQ_CONFIG(n, 3, q3)
+#else
+#define DEFN_IRQ_CONFIG_3(n)
 #endif
-
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 4
-	IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, q4, irq),
-		    DT_INST_IRQ_BY_NAME(0, q4, priority),
-		    queue4_isr, DEVICE_DT_INST_GET(0), 0);
-	irq_enable(DT_INST_IRQ_BY_NAME(0, q4, irq));
+#define DEFN_IRQ_CONFIG_4(n) DEFN_IRQ_CONFIG(n, 4, q4)
+#else
+#define DEFN_IRQ_CONFIG_4(n)
 #endif
-
 #if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 5
-	IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, q5, irq),
-		    DT_INST_IRQ_BY_NAME(0, q5, priority),
-		    queue5_isr, DEVICE_DT_INST_GET(0), 0);
-	irq_enable(DT_INST_IRQ_BY_NAME(0, q5, irq));
-#endif
-}
+#define DEFN_IRQ_CONFIG_5(n) DEFN_IRQ_CONFIG(n, 5, q5)
+#else
+#define DEFN_IRQ_CONFIG_5(n)
+#endif
+#define SAM_GMAC_IRQ_CONFIG_DEFN(n)							\
+		static void eth##n##_irq_config(void)					\
+		{									\
+			DEFN_IRQ_CONFIG_0(n)						\
+			DEFN_IRQ_CONFIG_1(n)						\
+			DEFN_IRQ_CONFIG_2(n)						\
+			DEFN_IRQ_CONFIG_3(n)						\
+			DEFN_IRQ_CONFIG_4(n)						\
+			DEFN_IRQ_CONFIG_5(n)						\
+		}
 
-PINCTRL_DT_INST_DEFINE(0);
+#define SAM_GMAC_PINCTRL_DEFN(n) PINCTRL_DT_INST_DEFINE(n);
 
-static const struct eth_sam_dev_cfg eth0_config = {
-	.regs = (Gmac *)DT_REG_ADDR(DT_INST_PARENT(0)),
-	.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
 #ifdef CONFIG_SOC_FAMILY_ATMEL_SAM
-	.clock_cfg = SAM_DT_CLOCK_PMC_CFG(0, DT_INST_PARENT(0)),
-#endif
-	.config_func = eth0_irq_config,
-	.phy_dev = DEVICE_DT_GET(DT_INST_PHANDLE(0, phy_handle))
-	.num_queues = DT_INST_PROP(0, num_queues),
-};
-
-static struct eth_sam_dev_data eth0_data = {
-#if NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(0))
-	.mac_addr = DT_INST_PROP(0, local_mac_address),
-#endif
-	.queue_list = {
-		{
-			.que_idx = GMAC_QUE_0,
-			.rx_desc_list = {
-				.buf = &rx_desc0_que[PRIORITY_QUEUE0_RX_DESC_IDX],
-				.len = MAIN_QUEUE_RX_DESC_COUNT,
-			},
-			.tx_desc_list = {
-				.buf = &tx_desc0_que[PRIORITY_QUEUE0_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE0_RX_DESC_IDX],
-#if GMAC_MULTIPLE_TX_PACKETS == 1
-			.tx_frag_list = {
-				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE0_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
-			.tx_frames = {
-				.buf = (uint32_t *)&tx_frame_list0_que[0 * NET_PKT_PER_QUE],
-				.len = NET_PKT_PER_QUE,
-			},
-#endif
+#define CFG_CLK_DEFN(n) .clock_cfg = SAM_DT_CLOCK_PMC_CFG(0, DT_INST_PARENT(n)),
+#else
+#define CFG_CLK_DEFN(n)
+#endif
+#define SAM_GMAC_CFG_DEFN(n)								\
+		static const struct eth_sam_dev_cfg eth##n##_config = {			\
+			.regs = (Gmac *)DT_REG_ADDR(DT_INST_PARENT(n)),			\
+			.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),			\
+			CFG_CLK_DEFN(n)							\
+			.config_func = eth##n##_irq_config,				\
+			.phy_dev = DEVICE_DT_GET(DT_INST_PHANDLE(n, phy_handle)),	\
+			.num_queues = DT_INST_PROP(n, num_queues),			\
+		};
+
+#define DEFN_RX_FLAG_LIST_0(n)								\
+		.rx_frag_list = &rx_frag_list##n##_que[PRIORITY_QUEUE0_RX_DESC_IDX],
+#if (GMAC_PRIORITY_QUEUE_NUM >= 1) && (GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1)
+#define DEFN_RX_FLAG_LIST_1(n)								\
+		.rx_frag_list = &rx_frag_list##n##_que[PRIORITY_QUEUE1_RX_DESC_IDX],
+#else
+#define DEFN_RX_FLAG_LIST_1(n)
 #endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 1
-		}, {
-			.que_idx = GMAC_QUE_1,
-			.rx_desc_list = {
-				.buf = &rx_desc0_que[PRIORITY_QUEUE1_RX_DESC_IDX],
-				.len = MAIN_QUEUE_RX_DESC_COUNT,
-			},
-			.tx_desc_list = {
-				.buf = &tx_desc0_que[PRIORITY_QUEUE1_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 1
-			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE1_RX_DESC_IDX],
-#if GMAC_MULTIPLE_TX_PACKETS == 1
-			.tx_frag_list = {
-				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE1_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
-			.tx_frames = {
-				.buf = (uint32_t *)&tx_frame_list0_que[1 * NET_PKT_PER_QUE],
-				.len = NET_PKT_PER_QUE,
-			}
+#if (GMAC_PRIORITY_QUEUE_NUM >= 2) && (GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 2)
+#define DEFN_RX_FLAG_LIST_2(n)								\
+		.rx_frag_list = &rx_frag_list##n##_que[PRIORITY_QUEUE2_RX_DESC_IDX],
+#else
+#define DEFN_RX_FLAG_LIST_2(n)
 #endif
+#if (GMAC_PRIORITY_QUEUE_NUM >= 3) && (GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 3)
+#define DEFN_RX_FLAG_LIST_3(n)								\
+		.rx_frag_list = &rx_frag_list##n##_que[PRIORITY_QUEUE3_RX_DESC_IDX],
+#else
+#define DEFN_RX_FLAG_LIST_3(n)
 #endif
+#if (GMAC_PRIORITY_QUEUE_NUM >= 4) && (GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 4)
+#define DEFN_RX_FLAG_LIST_4(n)								\
+		.rx_frag_list = &rx_frag_list##n##_que[PRIORITY_QUEUE4_RX_DESC_IDX],
+#else
+#define DEFN_RX_FLAG_LIST_4(n)
 #endif
+#if (GMAC_PRIORITY_QUEUE_NUM >= 5) && (GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 5)
+#define DEFN_RX_FLAG_LIST_5(n)								\
+		.rx_frag_list = &rx_frag_list##n##_que[PRIORITY_QUEUE5_RX_DESC_IDX],
+#else
+#define DEFN_RX_FLAG_LIST_5(n)
 #endif
-#if GMAC_PRIORITY_QUEUE_NUM >= 2
-		}, {
-			.que_idx = GMAC_QUE_2,
-			.rx_desc_list = {
-				.buf = &rx_desc0_que[PRIORITY_QUEUE2_RX_DESC_IDX],
-				.len = MAIN_QUEUE_RX_DESC_COUNT,
-			},
-			.tx_desc_list = {
-				.buf = &tx_desc0_que[PRIORITY_QUEUE2_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 2
-			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE2_RX_DESC_IDX],
+
 #if GMAC_MULTIPLE_TX_PACKETS == 1
-			.tx_frag_list = {
-				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE2_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
+#define BUF_TX_FRAG_LIST_QUE(n, x)							\
+		(uint32_t *)&tx_frag_list##n##_que[PRIORITY_QUEUE##x##_TX_DESC_IDX]
+#define DEFN_TX_FLAG_LIST(n, x)								\
+		.tx_frag_list = {							\
+			.buf = BUF_TX_FRAG_LIST_QUE(n, x),				\
+			.len = MAIN_QUEUE_TX_DESC_COUNT,				\
+		},
+
 #if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
-			.tx_frames = {
-				.buf = (uint32_t *)&tx_frame_list0_que[2 * NET_PKT_PER_QUE],
-				.len = NET_PKT_PER_QUE,
-			}
-#endif
-#endif
+#define BUF_TX_FRAME_LIST_QUE (uint32_t *)&tx_frame_list##n##_que[x * NET_PKT_PER_QUE]
+#define DEFN_TX_FRAME_LIST(n, x)							\
+		.tx_frames = {								\
+			.buf = BUF_TX_FRAME_LIST_QUE,					\
+			.len = NET_PKT_PER_QUE,						\
+		},
+#else /* CONFIG_PTP_CLOCK_SAM_GMAC */
+#define DEFN_TX_FRAME_LIST(n, x)
+#endif /* CONFIG_PTP_CLOCK_SAM_GMAC */
+#else /*GMAC_MULTIPLE_TX_PACKETS*/
+#define DEFN_TX_FLAG_LIST(n, x)
+#define DEFN_TX_FRAME_LIST(n, x)
+#endif /*GMAC_MULTIPLE_TX_PACKETS*/
+
+#define BUF_RX_DESC_QUE(n, x) &rx_desc##n##_que[PRIORITY_QUEUE##x##_RX_DESC_IDX]
+#define BUF_TX_DESC_QUE(n, x) &tx_desc##n##_que[PRIORITY_QUEUE##x##_TX_DESC_IDX]
+#define DEFN_DATA_QUEUE_LIST(n, x)							\
+		{									\
+			.que_idx = GMAC_QUE_##x,					\
+			.rx_desc_list = {						\
+				.buf = BUF_RX_DESC_QUE(n, x),				\
+				.len = MAIN_QUEUE_RX_DESC_COUNT,			\
+			},								\
+			.tx_desc_list = {						\
+				.buf = BUF_TX_DESC_QUE(n, x),				\
+				.len = MAIN_QUEUE_TX_DESC_COUNT,			\
+			},								\
+			DEFN_RX_FLAG_LIST_##x(n)					\
+			DEFN_TX_FLAG_LIST(n, x)						\
+			DEFN_TX_FRAME_LIST(n, x)					\
+		},
+#define DEFN_DATA_QUEUE_LIST_0(n) DEFN_DATA_QUEUE_LIST(n, 0)
+#if GMAC_PRIORITY_QUEUE_NUM >= 1
+
+#define DEFN_DATA_QUEUE_LIST_1(n) DEFN_DATA_QUEUE_LIST(n, 1)
+#else
+#define DEFN_DATA_QUEUE_LIST_1(n)
 #endif
+#if GMAC_PRIORITY_QUEUE_NUM >= 2
+#define DEFN_DATA_QUEUE_LIST_2(n) DEFN_DATA_QUEUE_LIST(n, 2)
+#else
+#define DEFN_DATA_QUEUE_LIST_2(n)
 #endif
 #if GMAC_PRIORITY_QUEUE_NUM >= 3
-		}, {
-			.que_idx = GMAC_QUE_3,
-			.rx_desc_list = {
-				.buf = &rx_desc0_que[PRIORITY_QUEUE3_RX_DESC_IDX],
-				.len = MAIN_QUEUE_RX_DESC_COUNT,
-			},
-			.tx_desc_list = {
-				.buf = &tx_desc0_que[PRIORITY_QUEUE3_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 3
-			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE3_RX_DESC_IDX],
-#if GMAC_MULTIPLE_TX_PACKETS == 1
-			.tx_frag_list = {
-				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE3_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
-			.tx_frames = {
-				.buf = (uint32_t *)&tx_frame_list0_que[3 * NET_PKT_PER_QUE],
-				.len = NET_PKT_PER_QUE,
-			}
-#endif
-#endif
-#endif
+#define DEFN_DATA_QUEUE_LIST_3(n) DEFN_DATA_QUEUE_LIST(n, 3)
+#else
+#define DEFN_DATA_QUEUE_LIST_3(n)
 #endif
 #if GMAC_PRIORITY_QUEUE_NUM >= 4
-		}, {
-			.que_idx = GMAC_QUE_4,
-			.rx_desc_list = {
-				.buf = &rx_desc0_que[PRIORITY_QUEUE4_RX_DESC_IDX],
-				.len = MAIN_QUEUE_RX_DESC_COUNT,
-			},
-			.tx_desc_list = {
-				.buf = &tx_desc0_que[PRIORITY_QUEUE4_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 4
-			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE4_RX_DESC_IDX],
-#if GMAC_MULTIPLE_TX_PACKETS == 1
-			.tx_frag_list = {
-				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE4_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
-			.tx_frames = {
-				.buf = (uint32_t *)&tx_frame_list0_que[4 * NET_PKT_PER_QUE],
-				.len = NET_PKT_PER_QUE,
-			}
-#endif
-#endif
-#endif
+#define DEFN_DATA_QUEUE_LIST_4(n) DEFN_DATA_QUEUE_LIST(n, 4)
+#else
+#define DEFN_DATA_QUEUE_LIST_4(n)
 #endif
 #if GMAC_PRIORITY_QUEUE_NUM >= 5
-		}, {
-			.que_idx = GMAC_QUE_5,
-			.rx_desc_list = {
-				.buf = &rx_desc0_que[PRIORITY_QUEUE5_RX_DESC_IDX],
-				.len = MAIN_QUEUE_RX_DESC_COUNT,
-			},
-			.tx_desc_list = {
-				.buf = &tx_desc0_que[PRIORITY_QUEUE5_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if GMAC_ACTIVE_PRIORITY_QUEUE_NUM >= 5
-			.rx_frag_list = &rx_frag_list0_que[PRIORITY_QUEUE5_RX_DESC_IDX],
-#if GMAC_MULTIPLE_TX_PACKETS == 1
-			.tx_frag_list = {
-				.buf = (uint32_t *)&tx_frag_list0_que[PRIORITY_QUEUE5_TX_DESC_IDX],
-				.len = MAIN_QUEUE_TX_DESC_COUNT,
-			},
-#if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
-			.tx_frames = {
-				.buf = (uint32_t *)&tx_frame_list0_que[5 * NET_PKT_PER_QUE],
-				.len = NET_PKT_PER_QUE,
-			}
-#endif
-#endif
-#endif
-#endif
-		}
-	},
-};
-
-ETH_NET_DEVICE_DT_INST_DEFINE(0,
-		    eth_initialize, NULL, &eth0_data,
-		    &eth0_config, CONFIG_ETH_INIT_PRIORITY, &eth_api,
-		    GMAC_MTU);
+#define DEFN_DATA_QUEUE_LIST_5(n) DEFN_DATA_QUEUE_LIST(n, 5)
+#else
+#define DEFN_DATA_QUEUE_LIST_5(n)
+#endif
+#define SAM_GMAC_DATA_DEFN(n)								\
+		static struct eth_sam_dev_data eth##n##_data = {			\
+			.mac_addr = DT_INST_PROP_OR(n, local_mac_address, {0U}),	\
+			.queue_list = {							\
+				DEFN_DATA_QUEUE_LIST_0(n)				\
+				DEFN_DATA_QUEUE_LIST_1(n)				\
+				DEFN_DATA_QUEUE_LIST_2(n)				\
+				DEFN_DATA_QUEUE_LIST_3(n)				\
+				DEFN_DATA_QUEUE_LIST_4(n)				\
+				DEFN_DATA_QUEUE_LIST_5(n)				\
+			},								\
+		};
+
+#define SAM_GMAC_DT_INST_DEFN(n)							\
+		ETH_NET_DEVICE_DT_INST_DEFINE(n,					\
+					      eth_initialize, NULL, &eth##n##_data,	\
+					      &eth##n##_config,				\
+					      CONFIG_ETH_INIT_PRIORITY, &eth_api,	\
+					      GMAC_MTU);
 
 #if defined(CONFIG_PTP_CLOCK_SAM_GMAC)
 struct ptp_context {
 	const struct device *eth_dev;
 };
 
-static struct ptp_context ptp_gmac_0_context;
+#define SAM_GMAC_PTP_CONTEXT_DEFN(n) static struct ptp_context ptp_gmac_##n##_context;
 
 static int ptp_clock_sam_gmac_set(const struct device *dev,
 				  struct net_ptp_time *tm)
@@ -2370,20 +2321,42 @@ static DEVICE_API(ptp_clock, ptp_api) = {
 	.rate_adjust = ptp_clock_sam_gmac_rate_adjust,
 };
 
-static int ptp_gmac_init(const struct device *port)
-{
-	const struct device *const eth_dev = DEVICE_DT_INST_GET(0);
-	struct eth_sam_dev_data *dev_data = eth_dev->data;
-	struct ptp_context *ptp_context = port->data;
-
-	dev_data->ptp_clock = port;
-	ptp_context->eth_dev = eth_dev;
-
-	return 0;
-}
-
-DEVICE_DEFINE(gmac_ptp_clock_0, PTP_CLOCK_NAME, ptp_gmac_init,
-		NULL, &ptp_gmac_0_context, NULL, POST_KERNEL,
-		CONFIG_PTP_CLOCK_INIT_PRIORITY, &ptp_api);
+#define SAM_GMAC_PTP_INIT_DEFN(n)							\
+		static int ptp_gmac_##n##_init(const struct device *port)		\
+		{									\
+			const struct device *const eth_dev = DEVICE_DT_INST_GET(n);	\
+			struct eth_sam_dev_data *dev_data = eth_dev->data;		\
+			struct ptp_context *ptp_context = port->data;			\
+											\
+			dev_data->ptp_clock = port;					\
+			ptp_context->eth_dev = eth_dev;					\
+											\
+			return 0;							\
+		}
 
+#define SAM_GMAC_PTP_CLOCK_DEFN(n)							\
+		DEVICE_DEFINE(gmac_ptp_clock_##n, PTP_CLOCK_NAME, ptp_gmac_##n##_init,	\
+			NULL, &ptp_gmac_##n##_context, NULL, POST_KERNEL,		\
+			CONFIG_PTP_CLOCK_INIT_PRIORITY, &ptp_api);
+#else
+#define SAM_GMAC_PTP_CONTEXT_DEFN(n)
+#define SAM_GMAC_PTP_INIT_DEFN(n)
+#define SAM_GMAC_PTP_CLOCK_DEFN(n)
 #endif /* CONFIG_PTP_CLOCK_SAM_GMAC */
+
+#define ETH_SAM_GMAC_DEVICE(n)								\
+		SAM_GMAC_LISTS_DEFN(n)							\
+											\
+		SAM_GMAC_IRQ_CONFIG_DEFN(n)						\
+		SAM_GMAC_PINCTRL_DEFN(n)						\
+											\
+		SAM_GMAC_CFG_DEFN(n)							\
+		SAM_GMAC_DATA_DEFN(n)							\
+											\
+		SAM_GMAC_DT_INST_DEFN(n)						\
+											\
+		SAM_GMAC_PTP_CONTEXT_DEFN(n)						\
+		SAM_GMAC_PTP_INIT_DEFN(n)						\
+		SAM_GMAC_PTP_CLOCK_DEFN(n)
+
+DT_INST_FOREACH_STATUS_OKAY(ETH_SAM_GMAC_DEVICE)

From 493946f28d101140a134deeefe2188d6c1afa5b1 Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Thu, 5 Jun 2025 13:00:00 +0800
Subject: [PATCH 04/11] drivers: net: sam_gmac: update PHY connection type for
 multi instances

Add variable "phy_conn_type" to get and use the phy_connection_type from
DT for different GMAC instances.
Update the judgement on phy_connection_type for multi instances support.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c      | 15 ++++++++-------
 drivers/ethernet/eth_sam_gmac_priv.h |  1 +
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index b8d424693120b..5e128ccdd30c9 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -150,9 +150,6 @@ static inline void dcache_clean(uint32_t addr, uint32_t size)
 #define SAM_GMAC_PHY_CONNECTION_TYPE_MAX 2
 #endif
 
-BUILD_ASSERT(DT_INST_ENUM_IDX(0, phy_connection_type) <= SAM_GMAC_PHY_CONNECTION_TYPE_MAX,
-	     "Invalid PHY connection");
-
 /* RX descriptors list */
 #define DEFN_RX_DESC(n)									\
 		static struct gmac_desc rx_desc##n##_que[PRIORITY_QUEUE_RX_DESC_COUNT]	\
@@ -1001,7 +998,7 @@ static void gmac_setup_ptp_clock_divisors(Gmac *gmac)
 }
 #endif
 
-static int gmac_init(Gmac *gmac, uint32_t gmac_ncfgr_val)
+static int gmac_init(Gmac *gmac, uint32_t gmac_ncfgr_val, const struct eth_sam_dev_cfg *const cfg)
 {
 	int mck_divisor;
 
@@ -1028,7 +1025,7 @@ static int gmac_init(Gmac *gmac, uint32_t gmac_ncfgr_val)
 	gmac->GMAC_NCFGR = gmac_ncfgr_val | mck_divisor;
 
 	/* Default (RMII) is defined at atmel,gmac-common.yaml file */
-	switch (DT_INST_ENUM_IDX(0, phy_connection_type)) {
+	switch (cfg->phy_conn_type) {
 	case 0: /* mii */
 		gmac->GMAC_UR = 0x1;
 		break;
@@ -1041,7 +1038,7 @@ static int gmac_init(Gmac *gmac, uint32_t gmac_ncfgr_val)
 		break;
 #endif
 	default:
-		/* Build assert at top of file should catch this case */
+		/* Build assert in this file should catch this case */
 		LOG_ERR("The phy connection type is invalid");
 
 		return -EINVAL;
@@ -1796,7 +1793,7 @@ static void eth_iface_init(struct net_if *iface)
 #endif
 		| GMAC_NCFGR_RXCOEN  /* Receive Checksum Offload Enable */
 		| GMAC_MAX_FRAME_SIZE;
-	result = gmac_init(cfg->regs, gmac_ncfgr_val);
+	result = gmac_init(cfg->regs, gmac_ncfgr_val, cfg);
 	if (result < 0) {
 		LOG_ERR("%s Unable to initialize ETH driver", dev->name);
 		return;
@@ -2125,6 +2122,9 @@ static const struct ethernet_api eth_api = {
 #define CFG_CLK_DEFN(n)
 #endif
 #define SAM_GMAC_CFG_DEFN(n)								\
+		BUILD_ASSERT(DT_INST_ENUM_IDX(n, phy_connection_type) <=		\
+			     SAM_GMAC_PHY_CONNECTION_TYPE_MAX,				\
+			     "Invalid PHY connection");					\
 		static const struct eth_sam_dev_cfg eth##n##_config = {			\
 			.regs = (Gmac *)DT_REG_ADDR(DT_INST_PARENT(n)),			\
 			.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),			\
@@ -2132,6 +2132,7 @@ static const struct ethernet_api eth_api = {
 			.config_func = eth##n##_irq_config,				\
 			.phy_dev = DEVICE_DT_GET(DT_INST_PHANDLE(n, phy_handle)),	\
 			.num_queues = DT_INST_PROP(n, num_queues),			\
+			.phy_conn_type = DT_INST_ENUM_IDX(n, phy_connection_type),	\
 		};
 
 #define DEFN_RX_FLAG_LIST_0(n)								\
diff --git a/drivers/ethernet/eth_sam_gmac_priv.h b/drivers/ethernet/eth_sam_gmac_priv.h
index 1ce941631a8a1..12c298ac25bb1 100644
--- a/drivers/ethernet/eth_sam_gmac_priv.h
+++ b/drivers/ethernet/eth_sam_gmac_priv.h
@@ -276,6 +276,7 @@ struct eth_sam_dev_cfg {
 	void (*config_func)(void);
 	const struct device *phy_dev;
 	const uint8_t num_queues;
+	const uint8_t phy_conn_type;
 };
 
 /* Device run time data */

From 28d5df67a3d74ed93548863dd8be79f2b9a65bb5 Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Wed, 5 Nov 2025 11:42:03 +0800
Subject: [PATCH 05/11] drivers: net: sam_gmac: ref_clk_source for multi
 instances support

Add variable "ref_clk_source" to get and set the source for the GMAC
reference clock from DT for different GMAC instances.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c      | 3 ++-
 drivers/ethernet/eth_sam_gmac_priv.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index 5e128ccdd30c9..9eb253684d4d9 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -1044,7 +1044,7 @@ static int gmac_init(Gmac *gmac, uint32_t gmac_ncfgr_val, const struct eth_sam_d
 		return -EINVAL;
 	}
 #ifdef GMAC_UR_REFCLK_Msk
-	if (DT_INST_ENUM_IDX(0, ref_clk_source)) {
+	if (cfg->ref_clk_source == 1) { /* Source for the GMAC Reference Clock is EXTERNAL */
 		gmac->GMAC_UR |= GMAC_UR_REFCLK_Msk;
 	}
 #endif
@@ -2133,6 +2133,7 @@ static const struct ethernet_api eth_api = {
 			.phy_dev = DEVICE_DT_GET(DT_INST_PHANDLE(n, phy_handle)),	\
 			.num_queues = DT_INST_PROP(n, num_queues),			\
 			.phy_conn_type = DT_INST_ENUM_IDX(n, phy_connection_type),	\
+			.ref_clk_source = DT_INST_ENUM_IDX(n, ref_clk_source),		\
 		};
 
 #define DEFN_RX_FLAG_LIST_0(n)								\
diff --git a/drivers/ethernet/eth_sam_gmac_priv.h b/drivers/ethernet/eth_sam_gmac_priv.h
index 12c298ac25bb1..a40b247abf744 100644
--- a/drivers/ethernet/eth_sam_gmac_priv.h
+++ b/drivers/ethernet/eth_sam_gmac_priv.h
@@ -277,6 +277,7 @@ struct eth_sam_dev_cfg {
 	const struct device *phy_dev;
 	const uint8_t num_queues;
 	const uint8_t phy_conn_type;
+	const uint8_t ref_clk_source;
 };
 
 /* Device run time data */

From c511e1d4d7583ab82c135ce3e05961c9325e481a Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Thu, 5 Jun 2025 14:07:58 +0800
Subject: [PATCH 06/11] drivers: net: sam_gmac: remove run once check in
 eth_iface_init()

To allow every interface be initialized properly when there are more than
one instance, remove the static variable "init_done" which is used to make
the initialize procedure only be done once.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index 9eb253684d4d9..7c25411e7801e 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -1764,7 +1764,6 @@ static void eth_iface_init(struct net_if *iface)
 	const struct device *dev = net_if_get_device(iface);
 	struct eth_sam_dev_data *const dev_data = dev->data;
 	const struct eth_sam_dev_cfg *const cfg = dev->config;
-	static bool init_done;
 	uint32_t gmac_ncfgr_val;
 	int result;
 	int i;
@@ -1775,11 +1774,6 @@ static void eth_iface_init(struct net_if *iface)
 
 	ethernet_init(iface);
 
-	/* The rest of initialization should only be done once */
-	if (init_done) {
-		return;
-	}
-
 	/* Check the status of data caches */
 	dcache_is_enabled();
 
@@ -1872,8 +1866,6 @@ static void eth_iface_init(struct net_if *iface)
 	} else {
 		LOG_ERR("%s PHY device not ready", dev->name);
 	}
-
-	init_done = true;
 }
 
 static enum ethernet_hw_caps eth_sam_gmac_get_capabilities(const struct device *dev)

From a4728162c8b20904b298084774ab42b7e7aacb58 Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Thu, 26 Jun 2025 11:21:23 +0800
Subject: [PATCH 07/11] drivers: net: sam_gmac: remove getting max_frame_size
 from DT

As jumbo frame size is not supported by the networking subsystem, only
max_frame_size 1518 and 1536 can be used. The Frame size 1536 would
allow for packets with a vlan tag, so enable GMAC_NCFGR_MAXFS when
NET_VLAN is configured.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c              |  6 ++++--
 drivers/ethernet/eth_sam_gmac_priv.h         | 13 -------------
 dts/bindings/ethernet/atmel,gmac-common.yaml | 16 ----------------
 3 files changed, 4 insertions(+), 31 deletions(-)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index 7c25411e7801e..85f1f14492cea 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -1785,8 +1785,10 @@ static void eth_iface_init(struct net_if *iface)
 #ifdef CONFIG_SOC_SAMA7G54
 		| GMAC_NCFGR_DBW(1)  /* Data Bus Width. Must always be written to ‘1’ */
 #endif
-		| GMAC_NCFGR_RXCOEN  /* Receive Checksum Offload Enable */
-		| GMAC_MAX_FRAME_SIZE;
+#ifdef CONFIG_NET_VLAN
+		| GMAC_NCFGR_MAXFS
+#endif
+		| GMAC_NCFGR_RXCOEN; /* Receive Checksum Offload Enable */
 	result = gmac_init(cfg->regs, gmac_ncfgr_val, cfg);
 	if (result < 0) {
 		LOG_ERR("%s Unable to initialize ETH driver", dev->name);
diff --git a/drivers/ethernet/eth_sam_gmac_priv.h b/drivers/ethernet/eth_sam_gmac_priv.h
index a40b247abf744..9faf1f397fc84 100644
--- a/drivers/ethernet/eth_sam_gmac_priv.h
+++ b/drivers/ethernet/eth_sam_gmac_priv.h
@@ -202,19 +202,6 @@ enum queue_idx {
 	GMAC_QUE_5,  /** Priority queue 5 */
 };
 
-#if (DT_INST_PROP(0, max_frame_size) == 1518)
-	/* Maximum frame length is 1518 bytes */
-#define GMAC_MAX_FRAME_SIZE 0
-#elif (DT_INST_PROP(0, max_frame_size) == 1536)
-	/* Enable Max Frame Size of 1536 */
-#define GMAC_MAX_FRAME_SIZE GMAC_NCFGR_MAXFS
-#elif (DT_INST_PROP(0, max_frame_size) == 10240)
-	/* Jumbo Frame Enable */
-#define GMAC_MAX_FRAME_SIZE GMAC_NCFGR_JFRAME
-#else
-#error "GMAC_MAX_FRAME_SIZE is invalid, fix it at device tree."
-#endif
-
 /** Minimal ring buffer implementation */
 struct ring_buffer {
 	uint32_t *buf;
diff --git a/dts/bindings/ethernet/atmel,gmac-common.yaml b/dts/bindings/ethernet/atmel,gmac-common.yaml
index 1f6c7d529132d..dcd88eca734a2 100644
--- a/dts/bindings/ethernet/atmel,gmac-common.yaml
+++ b/dts/bindings/ethernet/atmel,gmac-common.yaml
@@ -16,22 +16,6 @@ properties:
     description: |
       Number of hardware TX and RX queues.
 
-  max-frame-size:
-    type: int
-    default: 1518
-    description: |
-      Maximum ethernet frame size.  The current ethernet frame sizes
-      supported by hardware are 1518, 1536 and 10240 (jumbo frames).  This
-      means that normally gmac will reject any frame above max-frame-size
-      value.  The default value is 1518, which represents an usual
-      IEEE 802.3 ethernet frame:
-
-        Ethernet Frame [ 14 MAC HEADER | 1500 MTU | 4 FCS ] = 1518 bytes
-
-      When using value 1536 it is possible extend ethernet MAC HEADER up
-      to 32 bytes.  The hardware have support to jumbo frames and it can be
-      enabled by selecting the value 10240.
-
   max-speed:
     type: int
     default: 100

From 937fc24d9b51b458236a24d9b809053ef915e20d Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Thu, 12 Jun 2025 10:15:01 +0800
Subject: [PATCH 08/11] drivers: net: sam_gmac: deprecate the 'mac-eeprom'
 option

Deprecate the 'ETH_SAM_GMAC_MAC_I2C_EEPROM' for the 'mac-eeprom' option,
Limite it to be used when there's only one activated GMAC instance.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/Kconfig.sam_gmac            | 5 +++--
 drivers/ethernet/eth_sam_gmac.c              | 4 ++++
 dts/bindings/ethernet/atmel,gmac-common.yaml | 2 +-
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/ethernet/Kconfig.sam_gmac b/drivers/ethernet/Kconfig.sam_gmac
index fed74b1ca40c2..777d4134ee9d3 100644
--- a/drivers/ethernet/Kconfig.sam_gmac
+++ b/drivers/ethernet/Kconfig.sam_gmac
@@ -73,9 +73,10 @@ config ETH_SAM_GMAC_BUF_RX_COUNT
 	  and the other being processed by the higher layer networking stack.
 
 config ETH_SAM_GMAC_MAC_I2C_EEPROM
-	bool "Read from an I2C EEPROM"
+	bool "Read from an I2C EEPROM [DEPRECATED]"
+	select DEPRECATED
 	help
-	  Read MAC address from an I2C EEPROM.
+	  Read MAC address from an I2C EEPROM. This option is deprecated.
 
 if ETH_SAM_GMAC_MAC_I2C_EEPROM
 
diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index 85f1f14492cea..ee43030d3f0c2 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -141,6 +141,10 @@ static inline void dcache_clean(uint32_t addr, uint32_t size)
 #endif
 #endif /* !CONFIG_NET_TEST */
 
+BUILD_ASSERT(!(DT_ANY_INST_HAS_PROP_STATUS_OKAY(mac_eeprom) &&
+	       (DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) > 1)),
+	     "Only support one activated instance get MAC address from EEPROM");
+
 /* if GMAC_UR_MIM_RGMII (new for sama7g5) is defined, the media interface mode
  * supported are: mii, rmii and gmii. Otherwise mii and rmii are supported.
  */
diff --git a/dts/bindings/ethernet/atmel,gmac-common.yaml b/dts/bindings/ethernet/atmel,gmac-common.yaml
index dcd88eca734a2..4784e5a9df5ed 100644
--- a/dts/bindings/ethernet/atmel,gmac-common.yaml
+++ b/dts/bindings/ethernet/atmel,gmac-common.yaml
@@ -26,7 +26,7 @@ properties:
 
   mac-eeprom:
     type: phandle
-    description: phandle to I2C eeprom device node.
+    description: phandle to I2C eeprom device node. This property is deprecated.
 
   phy-connection-type:
     default: "rmii"

From cd794c35d80eefc1dbc5c96fd6747ddd5a366faf Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Wed, 25 Jun 2025 09:52:35 +0800
Subject: [PATCH 09/11] drivers: net: sam_gmac: update random MAC addr for
 multi inst support

Add variable 'random_mac_addr' for 'zephyr,random-mac-address' from
device tree. Update generate_mac() to get random MAC address for each
GAMC interface with the 'zephyr,random-mac-address' property.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c      | 13 +++++++++----
 drivers/ethernet/eth_sam_gmac_priv.h |  1 +
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index ee43030d3f0c2..e3563612e6ea0 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -1716,12 +1716,15 @@ static void get_mac_addr_from_i2c_eeprom(uint8_t mac_addr[6])
 }
 #endif
 
-static void generate_mac(uint8_t mac_addr[6])
+static void generate_mac(uint8_t mac_addr[6], const struct eth_sam_dev_cfg *const cfg)
 {
 #if DT_INST_NODE_HAS_PROP(0, mac_eeprom)
+	ARG_UNUSED(cfg);
 	get_mac_addr_from_i2c_eeprom(mac_addr);
-#elif DT_INST_PROP(0, zephyr_random_mac_address)
-	gen_random_mac(mac_addr, ATMEL_OUI_B0, ATMEL_OUI_B1, ATMEL_OUI_B2);
+#else
+	if (cfg->random_mac_addr) {
+		gen_random_mac(mac_addr, ATMEL_OUI_B0, ATMEL_OUI_B1, ATMEL_OUI_B2);
+	}
 #endif
 }
 
@@ -1799,7 +1802,7 @@ static void eth_iface_init(struct net_if *iface)
 		return;
 	}
 
-	generate_mac(dev_data->mac_addr);
+	generate_mac(dev_data->mac_addr, cfg);
 
 	LOG_INF("%s MAC: %02x:%02x:%02x:%02x:%02x:%02x", dev->name,
 		dev_data->mac_addr[0], dev_data->mac_addr[1],
@@ -2119,6 +2122,7 @@ static const struct ethernet_api eth_api = {
 #else
 #define CFG_CLK_DEFN(n)
 #endif
+
 #define SAM_GMAC_CFG_DEFN(n)								\
 		BUILD_ASSERT(DT_INST_ENUM_IDX(n, phy_connection_type) <=		\
 			     SAM_GMAC_PHY_CONNECTION_TYPE_MAX,				\
@@ -2132,6 +2136,7 @@ static const struct ethernet_api eth_api = {
 			.num_queues = DT_INST_PROP(n, num_queues),			\
 			.phy_conn_type = DT_INST_ENUM_IDX(n, phy_connection_type),	\
 			.ref_clk_source = DT_INST_ENUM_IDX(n, ref_clk_source),		\
+			.random_mac_addr = DT_INST_PROP(n, zephyr_random_mac_address),	\
 		};
 
 #define DEFN_RX_FLAG_LIST_0(n)								\
diff --git a/drivers/ethernet/eth_sam_gmac_priv.h b/drivers/ethernet/eth_sam_gmac_priv.h
index 9faf1f397fc84..626eaaa561c82 100644
--- a/drivers/ethernet/eth_sam_gmac_priv.h
+++ b/drivers/ethernet/eth_sam_gmac_priv.h
@@ -265,6 +265,7 @@ struct eth_sam_dev_cfg {
 	const uint8_t num_queues;
 	const uint8_t phy_conn_type;
 	const uint8_t ref_clk_source;
+	const bool random_mac_addr;
 };
 
 /* Device run time data */

From dec5331c2aaf33ddc361f040112ffdb712363bd8 Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Thu, 26 Jun 2025 15:48:42 +0800
Subject: [PATCH 10/11] drivers: net: sam_gmac: add BUILD_ASSERT for checking
 GMAC_QUEUE_NUM

'GMAC_QUEUE_NUM' is a value of 'num-queues' for the first GMAC
instance getting from the device tree. It is used directly or
indirectly (by GMAC_PRIORITY_QUEUE_NUM) for defining and
initializing 'struct eth_sam_dev_data' with a value from Kconfig
(GMAC_ACTIVE_PRIORITY_QUEUE_NUM).

As there will be a big change for applying the corresponding
num-queues for each GMAC 'struct eth_sam_dev_data', here just
keep it as is. Adding the BUITD_ASSERT to make sure the array
queue_list[] is large enough for all GMAC instances.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 drivers/ethernet/eth_sam_gmac.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/ethernet/eth_sam_gmac.c b/drivers/ethernet/eth_sam_gmac.c
index e3563612e6ea0..defb4639b3006 100644
--- a/drivers/ethernet/eth_sam_gmac.c
+++ b/drivers/ethernet/eth_sam_gmac.c
@@ -2241,6 +2241,8 @@ static const struct ethernet_api eth_api = {
 #define DEFN_DATA_QUEUE_LIST_5(n)
 #endif
 #define SAM_GMAC_DATA_DEFN(n)								\
+		BUILD_ASSERT(GMAC_QUEUE_NUM >= DT_INST_PROP(n, num_queues),		\
+			     "The size of array queue_list[] is too small");		\
 		static struct eth_sam_dev_data eth##n##_data = {			\
 			.mac_addr = DT_INST_PROP_OR(n, local_mac_address, {0U}),	\
 			.queue_list = {							\

From 02c0820c0d1baa5b99aec55383efa7f7b1168de4 Mon Sep 17 00:00:00 2001
From: Tony Han <tony.han@microchip.com>
Date: Mon, 10 Nov 2025 16:15:34 +0800
Subject: [PATCH 11/11] dts: bindings: ethernet-controller: remove unused prop
 'max-speed'

The 'max-speed' property in atmel,gmac-common.yaml file is not used,
remove  it.

Signed-off-by: Tony Han <tony.han@microchip.com>
---
 dts/bindings/ethernet/atmel,gmac-common.yaml | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/dts/bindings/ethernet/atmel,gmac-common.yaml b/dts/bindings/ethernet/atmel,gmac-common.yaml
index 4784e5a9df5ed..1ae558e98387d 100644
--- a/dts/bindings/ethernet/atmel,gmac-common.yaml
+++ b/dts/bindings/ethernet/atmel,gmac-common.yaml
@@ -16,14 +16,6 @@ properties:
     description: |
       Number of hardware TX and RX queues.
 
-  max-speed:
-    type: int
-    default: 100
-    description: |
-      This specifies maximum speed in Mbit/s supported by the device.  The
-      gmac driver supports 10Mbit/s and 100Mbit/s.  Using 100, as default
-      value, enables driver to configure 10 and 100Mbit/s speeds.
-
   mac-eeprom:
     type: phandle
     description: phandle to I2C eeprom device node. This property is deprecated.