Simmerv

Simmerv is a virtual RISC-V processor and peripheral devices emulator project written in Rust and compilable to WebAssembly.

This is a substantially enhanced fork of Takahiro's riscv-rust original emulator. This fork is already far more complete and is working towards near 100% correctness. Ultimately, we also expect it to become substantially faster, but this work is delayed until this is sufficiently correct to run benchmarks and off-the-shelf Linux distributions.

Online Demo

You can run Linux on the emulator in your browser. Online demo is here

Screenshots

Features

• Emulate RISC-V RV64GC_Zba_Zicond processor and peripheral devices (virtio block device and a UART)
• Also runnable in browser with WebAssembly
• Runnable locally
• Debugger

Instructions/Features support status

• RV64IMAC
• RV64FD (PARTIALLY flags/rounding modes very lacking)
• RV64Zifencei
• RV64Zicsr
• RV64B (Zicond and Zba done)
• Svnapot
• CSR (mostly done)
• Sv39
• Sv48 (untested, but should work)
• Privileged instructions
• PMP (this is intensionally not implemented as it will negatively affect performance)

The emulator supports all instructions listed above but some

• Boots Buildroot and Debian Trixie
• Linux OpenSBI and legacy BBL boot support

Current Known Issues

• gdb, rustc, and Geekbench segfaults
• Ubuntu boot crashes and hangs
• Debian boot sees non-fatal crashes
• U-boot loads but hangs before hand-off

How to run Linux

$ cargo b -r --all
$ target/release/simmerv_cli ../resources/linux/opensbi/fw_payload.elf -f ../resources/linux/rootfs.img

How to run riscv-tests

$ ./run-riscv-tests.sh

How to import and use WebAssembly RISC-V emulator in a web browser

See wasm/web

How to install and use WebAssembly RISC-V emulator npm package

See wasm/npm

Links

Linux RISC-V port

Running 64-bit RISC-V Linux on QEMU

Specifications

• RISC-V ISA
• Virtio Device
• UART
• CLINT, PLIC (SiFive E31 Manual)
• SiFive Interrupt Cookbook