From 8a6ead5e72102de00127e31d90b5b1e74ca2f2c6 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 10 Jan 2024 19:00:05 +0100 Subject: [PATCH] chore: regenerate STM32_WPAN patches Signed-off-by: Frederic Pillon --- .../0001-chore-adapt-STM32_WPAN-sources.patch | 155 ++++++++---------- ...imeout-when-waiting-for-the-cmd_resp.patch | 10 +- ...ort-for-customize-app_conf_default.h.patch | 108 +++--------- ...-fix-TL_Evt_t-payload-size-for-reset.patch | 4 +- 4 files changed, 100 insertions(+), 177 deletions(-) diff --git a/extras/STM32_WPAN/0001-chore-adapt-STM32_WPAN-sources.patch b/extras/STM32_WPAN/0001-chore-adapt-STM32_WPAN-sources.patch index 6798e172..90daace9 100644 --- a/extras/STM32_WPAN/0001-chore-adapt-STM32_WPAN-sources.patch +++ b/extras/STM32_WPAN/0001-chore-adapt-STM32_WPAN-sources.patch @@ -1,22 +1,21 @@ -From 542e007fa5a1b53664d2efb5f01d67767123a357 Mon Sep 17 00:00:00 2001 +From 5587ff466e0276de186103d21e6a4e498820e49f Mon Sep 17 00:00:00 2001 From: Frederic Pillon -Date: Thu, 13 Jul 2023 17:08:05 +0200 +Date: Wed, 10 Jan 2024 18:16:01 +0100 Subject: [PATCH 1/4] chore: adapt STM32_WPAN sources Signed-off-by: Frederic Pillon --- - src/utility/STM32_WPAN/app_conf_default.h | 46 ++++++++++++++++----- - src/utility/STM32_WPAN/ble_bufsize.h | 7 ++++ + src/utility/STM32_WPAN/app_conf_default.h | 49 +++++++++++++++++++---- src/utility/STM32_WPAN/hw.h | 13 +++++- - src/utility/STM32_WPAN/hw_ipcc.c | 5 ++- - src/utility/STM32_WPAN/shci.c | 3 +- - src/utility/STM32_WPAN/shci_tl.c | 18 +++++++- - src/utility/STM32_WPAN/stm_list.c | 7 +++- - src/utility/STM32_WPAN/tl_mbox.c | 7 +++- - 8 files changed, 86 insertions(+), 20 deletions(-) + src/utility/STM32_WPAN/hw_ipcc.c | 4 +- + src/utility/STM32_WPAN/shci.c | 2 + + src/utility/STM32_WPAN/shci_tl.c | 17 ++++++++ + src/utility/STM32_WPAN/stm_list.c | 6 ++- + src/utility/STM32_WPAN/tl_mbox.c | 6 +++ + 7 files changed, 85 insertions(+), 12 deletions(-) diff --git a/src/utility/STM32_WPAN/app_conf_default.h b/src/utility/STM32_WPAN/app_conf_default.h -index 51bd33a..1c6dd91 100644 +index 846be3c..6c9beb3 100644 --- a/src/utility/STM32_WPAN/app_conf_default.h +++ b/src/utility/STM32_WPAN/app_conf_default.h @@ -1,9 +1,9 @@ @@ -31,22 +30,22 @@ index 51bd33a..1c6dd91 100644 ****************************************************************************** * @attention * -@@ -19,18 +19,38 @@ +@@ -19,18 +19,40 @@ /* USER CODE END Header */ /* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef APP_CONF_H -#define APP_CONF_H -- +#ifndef APP_CONF_DEFAULT_H +#define APP_CONF_DEFAULT_H + +#if 0 #include "hw.h" #include "hw_conf.h" #include "hw_if.h" #include "ble_bufsize.h" -- +#endif + /****************************************************************************** * Application Config ******************************************************************************/ @@ -74,75 +73,64 @@ index 51bd33a..1c6dd91 100644 /** * Define Secure Connections Support */ -@@ -104,7 +124,7 @@ +@@ -104,6 +126,7 @@ #define CFG_FW_SUBVERSION (1) #define CFG_FW_BRANCH (0) #define CFG_FW_BUILD (0) -- +#endif + /****************************************************************************** * BLE Stack - ******************************************************************************/ -@@ -152,13 +172,15 @@ - * Prepare Write List size in terms of number of packet - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set - */ --#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) -+// #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) -+#define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) - - /** - * Number of allocated memory blocks - * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set - */ --#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) -+//#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) -+#define CFG_BLE_MBLOCK_COUNT (0x79) - - /** - * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. -@@ -250,7 +272,7 @@ +@@ -250,7 +273,7 @@ * 0: LE Power Class 2-3 * other bits: complete with Options_extension flag */ -#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3) -+#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY) ++#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3) /** * BLE stack Options_extension flags to be configured with: -@@ -323,6 +345,7 @@ +@@ -292,7 +315,11 @@ + * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ - #define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_3) +-#define CFG_BLE_MAX_ADV_SET_NBR (8) ++#if defined(STM32WB15xx) ++ #define CFG_BLE_MAX_ADV_SET_NBR (3) ++#else ++ #define CFG_BLE_MAX_ADV_SET_NBR (8) ++#endif + + /* Maximum advertising data length (in bytes) + * Range: 31 .. 1650 with limitation: +@@ -301,7 +328,11 @@ + * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + +-#define CFG_BLE_MAX_ADV_DATA_LEN (207) ++#if defined(STM32WB15xx) ++ #define CFG_BLE_MAX_ADV_DATA_LEN (414) ++#else ++ #define CFG_BLE_MAX_ADV_DATA_LEN (207) ++#endif + + /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 +@@ -324,6 +355,7 @@ + + #define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_4) +#if 0 /****************************************************************************** * Transport Layer ******************************************************************************/ -@@ -658,4 +681,5 @@ typedef enum +@@ -659,4 +691,5 @@ typedef enum #define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR -#endif /*APP_CONF_H */ +#endif +#endif /*APP_CONF_DEFAULT_H */ -diff --git a/src/utility/STM32_WPAN/ble_bufsize.h b/src/utility/STM32_WPAN/ble_bufsize.h -index b9935c0..d4d2890 100644 ---- a/src/utility/STM32_WPAN/ble_bufsize.h -+++ b/src/utility/STM32_WPAN/ble_bufsize.h -@@ -75,6 +75,13 @@ - ((pw) + MAX(BLE_MEM_BLOCK_X_MTU(mtu, n_link), \ - BLE_MBLOCKS_SECURE_CONNECTIONS)) - -+/* -+ * BLE_DEFAULT_MBLOCKS_COUNT: default memory blocks count -+ */ -+#define BLE_DEFAULT_MBLOCKS_COUNT(n_link) \ -+ BLE_MBLOCKS_CALC(BLE_DEFAULT_PREP_WRITE_LIST_SIZE, \ -+ BLE_DEFAULT_MAX_ATT_MTU, n_link) -+ - /* - * BLE_FIXED_BUFFER_SIZE_BYTES: - * A part of the RAM, is dynamically allocated by initializing all the pointers diff --git a/src/utility/STM32_WPAN/hw.h b/src/utility/STM32_WPAN/hw.h index 651e1f1..1472a5e 100644 --- a/src/utility/STM32_WPAN/hw.h @@ -174,14 +162,13 @@ index 651e1f1..1472a5e 100644 void HW_IPCC_BLE_Init( void ); void HW_IPCC_BLE_SendCmd( void ); diff --git a/src/utility/STM32_WPAN/hw_ipcc.c b/src/utility/STM32_WPAN/hw_ipcc.c -index fd620b8..c730482 100644 +index fd620b8..3461cbe 100644 --- a/src/utility/STM32_WPAN/hw_ipcc.c +++ b/src/utility/STM32_WPAN/hw_ipcc.c -@@ -17,9 +17,9 @@ - ****************************************************************************** +@@ -18,8 +18,9 @@ */ /* USER CODE END Header */ -- + +#if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ -#include "app_common.h" @@ -189,38 +176,36 @@ index fd620b8..c730482 100644 #include "mbox_def.h" /* Global variables ---------------------------------------------------------*/ -@@ -667,3 +667,4 @@ static void HW_IPCC_TRACES_EvtHandler( void ) +@@ -667,3 +668,4 @@ static void HW_IPCC_TRACES_EvtHandler( void ) } __weak void HW_IPCC_TRACES_EvtNot( void ){}; +#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/shci.c b/src/utility/STM32_WPAN/shci.c -index eaa35d7..4525656 100644 +index 5c32555..40110f4 100644 --- a/src/utility/STM32_WPAN/shci.c +++ b/src/utility/STM32_WPAN/shci.c -@@ -16,7 +16,7 @@ - ****************************************************************************** +@@ -17,6 +17,7 @@ */ -- + +#if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" -@@ -739,3 +739,4 @@ SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) +@@ -759,3 +760,4 @@ SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) return (SHCI_Success); } +#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/shci_tl.c b/src/utility/STM32_WPAN/shci_tl.c -index 0f60430..e343809 100644 +index 0f60430..daa988c 100644 --- a/src/utility/STM32_WPAN/shci_tl.c +++ b/src/utility/STM32_WPAN/shci_tl.c -@@ -16,12 +16,13 @@ - ****************************************************************************** +@@ -17,11 +17,13 @@ */ -- + +#if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" @@ -231,7 +216,7 @@ index 0f60430..e343809 100644 /* Private typedef -----------------------------------------------------------*/ typedef enum -@@ -168,6 +169,20 @@ void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payl +@@ -168,6 +170,20 @@ void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payl return; } @@ -252,20 +237,19 @@ index 0f60430..e343809 100644 /* Private functions ---------------------------------------------------------*/ static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) { -@@ -250,3 +265,4 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) +@@ -250,3 +266,4 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) return; } +#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/stm_list.c b/src/utility/STM32_WPAN/stm_list.c -index 4c92864..4e8c364 100644 +index 4c92864..df6c215 100644 --- a/src/utility/STM32_WPAN/stm_list.c +++ b/src/utility/STM32_WPAN/stm_list.c -@@ -16,11 +16,13 @@ - ****************************************************************************** +@@ -17,10 +17,13 @@ */ -- + +#if defined(STM32WBxx) /****************************************************************************** * Include Files @@ -277,13 +261,13 @@ index 4c92864..4e8c364 100644 #include "stm_list.h" -@@ -204,3 +206,4 @@ void LST_get_prev_node (tListNode * ref_node, tListNode ** node) +@@ -204,3 +207,4 @@ void LST_get_prev_node (tListNode * ref_node, tListNode ** node) __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ } +#endif /* STM32WBxx */ diff --git a/src/utility/STM32_WPAN/tl_mbox.c b/src/utility/STM32_WPAN/tl_mbox.c -index 27a998a..1139316 100644 +index 27a998a..40c9679 100644 --- a/src/utility/STM32_WPAN/tl_mbox.c +++ b/src/utility/STM32_WPAN/tl_mbox.c @@ -16,6 +16,7 @@ @@ -294,19 +278,18 @@ index 27a998a..1139316 100644 /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" #include "hw.h" -@@ -51,9 +52,10 @@ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleLldTable_t TL_BleLldTable; +@@ -51,8 +52,10 @@ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleLldTable_t TL_BleLldTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_SysTable_t TL_SysTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_MemManagerTable_t TL_MemManagerTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_TracesTable_t TL_TracesTable; +#if 0 PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_Mac_802_15_4_t TL_Mac_802_15_4_Table; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_ZigbeeTable_t TL_Zigbee_Table; -- +#endif + /**< tables */ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode FreeBufQueue; - PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode TracesEvtQueue; -@@ -97,8 +99,10 @@ void TL_Init( void ) +@@ -97,8 +100,10 @@ void TL_Init( void ) TL_RefTable.p_sys_table = &TL_SysTable; TL_RefTable.p_mem_manager_table = &TL_MemManagerTable; TL_RefTable.p_traces_table = &TL_TracesTable; @@ -317,11 +300,11 @@ index 27a998a..1139316 100644 HW_IPCC_Init(); return; -@@ -846,3 +850,4 @@ static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) +@@ -846,3 +851,4 @@ static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) return; } +#endif /* STM32WBxx */ -- -2.38.0.windows.1 +2.34.1 diff --git a/extras/STM32_WPAN/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch b/extras/STM32_WPAN/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch index d147a37e..e234d198 100644 --- a/extras/STM32_WPAN/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch +++ b/extras/STM32_WPAN/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch @@ -1,4 +1,4 @@ -From 5d07a0e5c0463965f8cf8dde6076b5cf2c779e90 Mon Sep 17 00:00:00 2001 +From 2867f96057d7bd5b34cfc3395d78653856f9cc7c Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Thu, 13 Jul 2023 17:16:40 +0200 Subject: [PATCH 2/4] fix: include a timeout when waiting for the cmd_resp @@ -9,10 +9,10 @@ Signed-off-by: Frederic Pillon 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/utility/STM32_WPAN/shci_tl.c b/src/utility/STM32_WPAN/shci_tl.c -index e343809..6038025 100644 +index daa988c..25e1a21 100644 --- a/src/utility/STM32_WPAN/shci_tl.c +++ b/src/utility/STM32_WPAN/shci_tl.c -@@ -23,6 +23,7 @@ +@@ -24,6 +24,7 @@ #include "stm_list.h" #include "shci_tl.h" #include "stm32_def.h" @@ -20,7 +20,7 @@ index e343809..6038025 100644 /* Private typedef -----------------------------------------------------------*/ typedef enum -@@ -250,10 +251,11 @@ static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) +@@ -251,10 +252,11 @@ static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) /* Weak implementation ----------------------------------------------------------------*/ __WEAK void shci_cmd_resp_wait(uint32_t timeout) { @@ -37,5 +37,5 @@ index e343809..6038025 100644 } -- -2.38.0.windows.1 +2.34.1 diff --git a/extras/STM32_WPAN/0003-chore-add-support-for-customize-app_conf_default.h.patch b/extras/STM32_WPAN/0003-chore-add-support-for-customize-app_conf_default.h.patch index 93e3e80f..bd66679d 100644 --- a/extras/STM32_WPAN/0003-chore-add-support-for-customize-app_conf_default.h.patch +++ b/extras/STM32_WPAN/0003-chore-add-support-for-customize-app_conf_default.h.patch @@ -1,29 +1,29 @@ -From 370e1082edae9b69d50f824db85b5cbe3b786e79 Mon Sep 17 00:00:00 2001 +From ba3df1bd28eb49eab28a99fa88481f45fe565cbf Mon Sep 17 00:00:00 2001 From: Frederic Pillon -Date: Mon, 12 Dec 2022 17:29:27 +0100 +Date: Wed, 10 Jan 2024 18:45:17 +0100 Subject: [PATCH 3/4] chore: add support for customize app_conf_default.h Signed-off-by: Frederic Pillon --- - src/utility/STM32_WPAN/app_conf_default.h | 86 ++++++++++++++++----- - 1 file changed, 68 insertions(+), 18 deletions(-) + src/utility/STM32_WPAN/app_conf_default.h | 58 ++++++++++++++++++----- + 1 file changed, 45 insertions(+), 13 deletions(-) diff --git a/src/utility/STM32_WPAN/app_conf_default.h b/src/utility/STM32_WPAN/app_conf_default.h -index 1c6dd91..d39492e 100644 +index 6c9beb3..9509a0f 100644 --- a/src/utility/STM32_WPAN/app_conf_default.h +++ b/src/utility/STM32_WPAN/app_conf_default.h -@@ -48,7 +48,9 @@ +@@ -50,7 +50,9 @@ /** * Define Tx Power */ -#define CFG_TX_POWER (0x18) /* -0.15dBm */ +#ifndef CFG_TX_POWER -+ #define CFG_TX_POWER (0x18) /* -0.15dBm */ ++ #define CFG_TX_POWER (0x18) /* -0.15dBm */ +#endif #if 0 /** -@@ -132,13 +134,25 @@ +@@ -135,13 +137,25 @@ * Maximum number of simultaneous connections that the device will support. * Valid values are from 1 to 8 */ @@ -51,56 +51,22 @@ index 1c6dd91..d39492e 100644 /** * Maximum number of Attributes -@@ -147,13 +161,21 @@ +@@ -150,7 +164,13 @@ * Note that certain characteristics and relative descriptors are added automatically during device initialization * so this parameters should be 9 plus the number of user Attributes */ -#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 +#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES +#ifdef STM32WB15xx -+ #define CFG_BLE_NUM_GATT_ATTRIBUTES 30 ++ #define CFG_BLE_NUM_GATT_ATTRIBUTES 30 +#else -+ #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 ++ #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 +#endif +#endif /** * Maximum supported ATT_MTU size - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set - */ --#define CFG_BLE_MAX_ATT_MTU (156) -+#ifndef CFG_BLE_MAX_ATT_MTU -+ #define CFG_BLE_MAX_ATT_MTU (156) -+#endif - - /** - * Size of the storage area for Attribute values -@@ -166,14 +188,22 @@ - * The total amount of memory needed is the sum of the above quantities for each attribute. - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set - */ --#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) -+#ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE -+#ifdef STM32WB15xx -+ #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1290) -+#else -+ #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) -+#endif -+#endif - - /** - * Prepare Write List size in terms of number of packet - * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set - */ - // #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) --#define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) -+#ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE -+ #define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) -+#endif - - /** - * Number of allocated memory blocks -@@ -185,12 +215,16 @@ +@@ -186,12 +206,16 @@ /** * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. */ @@ -110,27 +76,27 @@ index 1c6dd91..d39492e 100644 +#endif /** - * Sleep clock accuracy in Slave mode (ppm value) + * Sleep clock accuracy in Peripheral mode (ppm value) */ --#define CFG_BLE_SLAVE_SCA 500 -+#ifndef CFG_BLE_SLAVE_SCA -+ #define CFG_BLE_SLAVE_SCA 500 +-#define CFG_BLE_PERIPHERAL_SCA 500 ++#ifndef CFG_BLE_PERIPHERAL_SCA ++ #define CFG_BLE_PERIPHERAL_SCA 500 +#endif /** - * Sleep clock accuracy in Master mode -@@ -203,7 +237,9 @@ + * Sleep clock accuracy in Central mode +@@ -204,7 +228,9 @@ * 6 : 21 ppm to 30 ppm * 7 : 0 ppm to 20 ppm */ --#define CFG_BLE_MASTER_SCA 0 -+#ifndef CFG_BLE_MASTER_SCA -+ #define CFG_BLE_MASTER_SCA 0 +-#define CFG_BLE_CENTRAL_SCA 0 ++#ifndef CFG_BLE_CENTRAL_SCA ++ #define CFG_BLE_CENTRAL_SCA 0 +#endif /** * LsSource -@@ -212,21 +248,27 @@ +@@ -213,21 +239,27 @@ * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config */ @@ -155,7 +121,7 @@ index 1c6dd91..d39492e 100644 +#endif /** - * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) + * Maximum duration of the connection event when the device is in Peripheral mode in units of 625/256 us (~2.44 us) */ -#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) +#ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH @@ -164,32 +130,6 @@ index 1c6dd91..d39492e 100644 /** * Viterbi Mode -@@ -314,7 +356,11 @@ - * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set - */ - --#define CFG_BLE_MAX_ADV_SET_NBR (8) -+#if defined(STM32WB15xx) -+ #define CFG_BLE_MAX_ADV_SET_NBR (3) -+#else -+ #define CFG_BLE_MAX_ADV_SET_NBR (8) -+#endif - - /* Maximum advertising data length (in bytes) - * Range: 31 .. 1650 with limitation: -@@ -323,7 +369,11 @@ - * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set - */ - --#define CFG_BLE_MAX_ADV_DATA_LEN (207) -+#if defined(STM32WB15xx) -+ #define CFG_BLE_MAX_ADV_DATA_LEN (414) -+#else -+ #define CFG_BLE_MAX_ADV_DATA_LEN (207) -+#endif - - /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. - * Range: -1280 .. 1280 -- -2.38.0.windows.1 +2.34.1 diff --git a/extras/STM32_WPAN/0004-fix-TL_Evt_t-payload-size-for-reset.patch b/extras/STM32_WPAN/0004-fix-TL_Evt_t-payload-size-for-reset.patch index 8ac978ea..035d4b99 100644 --- a/extras/STM32_WPAN/0004-fix-TL_Evt_t-payload-size-for-reset.patch +++ b/extras/STM32_WPAN/0004-fix-TL_Evt_t-payload-size-for-reset.patch @@ -1,4 +1,4 @@ -From b294edcaee311c15dfb307ea1298ae88b16a92bf Mon Sep 17 00:00:00 2001 +From a6ae9acf134d326f74ff04818b4e2c643c826b35 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 24 Jul 2023 10:55:20 +0200 Subject: [PATCH 4/4] fix: TL_Evt_t payload size for reset @@ -26,5 +26,5 @@ index 8e8c6cb..7452087 100644 typedef PACKED_STRUCT -- -2.38.0.windows.1 +2.34.1