Skip to content

Commit 04bfd79

Browse files
committed
chore: update STM32_WPAN from Cube version v1.18.0
Signed-off-by: Frederic Pillon <[email protected]>
1 parent 8a6ead5 commit 04bfd79

File tree

11 files changed

+119
-189
lines changed

11 files changed

+119
-189
lines changed

src/utility/STM32_WPAN/README.md

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11

22
## Source
33

4-
[STMicroelectronics/STM32CubeWB Release v1.17.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.17.0)
5-
- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.17.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode)
4+
[STMicroelectronics/STM32CubeWB Release v1.18.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.18.0)
5+
- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.18.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode)
66

src/utility/STM32_WPAN/app_conf_default.h

+40-113
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
11
/* USER CODE BEGIN Header */
22
/**
33
******************************************************************************
4-
* @file app_conf_default.h
4+
* @file app_conf.h
55
* @author MCD Application Team
6-
* @brief Default application configuration file for STM32WPAN Middleware.
6+
* @brief Application configuration file for STM32WPAN Middleware.
77
******************************************************************************
88
* @attention
99
*
@@ -19,40 +19,18 @@
1919
/* USER CODE END Header */
2020

2121
/* Define to prevent recursive inclusion -------------------------------------*/
22-
#ifndef APP_CONF_DEFAULT_H
23-
#define APP_CONF_DEFAULT_H
24-
#if 0
22+
#ifndef APP_CONF_H
23+
#define APP_CONF_H
24+
2525
#include "hw.h"
2626
#include "hw_conf.h"
2727
#include "hw_if.h"
2828
#include "ble_bufsize.h"
29-
#endif
29+
3030
/******************************************************************************
3131
* Application Config
3232
******************************************************************************/
3333

34-
/**< generic parameters ******************************************************/
35-
/* HCI related defines */
36-
37-
#define ACI_HAL_SET_TX_POWER_LEVEL 0xFC0F
38-
#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C
39-
#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D
40-
#define MAX_HCI_ACL_PACKET_SIZE (sizeof(TL_PacketHeader_t) + 5 + 251)
41-
#define HCI_RESET 0x0C03
42-
43-
#ifndef BLE_SHARED_MEM_BYTE_ORDER
44-
#define BLE_SHARED_MEM_BYTE_ORDER MSBFIRST
45-
#endif
46-
#define BLE_MODULE_SHARED_MEM_BUFFER_SIZE 128
47-
48-
/**
49-
* Define Tx Power
50-
*/
51-
#ifndef CFG_TX_POWER
52-
#define CFG_TX_POWER (0x18) /* -0.15dBm */
53-
#endif
54-
55-
#if 0
5634
/**
5735
* Define Secure Connections Support
5836
*/
@@ -83,14 +61,14 @@
8361
#define CFG_GAP_DEVICE_NAME_LENGTH (8)
8462

8563
/**
86-
* Identity root key used to derive LTK and CSRK
64+
* Identity root key used to derive IRK and DHK(Legacy)
8765
*/
88-
#define CFG_BLE_IRK {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0}
66+
#define CFG_BLE_IR {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0}
8967

9068
/**
91-
* Encryption root key used to derive LTK and CSRK
69+
* Encryption root key used to derive LTK(Legacy) and CSRK
9270
*/
93-
#define CFG_BLE_ERK {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21}
71+
#define CFG_BLE_ER {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21}
9472

9573
/**
9674
* SMPS supply
@@ -126,33 +104,21 @@
126104
#define CFG_FW_SUBVERSION (1)
127105
#define CFG_FW_BRANCH (0)
128106
#define CFG_FW_BUILD (0)
129-
#endif
107+
130108
/******************************************************************************
131109
* BLE Stack
132110
******************************************************************************/
133111
/**
134112
* Maximum number of simultaneous connections that the device will support.
135113
* Valid values are from 1 to 8
136114
*/
137-
#ifndef CFG_BLE_NUM_LINK
138-
#ifdef STM32WB15xx
139-
#define CFG_BLE_NUM_LINK 3
140-
#else
141-
#define CFG_BLE_NUM_LINK 8
142-
#endif
143-
#endif
115+
#define CFG_BLE_NUM_LINK 8
144116

145117
/**
146118
* Maximum number of Services that can be stored in the GATT database.
147119
* Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services
148120
*/
149-
#ifndef CFG_BLE_NUM_GATT_SERVICES
150-
#ifdef STM32WB15xx
151-
#define CFG_BLE_NUM_GATT_SERVICES 4
152-
#else
153-
#define CFG_BLE_NUM_GATT_SERVICES 8
154-
#endif
155-
#endif
121+
#define CFG_BLE_NUM_GATT_SERVICES 8
156122

157123
/**
158124
* Maximum number of Attributes
@@ -161,21 +127,13 @@
161127
* Note that certain characteristics and relative descriptors are added automatically during device initialization
162128
* so this parameters should be 9 plus the number of user Attributes
163129
*/
164-
#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES
165-
#ifdef STM32WB15xx
166-
#define CFG_BLE_NUM_GATT_ATTRIBUTES 30
167-
#else
168-
#define CFG_BLE_NUM_GATT_ATTRIBUTES 68
169-
#endif
170-
#endif
130+
#define CFG_BLE_NUM_GATT_ATTRIBUTES 68
171131

172132
/**
173133
* Maximum supported ATT_MTU size
174134
* This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
175135
*/
176-
#ifndef CFG_BLE_MAX_ATT_MTU
177-
#define CFG_BLE_MAX_ATT_MTU (156)
178-
#endif
136+
#define CFG_BLE_MAX_ATT_MTU (156)
179137

180138
/**
181139
* Size of the storage area for Attribute values
@@ -188,46 +146,32 @@
188146
* The total amount of memory needed is the sum of the above quantities for each attribute.
189147
* This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
190148
*/
191-
#ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE
192-
#ifdef STM32WB15xx
193-
#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1290)
194-
#else
195-
#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344)
196-
#endif
197-
#endif
149+
#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344)
198150

199151
/**
200152
* Prepare Write List size in terms of number of packet
201153
* This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
202154
*/
203-
// #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
204-
#ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE
205-
#define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A)
206-
#endif
155+
#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
207156

208157
/**
209158
* Number of allocated memory blocks
210159
* This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
211160
*/
212-
//#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
213-
#define CFG_BLE_MBLOCK_COUNT (0x79)
161+
#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
214162

215163
/**
216164
* Enable or disable the Extended Packet length feature. Valid values are 0 or 1.
217165
*/
218-
#ifndef CFG_BLE_DATA_LENGTH_EXTENSION
219-
#define CFG_BLE_DATA_LENGTH_EXTENSION 1
220-
#endif
166+
#define CFG_BLE_DATA_LENGTH_EXTENSION 1
221167

222168
/**
223-
* Sleep clock accuracy in Slave mode (ppm value)
169+
* Sleep clock accuracy in Peripheral mode (ppm value)
224170
*/
225-
#ifndef CFG_BLE_SLAVE_SCA
226-
#define CFG_BLE_SLAVE_SCA 500
227-
#endif
171+
#define CFG_BLE_PERIPHERAL_SCA 500
228172

229173
/**
230-
* Sleep clock accuracy in Master mode
174+
* Sleep clock accuracy in Central mode
231175
* 0 : 251 ppm to 500 ppm
232176
* 1 : 151 ppm to 250 ppm
233177
* 2 : 101 ppm to 150 ppm
@@ -237,9 +181,7 @@
237181
* 6 : 21 ppm to 30 ppm
238182
* 7 : 0 ppm to 20 ppm
239183
*/
240-
#ifndef CFG_BLE_MASTER_SCA
241-
#define CFG_BLE_MASTER_SCA 0
242-
#endif
184+
#define CFG_BLE_CENTRAL_SCA 0
243185

244186
/**
245187
* LsSource
@@ -248,27 +190,21 @@
248190
* - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module
249191
* - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config
250192
*/
251-
#ifndef CFG_BLE_LS_SOURCE
252-
#if defined(STM32WB5Mxx)
253-
#define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE)
254-
#else
255-
#define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE)
256-
#endif
193+
#if defined(STM32WB5Mxx)
194+
#define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE)
195+
#else
196+
#define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE)
257197
#endif
258198

259199
/**
260200
* Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us)
261201
*/
262-
#ifndef CFG_BLE_HSE_STARTUP_TIME
263-
#define CFG_BLE_HSE_STARTUP_TIME 0x148
264-
#endif
202+
#define CFG_BLE_HSE_STARTUP_TIME 0x148
265203

266204
/**
267-
* Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us)
205+
* Maximum duration of the connection event when the device is in Peripheral mode in units of 625/256 us (~2.44 us)
268206
*/
269-
#ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH
270-
#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF)
271-
#endif
207+
#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF)
272208

273209
/**
274210
* Viterbi Mode
@@ -314,7 +250,7 @@
314250
* 0: LE Power Class 2-3
315251
* other bits: complete with Options_extension flag
316252
*/
317-
#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY)
253+
#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3)
318254

319255
/**
320256
* BLE stack Options_extension flags to be configured with:
@@ -356,11 +292,7 @@
356292
* This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set
357293
*/
358294

359-
#if defined(STM32WB15xx)
360-
#define CFG_BLE_MAX_ADV_SET_NBR (3)
361-
#else
362-
#define CFG_BLE_MAX_ADV_SET_NBR (8)
363-
#endif
295+
#define CFG_BLE_MAX_ADV_SET_NBR (8)
364296

365297
/* Maximum advertising data length (in bytes)
366298
* Range: 31 .. 1650 with limitation:
@@ -369,11 +301,7 @@
369301
* This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set
370302
*/
371303

372-
#if defined(STM32WB15xx)
373-
#define CFG_BLE_MAX_ADV_DATA_LEN (414)
374-
#else
375-
#define CFG_BLE_MAX_ADV_DATA_LEN (207)
376-
#endif
304+
#define CFG_BLE_MAX_ADV_DATA_LEN (207)
377305

378306
/* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB.
379307
* Range: -1280 .. 1280
@@ -390,12 +318,12 @@
390318
/* BLE core version (16-bit signed integer).
391319
* - SHCI_C2_BLE_INIT_BLE_CORE_5_2
392320
* - SHCI_C2_BLE_INIT_BLE_CORE_5_3
393-
* which are used to set: 11(5.2), 12(5.3).
321+
* - SHCI_C2_BLE_INIT_BLE_CORE_5_4
322+
* which are used to set: 11(5.2), 12(5.3), 13(5.4).
394323
*/
395324

396-
#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_3)
325+
#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_4)
397326

398-
#if 0
399327
/******************************************************************************
400328
* Transport Layer
401329
******************************************************************************/
@@ -559,13 +487,13 @@ typedef enum
559487
* Debug
560488
******************************************************************************/
561489
/**
562-
* When set, this resets some hw resources to set the device in the same state than the power up
563-
* The FW resets only register that may prevent the FW to run properly
490+
* When set, this resets some hw resources to put the device in the same state as at power up.
491+
* It resets only register that may prevent the FW to run properly.
564492
*
565493
* This shall be set to 0 in a final product
566494
*
567495
*/
568-
#define CFG_HW_RESET_BY_FW 1
496+
#define CFG_HW_RESET_BY_FW 0
569497

570498
/**
571499
* keep debugger enabled while in any low power mode when set to 1
@@ -731,5 +659,4 @@ typedef enum
731659

732660
#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR
733661

734-
#endif
735-
#endif /*APP_CONF_DEFAULT_H */
662+
#endif /*APP_CONF_H */

src/utility/STM32_WPAN/ble_bufsize.h

-7
Original file line numberDiff line numberDiff line change
@@ -75,13 +75,6 @@
7575
((pw) + MAX(BLE_MEM_BLOCK_X_MTU(mtu, n_link), \
7676
BLE_MBLOCKS_SECURE_CONNECTIONS))
7777

78-
/*
79-
* BLE_DEFAULT_MBLOCKS_COUNT: default memory blocks count
80-
*/
81-
#define BLE_DEFAULT_MBLOCKS_COUNT(n_link) \
82-
BLE_MBLOCKS_CALC(BLE_DEFAULT_PREP_WRITE_LIST_SIZE, \
83-
BLE_DEFAULT_MAX_ATT_MTU, n_link)
84-
8578
/*
8679
* BLE_FIXED_BUFFER_SIZE_BYTES:
8780
* A part of the RAM, is dynamically allocated by initializing all the pointers

src/utility/STM32_WPAN/hw.h

+2-11
Original file line numberDiff line numberDiff line change
@@ -26,23 +26,14 @@ extern "C" {
2626
#endif
2727

2828
/* Includes ------------------------------------------------------------------*/
29-
#include "stm32_def.h"
30-
#include "stm32wbxx_ll_bus.h"
31-
#include "stm32wbxx_ll_exti.h"
32-
#include "stm32wbxx_ll_system.h"
33-
#include "stm32wbxx_ll_rcc.h"
34-
#include "stm32wbxx_ll_ipcc.h"
35-
#include "stm32wbxx_ll_cortex.h"
36-
#include "stm32wbxx_ll_utils.h"
37-
#include "stm32wbxx_ll_pwr.h"
3829

3930
/******************************************************************************
4031
* HW IPCC
4132
******************************************************************************/
4233
void HW_IPCC_Enable( void );
4334
void HW_IPCC_Init( void );
44-
#define HW_IPCC_Rx_Handler IPCC_C1_RX_IRQHandler
45-
#define HW_IPCC_Tx_Handler IPCC_C1_TX_IRQHandler
35+
void HW_IPCC_Rx_Handler( void );
36+
void HW_IPCC_Tx_Handler( void );
4637

4738
void HW_IPCC_BLE_Init( void );
4839
void HW_IPCC_BLE_SendCmd( void );

src/utility/STM32_WPAN/hw_ipcc.c

+2-3
Original file line numberDiff line numberDiff line change
@@ -17,9 +17,9 @@
1717
******************************************************************************
1818
*/
1919
/* USER CODE END Header */
20-
#if defined(STM32WBxx)
20+
2121
/* Includes ------------------------------------------------------------------*/
22-
#include "hw.h"
22+
#include "app_common.h"
2323
#include "mbox_def.h"
2424

2525
/* Global variables ---------------------------------------------------------*/
@@ -667,4 +667,3 @@ static void HW_IPCC_TRACES_EvtHandler( void )
667667
}
668668

669669
__weak void HW_IPCC_TRACES_EvtNot( void ){};
670-
#endif /* STM32WBxx */

0 commit comments

Comments
 (0)