chore: update STM32_WPAN from Cube version v1.18.0

Signed-off-by: Frederic Pillon <[email protected]>

Author: fpistm

src/utility/STM32_WPAN/README.md

@@ -1,6 +1,6 @@
 
 ## Source
 
-[STMicroelectronics/STM32CubeWB Release v1.17.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.17.0)
-- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.17.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode)
+[STMicroelectronics/STM32CubeWB Release v1.18.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.18.0)
+- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.18.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode)
 

src/utility/STM32_WPAN/app_conf_default.h

@@ -1,9 +1,9 @@
 /* USER CODE BEGIN Header */
 /**
   ******************************************************************************
-  * @file    app_conf_default.h
+  * @file    app_conf.h
   * @author  MCD Application Team
-  * @brief   Default application configuration file for STM32WPAN Middleware.
+  * @brief   Application configuration file for STM32WPAN Middleware.
   ******************************************************************************
   * @attention
   *
@@ -19,40 +19,18 @@
 /* USER CODE END Header */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef APP_CONF_DEFAULT_H
-#define APP_CONF_DEFAULT_H
-#if 0
+#ifndef APP_CONF_H
+#define APP_CONF_H
+
 #include "hw.h"
 #include "hw_conf.h"
 #include "hw_if.h"
 #include "ble_bufsize.h"
-#endif
+
 /******************************************************************************
  * Application Config
  ******************************************************************************/
 
-/**< generic parameters ******************************************************/
-/* HCI related defines */
-
-#define ACI_HAL_SET_TX_POWER_LEVEL 0xFC0F
-#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C
-#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D
-#define MAX_HCI_ACL_PACKET_SIZE (sizeof(TL_PacketHeader_t) + 5 + 251)
-#define HCI_RESET 0x0C03
-
-#ifndef BLE_SHARED_MEM_BYTE_ORDER
-  #define BLE_SHARED_MEM_BYTE_ORDER  MSBFIRST
-#endif
-#define BLE_MODULE_SHARED_MEM_BUFFER_SIZE 128
-
-/**
- * Define Tx Power
- */
-#ifndef CFG_TX_POWER
-  #define CFG_TX_POWER                      (0x18) /* -0.15dBm */
-#endif
-
-#if 0
 /**
  * Define Secure Connections Support
  */
@@ -83,14 +61,14 @@
 #define CFG_GAP_DEVICE_NAME_LENGTH      (8)
 
 /**
-*   Identity root key used to derive LTK and CSRK
+*   Identity root key used to derive IRK and DHK(Legacy)
 */
-#define CFG_BLE_IRK     {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0}
+#define CFG_BLE_IR     {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0}
 
 /**
-* Encryption root key used to derive LTK and CSRK
+* Encryption root key used to derive LTK(Legacy) and CSRK
 */
-#define CFG_BLE_ERK     {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21}
+#define CFG_BLE_ER     {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21}
 
 /**
  * SMPS supply
@@ -126,33 +104,21 @@
 #define CFG_FW_SUBVERSION         (1)
 #define CFG_FW_BRANCH             (0)
 #define CFG_FW_BUILD              (0)
-#endif
+
 /******************************************************************************
  * BLE Stack
  ******************************************************************************/
 /**
  * Maximum number of simultaneous connections that the device will support.
  * Valid values are from 1 to 8
  */
-#ifndef CFG_BLE_NUM_LINK
-#ifdef STM32WB15xx
-  #define CFG_BLE_NUM_LINK            3
-#else
-  #define CFG_BLE_NUM_LINK            8
-#endif
-#endif
+#define CFG_BLE_NUM_LINK            8
 
 /**
  * Maximum number of Services that can be stored in the GATT database.
  * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services
  */
-#ifndef CFG_BLE_NUM_GATT_SERVICES
-#ifdef STM32WB15xx
-  #define CFG_BLE_NUM_GATT_SERVICES   4
-#else
-  #define CFG_BLE_NUM_GATT_SERVICES   8
-#endif
-#endif
+#define CFG_BLE_NUM_GATT_SERVICES   8
 
 /**
  * Maximum number of Attributes
@@ -161,21 +127,13 @@
  * Note that certain characteristics and relative descriptors are added automatically during device initialization
  * so this parameters should be 9 plus the number of user Attributes
  */
-#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES
-#ifdef STM32WB15xx
-  #define CFG_BLE_NUM_GATT_ATTRIBUTES   30
-#else
-  #define CFG_BLE_NUM_GATT_ATTRIBUTES   68
-#endif
-#endif
+#define CFG_BLE_NUM_GATT_ATTRIBUTES 68
 
 /**
  * Maximum supported ATT_MTU size
  * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
  */
-#ifndef CFG_BLE_MAX_ATT_MTU
-  #define CFG_BLE_MAX_ATT_MTU             (156)
-#endif
+#define CFG_BLE_MAX_ATT_MTU             (156)
 
 /**
  * Size of the storage area for Attribute values
@@ -188,46 +146,32 @@
  *  The total amount of memory needed is the sum of the above quantities for each attribute.
  * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
  */
-#ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE
-#ifdef STM32WB15xx
-  #define CFG_BLE_ATT_VALUE_ARRAY_SIZE    (1290)
-#else
-  #define CFG_BLE_ATT_VALUE_ARRAY_SIZE    (1344)
-#endif
-#endif
+#define CFG_BLE_ATT_VALUE_ARRAY_SIZE    (1344)
 
 /**
  * Prepare Write List size in terms of number of packet
  * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
  */
-// #define CFG_BLE_PREPARE_WRITE_LIST_SIZE         BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
-#ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE
-  #define CFG_BLE_PREPARE_WRITE_LIST_SIZE         (0x3A)
-#endif
+#define CFG_BLE_PREPARE_WRITE_LIST_SIZE         BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
 
 /**
  * Number of allocated memory blocks
  * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set
  */
-//#define CFG_BLE_MBLOCK_COUNT            (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
-#define CFG_BLE_MBLOCK_COUNT              (0x79)
+#define CFG_BLE_MBLOCK_COUNT            (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
 
 /**
  * Enable or disable the Extended Packet length feature. Valid values are 0 or 1.
  */
-#ifndef CFG_BLE_DATA_LENGTH_EXTENSION
-  #define CFG_BLE_DATA_LENGTH_EXTENSION   1
-#endif
+#define CFG_BLE_DATA_LENGTH_EXTENSION   1
 
 /**
- * Sleep clock accuracy in Slave mode (ppm value)
+ * Sleep clock accuracy in Peripheral mode (ppm value)
  */
-#ifndef CFG_BLE_SLAVE_SCA
-  #define CFG_BLE_SLAVE_SCA   500
-#endif
+#define CFG_BLE_PERIPHERAL_SCA   500
 
 /**
- * Sleep clock accuracy in Master mode
+ * Sleep clock accuracy in Central mode
  * 0 : 251 ppm to 500 ppm
  * 1 : 151 ppm to 250 ppm
  * 2 : 101 ppm to 150 ppm
@@ -237,9 +181,7 @@
  * 6 : 21 ppm to 30 ppm
  * 7 : 0 ppm to 20 ppm
  */
-#ifndef CFG_BLE_MASTER_SCA
-  #define CFG_BLE_MASTER_SCA   0
-#endif
+#define CFG_BLE_CENTRAL_SCA   0
 
 /**
  * LsSource
@@ -248,27 +190,21 @@
  * - bit 1:   1: STM32WB5M Module device                             0: Other devices as STM32WBxx SOC, STM32WB1M module
  * - bit 2:   1: HSE/1024 Clock config                               0: LSE Clock config
  */
-#ifndef CFG_BLE_LS_SOURCE
-  #if defined(STM32WB5Mxx)
-    #define CFG_BLE_LS_SOURCE  (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE)
-  #else
-    #define CFG_BLE_LS_SOURCE  (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE)
-  #endif
+#if defined(STM32WB5Mxx)
+  #define CFG_BLE_LS_SOURCE  (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE)
+#else
+  #define CFG_BLE_LS_SOURCE  (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE)
 #endif
 
 /**
  * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us)
  */
-#ifndef CFG_BLE_HSE_STARTUP_TIME
-  #define CFG_BLE_HSE_STARTUP_TIME  0x148
-#endif
+#define CFG_BLE_HSE_STARTUP_TIME  0x148
 
 /**
- * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us)
+ * Maximum duration of the connection event when the device is in Peripheral mode in units of 625/256 us (~2.44 us)
  */
-#ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH
-  #define CFG_BLE_MAX_CONN_EVENT_LENGTH  (0xFFFFFFFF)
-#endif
+#define CFG_BLE_MAX_CONN_EVENT_LENGTH  (0xFFFFFFFF)
 
 /**
  * Viterbi Mode
@@ -314,7 +250,7 @@
  *          0: LE Power Class 2-3
  * other bits: complete with Options_extension flag
  */
-#define CFG_BLE_OPTIONS  (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY)
+#define CFG_BLE_OPTIONS  (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3)
 
 /**
  * BLE stack Options_extension flags to be configured with:
@@ -356,11 +292,7 @@
  * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set
  */
 
-#if defined(STM32WB15xx)
-  #define CFG_BLE_MAX_ADV_SET_NBR     (3)
-#else
-  #define CFG_BLE_MAX_ADV_SET_NBR     (8)
-#endif
+#define CFG_BLE_MAX_ADV_SET_NBR     (8)
 
  /* Maximum advertising data length (in bytes)
  * Range: 31 .. 1650 with limitation:
@@ -369,11 +301,7 @@
  * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set
  */
 
-#if defined(STM32WB15xx)
-  #define CFG_BLE_MAX_ADV_DATA_LEN    (414)
-#else
-  #define CFG_BLE_MAX_ADV_DATA_LEN    (207)
-#endif
+#define CFG_BLE_MAX_ADV_DATA_LEN    (207)
 
  /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB.
   * Range: -1280 .. 1280
@@ -390,12 +318,12 @@
   /* BLE core version (16-bit signed integer).
    * - SHCI_C2_BLE_INIT_BLE_CORE_5_2
    * - SHCI_C2_BLE_INIT_BLE_CORE_5_3
-   * which are used to set: 11(5.2), 12(5.3).
+   * - SHCI_C2_BLE_INIT_BLE_CORE_5_4
+   * which are used to set: 11(5.2), 12(5.3), 13(5.4).
    */
 
-#define CFG_BLE_CORE_VERSION   (SHCI_C2_BLE_INIT_BLE_CORE_5_3)
+#define CFG_BLE_CORE_VERSION   (SHCI_C2_BLE_INIT_BLE_CORE_5_4)
 
-#if 0
 /******************************************************************************
  * Transport Layer
  ******************************************************************************/
@@ -559,13 +487,13 @@ typedef enum
  * Debug
  ******************************************************************************/
 /**
- * When set, this resets some hw resources to set the device in the same state than the power up
- * The FW resets only register that may prevent the FW to run properly
+ * When set, this resets some hw resources to put the device in the same state as at power up.
+ * It resets only register that may prevent the FW to run properly.
  *
  * This shall be set to 0 in a final product
  *
  */
-#define CFG_HW_RESET_BY_FW         1
+#define CFG_HW_RESET_BY_FW         0
 
 /**
  * keep debugger enabled while in any low power mode when set to 1
@@ -731,5 +659,4 @@ typedef enum
 
 #define CFG_OTP_END_ADRESS      OTP_AREA_END_ADDR
 
-#endif
-#endif /*APP_CONF_DEFAULT_H */
+#endif /*APP_CONF_H */

src/utility/STM32_WPAN/ble_bufsize.h

@@ -75,13 +75,6 @@
           ((pw) + MAX(BLE_MEM_BLOCK_X_MTU(mtu, n_link), \
                       BLE_MBLOCKS_SECURE_CONNECTIONS))
 
-/*
- * BLE_DEFAULT_MBLOCKS_COUNT: default memory blocks count
- */
-#define BLE_DEFAULT_MBLOCKS_COUNT(n_link) \
-          BLE_MBLOCKS_CALC(BLE_DEFAULT_PREP_WRITE_LIST_SIZE, \
-                           BLE_DEFAULT_MAX_ATT_MTU, n_link)
-
 /*
  * BLE_FIXED_BUFFER_SIZE_BYTES:
  * A part of the RAM, is dynamically allocated by initializing all the pointers

src/utility/STM32_WPAN/hw.h

@@ -26,23 +26,14 @@ extern "C" {
 #endif
 
   /* Includes ------------------------------------------------------------------*/
-#include "stm32_def.h"
-#include "stm32wbxx_ll_bus.h"
-#include "stm32wbxx_ll_exti.h"
-#include "stm32wbxx_ll_system.h"
-#include "stm32wbxx_ll_rcc.h"
-#include "stm32wbxx_ll_ipcc.h"
-#include "stm32wbxx_ll_cortex.h"
-#include "stm32wbxx_ll_utils.h"
-#include "stm32wbxx_ll_pwr.h"
 
   /******************************************************************************
    * HW IPCC
    ******************************************************************************/
   void HW_IPCC_Enable( void );
   void HW_IPCC_Init( void );
-#define HW_IPCC_Rx_Handler IPCC_C1_RX_IRQHandler
-#define HW_IPCC_Tx_Handler IPCC_C1_TX_IRQHandler
+  void HW_IPCC_Rx_Handler( void );
+  void HW_IPCC_Tx_Handler( void );
 
   void HW_IPCC_BLE_Init( void );
   void HW_IPCC_BLE_SendCmd( void );

src/utility/STM32_WPAN/hw_ipcc.c

@@ -17,9 +17,9 @@
   ******************************************************************************
   */
 /* USER CODE END Header */
-#if defined(STM32WBxx)
+
 /* Includes ------------------------------------------------------------------*/
-#include "hw.h"
+#include "app_common.h"
 #include "mbox_def.h"
 
 /* Global variables ---------------------------------------------------------*/
@@ -667,4 +667,3 @@ static void HW_IPCC_TRACES_EvtHandler( void )
 }
 
 __weak void HW_IPCC_TRACES_EvtNot( void ){};
-#endif /* STM32WBxx */