From 06e461fb97e1d134b98443479bb7c8bc0fd704ae Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Tue, 29 Apr 2025 10:09:53 +0200 Subject: [PATCH] fix(g0): USB STM32G0B0xx configuration Fixes #2720. Signed-off-by: Frederic Pillon --- libraries/USBDevice/inc/usbd_conf.h | 2 +- variants/STM32G0xx/G0B0CET/generic_clock.c | 13 ++++++++++--- variants/STM32G0xx/G0B0RET/generic_clock.c | 13 ++++++++++--- variants/STM32G0xx/G0B0VET/generic_clock.c | 13 ++++++++++--- 4 files changed, 31 insertions(+), 10 deletions(-) diff --git a/libraries/USBDevice/inc/usbd_conf.h b/libraries/USBDevice/inc/usbd_conf.h index 14189cff20..a6bac515dd 100644 --- a/libraries/USBDevice/inc/usbd_conf.h +++ b/libraries/USBDevice/inc/usbd_conf.h @@ -71,7 +71,7 @@ extern "C" { #define USB_WKUP_IRQHandler USB_FS_WKUP_IRQHandler #endif #endif -#elif defined(STM32G0xx) +#elif defined(STM32G0B1xx) || defined(STM32G0C1xx) #define USB_IRQn USB_UCPD1_2_IRQn #define USB_IRQHandler USB_UCPD1_2_IRQHandler #elif defined(STM32C0xx) || defined(STM32H5xx) || defined(STM32U0xx) diff --git a/variants/STM32G0xx/G0B0CET/generic_clock.c b/variants/STM32G0xx/G0B0CET/generic_clock.c index 879550021d..6099312c0a 100644 --- a/variants/STM32G0xx/G0B0CET/generic_clock.c +++ b/variants/STM32G0xx/G0B0CET/generic_clock.c @@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; /** Configure the main internal regulator output voltage */ @@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; - RCC_OscInitStruct.PLL.PLLN = 9; + RCC_OscInitStruct.PLL.PLLN = 12; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); } } diff --git a/variants/STM32G0xx/G0B0RET/generic_clock.c b/variants/STM32G0xx/G0B0RET/generic_clock.c index 700dc8bcb4..cbeccfbdbe 100644 --- a/variants/STM32G0xx/G0B0RET/generic_clock.c +++ b/variants/STM32G0xx/G0B0RET/generic_clock.c @@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; /** Configure the main internal regulator output voltage */ @@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; - RCC_OscInitStruct.PLL.PLLN = 9; + RCC_OscInitStruct.PLL.PLLN = 12; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); } } diff --git a/variants/STM32G0xx/G0B0VET/generic_clock.c b/variants/STM32G0xx/G0B0VET/generic_clock.c index 7f53a17a13..742f699b19 100644 --- a/variants/STM32G0xx/G0B0VET/generic_clock.c +++ b/variants/STM32G0xx/G0B0VET/generic_clock.c @@ -22,6 +22,7 @@ WEAK void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; /** Configure the main internal regulator output voltage */ @@ -37,9 +38,9 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; - RCC_OscInitStruct.PLL.PLLN = 9; + RCC_OscInitStruct.PLL.PLLN = 12; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV3; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -53,7 +54,13 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); } }