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Merge pull request #2735 from showengineer/main
Add NUCLEO-C092RC variant
2 parents fba4da4 + 159f6b9 commit cb5742d

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‎README.md

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Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
129129
| :----: | :-------: | ---- | :-----: | :---- |
130130
| :green_heart: | STM32C031C6 | [Nucleo C031C6](https://www.st.com/en/evaluation-tools/nucleo-c031c6.html) | *2.5.0* | |
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| :green_heart: | STM32C071RB | [Nucleo C071RB](https://www.st.com/en/evaluation-tools/nucleo-c071rb.html) | *2.9.0* | |
132+
| :yellow_heart: | STM32C092RC | [Nucleo C092RC](https://www.st.com/en/evaluation-tools/nucleo-c092rc.html)| **2.11.0** | |
132133
| :green_heart: | STM32F030R8 | [Nucleo F030R8](http://www.st.com/en/evaluation-tools/nucleo-f030r8.html) | *0.2.0* | |
133134
| :green_heart: | STM32F070RB | [Nucleo F070RB](http://www.st.com/en/evaluation-tools/nucleo-f070rb.html) | *2.0.0* | |
134135
| :green_heart: | STM32F072RB | [Nucleo F072RB](http://www.st.com/en/evaluation-tools/nucleo-f072rb.html) | *1.9.0* | |
@@ -224,6 +225,9 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
224225
| :green_heart: | STM32C031F4<br>STM32C031F6 | Generic Board | *2.6.0* | |
225226
| :yellow_heart: | STM32C071G8<br>STM32C071GB | Generic Board | **2.11.0** | |
226227
| :green_heart: | STM32C071R8<br>STM32C071RB | Generic Board | *2.9.0* | |
228+
| :yellow_heart: | STM32C092CBT | Generic Board | **2.11.0** | |
229+
| :yellow_heart: | STM32C092RBT<br>STM32C092RCT | Generic Board | **2.11.0** | |
230+
| :yellow_heart: | STM32C092RCI | Generic Board | **2.11.0** | |
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### Generic STM32F0 boards
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‎boards.txt

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Original file line numberDiff line numberDiff line change
@@ -492,6 +492,20 @@ Nucleo_64.menu.pnum.NUCLEO_C071RB.build.st_extra_flags=-D{build.product_line} {b
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Nucleo_64.menu.pnum.NUCLEO_C071RB.openocd.target=stm32c0x
493493
Nucleo_64.menu.pnum.NUCLEO_C071RB.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd
494494

495+
# NUCLEO_C092RC board
496+
Nucleo_64.menu.pnum.NUCLEO_C092RC=Nucleo C092RC
497+
Nucleo_64.menu.pnum.NUCLEO_C092RC.node="NOD_C092RC"
498+
Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_size=262144
499+
Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_data_size=30720
500+
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.mcu=cortex-m0plus
501+
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.board=NUCLEO_C092RC
502+
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.series=STM32C0xx
503+
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.product_line=STM32C092xx
504+
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
505+
Nucleo_64.menu.pnum.NUCLEO_C092RC.build.st_extra_flags=-DSTM32C092xx {build.xSerial} -D__CORTEX_SC=0
506+
Nucleo_64.menu.pnum.NUCLEO_C092RC.openocd.target=stm32c0x
507+
Nucleo_64.menu.pnum.NUCLEO_C092RC.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
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495509
# NUCLEO_F030R8 board
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Nucleo_64.menu.pnum.NUCLEO_F030R8=Nucleo F030R8
497511
Nucleo_64.menu.pnum.NUCLEO_F030R8.node="NODE_F030R8,NUCLEO"
@@ -1834,6 +1848,42 @@ GenC0.menu.pnum.GENERIC_C071RBTX.build.product_line=STM32C071xx
18341848
GenC0.menu.pnum.GENERIC_C071RBTX.build.variant=STM32C0xx/C071R(8-B)T
18351849
GenC0.menu.pnum.GENERIC_C071RBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd
18361850

1851+
# Generic C092CBTx
1852+
GenC0.menu.pnum.GENERIC_C092CBTX=Generic C092CBTx
1853+
GenC0.menu.pnum.GENERIC_C092CBTX.upload.maximum_size=131072
1854+
GenC0.menu.pnum.GENERIC_C092CBTX.upload.maximum_data_size=30720
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GenC0.menu.pnum.GENERIC_C092CBTX.build.board=GENERIC_C092CBTX
1856+
GenC0.menu.pnum.GENERIC_C092CBTX.build.product_line=STM32C092xx
1857+
GenC0.menu.pnum.GENERIC_C092CBTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
1858+
GenC0.menu.pnum.GENERIC_C092CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
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1860+
# Generic C092RBTx
1861+
GenC0.menu.pnum.GENERIC_C092RBTX=Generic C092RBTx
1862+
GenC0.menu.pnum.GENERIC_C092RBTX.upload.maximum_size=131072
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GenC0.menu.pnum.GENERIC_C092RBTX.upload.maximum_data_size=30720
1864+
GenC0.menu.pnum.GENERIC_C092RBTX.build.board=GENERIC_C092RBTX
1865+
GenC0.menu.pnum.GENERIC_C092RBTX.build.product_line=STM32C092xx
1866+
GenC0.menu.pnum.GENERIC_C092RBTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
1867+
GenC0.menu.pnum.GENERIC_C092RBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
1868+
1869+
# Generic C092RCIx
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GenC0.menu.pnum.GENERIC_C092RCIX=Generic C092RCIx
1871+
GenC0.menu.pnum.GENERIC_C092RCIX.upload.maximum_size=262144
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GenC0.menu.pnum.GENERIC_C092RCIX.upload.maximum_data_size=30720
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GenC0.menu.pnum.GENERIC_C092RCIX.build.board=GENERIC_C092RCIX
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GenC0.menu.pnum.GENERIC_C092RCIX.build.product_line=STM32C092xx
1875+
GenC0.menu.pnum.GENERIC_C092RCIX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
1876+
GenC0.menu.pnum.GENERIC_C092RCIX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
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# Generic C092RCTx
1879+
GenC0.menu.pnum.GENERIC_C092RCTX=Generic C092RCTx
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GenC0.menu.pnum.GENERIC_C092RCTX.upload.maximum_size=262144
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GenC0.menu.pnum.GENERIC_C092RCTX.upload.maximum_data_size=30720
1882+
GenC0.menu.pnum.GENERIC_C092RCTX.build.board=GENERIC_C092RCTX
1883+
GenC0.menu.pnum.GENERIC_C092RCTX.build.product_line=STM32C092xx
1884+
GenC0.menu.pnum.GENERIC_C092RCTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
1885+
GenC0.menu.pnum.GENERIC_C092RCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
1886+
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# Upload menu
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GenC0.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
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GenC0.menu.upload_method.swdMethod.upload.protocol=swd

‎libraries/SrcWrapper/inc/stm32_def.h

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@@ -218,6 +218,11 @@ __STATIC_INLINE void LL_RTC_SetBinMixBCDU(RTC_TypeDef *RTCx, uint32_t BinMixBcdU
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#define GPIO_AF1_SPI1 STM_PIN_AFNUM_MASK
219219
#endif
220220

221+
#if defined(STM32C0xx) && defined(USART3) && !defined(GPIO_AF7_USART3)
222+
#define GPIO_AF7_USART3 ((uint8_t)0x07)
223+
#endif // STM32C0xx && !defined(USART3)
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/**
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* Libc porting layers
223228
*/

‎libraries/SrcWrapper/inc/uart.h

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@@ -121,7 +121,7 @@ struct serial_s {
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#define USART3_IRQn USART3_4_IRQn
122122
#define USART3_IRQHandler USART3_4_IRQHandler
123123
#endif /* STM32F091xC || STM32F098xx */
124-
#elif defined(STM32G0xx)
124+
#elif defined(STM32G0xx) || defined(STM32C0xx)
125125
#if defined(LPUART2_BASE)
126126
#define USART3_IRQn USART3_4_5_6_LPUART1_IRQn
127127
#define USART3_IRQHandler USART3_4_5_6_LPUART1_IRQHandler
@@ -153,7 +153,7 @@ struct serial_s {
153153
#endif /* STM32F091xC || STM32F098xx */
154154
#elif defined(STM32L0xx)
155155
#define USART4_IRQn USART4_5_IRQn
156-
#elif defined(STM32G0xx)
156+
#elif defined(STM32G0xx) || defined(STM32C0xx)
157157
#if defined(LPUART2_BASE)
158158
#define USART4_IRQn USART3_4_5_6_LPUART1_IRQn
159159
#elif defined(LPUART1_BASE)

‎variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt

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@@ -21,7 +21,9 @@ target_link_libraries(variant INTERFACE variant_usage)
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add_library(variant_bin STATIC EXCLUDE_FROM_ALL
2222
generic_clock.c
2323
PeripheralPins.c
24+
PeripheralPins_NUCLEO_C092RC.c
2425
variant_generic.cpp
26+
variant_NUCLEO_C092RC.cpp
2527
)
2628
target_link_libraries(variant_bin PUBLIC variant_usage)
2729

‎variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c

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@@ -21,8 +21,34 @@
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*/
2222
WEAK void SystemClock_Config(void)
2323
{
24-
/* SystemClock_Config can be generated by STM32CubeMX */
25-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
24+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
25+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
26+
27+
__HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1);
28+
29+
/** Initializes the RCC Oscillators according to the specified parameters
30+
* in the RCC_OscInitTypeDef structure.
31+
*/
32+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
33+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
34+
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
35+
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
36+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
37+
Error_Handler();
38+
}
39+
40+
/** Initializes the CPU, AHB and APB buses clocks
41+
*/
42+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
43+
| RCC_CLOCKTYPE_PCLK1;
44+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
45+
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
46+
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
47+
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
48+
49+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
50+
Error_Handler();
51+
}
2652
}
2753

2854
#endif /* ARDUINO_GENERIC_* */

‎variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld

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@@ -0,0 +1,187 @@
1+
/*
2+
******************************************************************************
3+
**
4+
** @file : LinkerScript.ld
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**
6+
** @author : Auto-generated by STM32CubeIDE
7+
**
8+
** Abstract : Linker script for NUCLEO-C092RC Board embedding STM32C092RCTx Device from stm32c0 series
9+
** 256KBytes FLASH
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** 30KBytes RAM
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**
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** Set heap size, stack size and stack location according
13+
** to application requirements.
14+
**
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** Set memory bank area and size if external memory is used
16+
**
17+
** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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******************************************************************************
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** @attention
24+
**
25+
** Copyright (c) 2025 STMicroelectronics.
26+
** All rights reserved.
27+
**
28+
** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
30+
** If no LICENSE file comes with this software, it is provided AS-IS.
31+
**
32+
******************************************************************************
33+
*/
34+
35+
/* Entry Point */
36+
ENTRY(Reset_Handler)
37+
38+
/* Highest address of the user mode stack */
39+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
40+
41+
_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
43+
44+
/* Memories definition */
45+
MEMORY
46+
{
47+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
48+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
49+
}
50+
51+
/* Sections */
52+
SECTIONS
53+
{
54+
/* The startup code into "FLASH" Rom type memory */
55+
.isr_vector :
56+
{
57+
. = ALIGN(4);
58+
KEEP(*(.isr_vector)) /* Startup code */
59+
. = ALIGN(4);
60+
} >FLASH
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62+
/* The program code and other data into "FLASH" Rom type memory */
63+
.text :
64+
{
65+
. = ALIGN(4);
66+
*(.text) /* .text sections (code) */
67+
*(.text*) /* .text* sections (code) */
68+
*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
70+
*(.eh_frame)
71+
72+
KEEP (*(.init))
73+
KEEP (*(.fini))
74+
75+
. = ALIGN(4);
76+
_etext = .; /* define a global symbols at end of code */
77+
} >FLASH
78+
79+
/* Constant data into "FLASH" Rom type memory */
80+
.rodata :
81+
{
82+
. = ALIGN(4);
83+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
84+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
85+
. = ALIGN(4);
86+
} >FLASH
87+
88+
.ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
89+
{
90+
. = ALIGN(4);
91+
*(.ARM.extab* .gnu.linkonce.armextab.*)
92+
. = ALIGN(4);
93+
} >FLASH
94+
95+
.ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
96+
{
97+
. = ALIGN(4);
98+
__exidx_start = .;
99+
*(.ARM.exidx*)
100+
__exidx_end = .;
101+
. = ALIGN(4);
102+
} >FLASH
103+
104+
.preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
105+
{
106+
. = ALIGN(4);
107+
PROVIDE_HIDDEN (__preinit_array_start = .);
108+
KEEP (*(.preinit_array*))
109+
PROVIDE_HIDDEN (__preinit_array_end = .);
110+
. = ALIGN(4);
111+
} >FLASH
112+
113+
.init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
114+
{
115+
. = ALIGN(4);
116+
PROVIDE_HIDDEN (__init_array_start = .);
117+
KEEP (*(SORT(.init_array.*)))
118+
KEEP (*(.init_array*))
119+
PROVIDE_HIDDEN (__init_array_end = .);
120+
. = ALIGN(4);
121+
} >FLASH
122+
123+
.fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
124+
{
125+
. = ALIGN(4);
126+
PROVIDE_HIDDEN (__fini_array_start = .);
127+
KEEP (*(SORT(.fini_array.*)))
128+
KEEP (*(.fini_array*))
129+
PROVIDE_HIDDEN (__fini_array_end = .);
130+
. = ALIGN(4);
131+
} >FLASH
132+
133+
/* Used by the startup to initialize data */
134+
_sidata = LOADADDR(.data);
135+
136+
/* Initialized data sections into "RAM" Ram type memory */
137+
.data :
138+
{
139+
. = ALIGN(4);
140+
_sdata = .; /* create a global symbol at data start */
141+
*(.data) /* .data sections */
142+
*(.data*) /* .data* sections */
143+
*(.RamFunc) /* .RamFunc sections */
144+
*(.RamFunc*) /* .RamFunc* sections */
145+
146+
. = ALIGN(4);
147+
_edata = .; /* define a global symbol at data end */
148+
149+
} >RAM AT> FLASH
150+
151+
/* Uninitialized data section into "RAM" Ram type memory */
152+
. = ALIGN(4);
153+
.bss :
154+
{
155+
/* This is used by the startup in order to initialize the .bss section */
156+
_sbss = .; /* define a global symbol at bss start */
157+
__bss_start__ = _sbss;
158+
*(.bss)
159+
*(.bss*)
160+
*(COMMON)
161+
162+
. = ALIGN(4);
163+
_ebss = .; /* define a global symbol at bss end */
164+
__bss_end__ = _ebss;
165+
} >RAM
166+
167+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
168+
._user_heap_stack :
169+
{
170+
. = ALIGN(8);
171+
PROVIDE ( end = . );
172+
PROVIDE ( _end = . );
173+
. = . + _Min_Heap_Size;
174+
. = . + _Min_Stack_Size;
175+
. = ALIGN(8);
176+
} >RAM
177+
178+
/* Remove information from the compiler libraries */
179+
/DISCARD/ :
180+
{
181+
libc.a ( * )
182+
libm.a ( * )
183+
libgcc.a ( * )
184+
}
185+
186+
.ARM.attributes 0 : { *(.ARM.attributes) }
187+
}

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