From 1eb03795db7e41dd7f6c403e49acf71bd063adaa Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Sun, 29 May 2022 18:36:06 +0200 Subject: [PATCH 1/3] Improve `otg_fs::Usb` API. --- Cargo.toml | 2 +- examples/otg_fs_serial.rs | 32 ++++++------------ src/otg_fs.rs | 69 ++++++++++++++++++++++++++------------- 3 files changed, 58 insertions(+), 45 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 692c72bf..ca82876d 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -54,7 +54,7 @@ version = "0.6.0" optional = true [dependencies.synopsys-usb-otg] -version = "0.2.4" +version = "0.3.0" features = ["cortex-m", "fs"] optional = true diff --git a/examples/otg_fs_serial.rs b/examples/otg_fs_serial.rs index 52513420..f0c782a1 100644 --- a/examples/otg_fs_serial.rs +++ b/examples/otg_fs_serial.rs @@ -8,7 +8,7 @@ extern crate panic_semihosting; use cortex_m_rt::entry; use stm32l4xx_hal::gpio::Speed; -use stm32l4xx_hal::otg_fs::{UsbBus, USB}; +use stm32l4xx_hal::otg_fs::{Usb, UsbBus}; use stm32l4xx_hal::prelude::*; use stm32l4xx_hal::rcc::{ ClockSecuritySystem, CrystalBypass, MsiFreq, PllConfig, PllDivider, PllSource, @@ -28,17 +28,6 @@ fn enable_crs() { crs.cr.modify(|_, w| w.cen().set_bit()); } -/// Enables VddUSB power supply -fn enable_usb_pwr() { - // Enable PWR peripheral - let rcc = unsafe { &(*RCC::ptr()) }; - rcc.apb1enr1.modify(|_, w| w.pwren().set_bit()); - - // Enable VddUSB - let pwr = unsafe { &*PWR::ptr() }; - pwr.cr2.modify(|_, w| w.usv().set_bit()); -} - static mut EP_MEMORY: [u32; 1024] = [0; 1024]; #[entry] @@ -83,25 +72,24 @@ unsafe fn main() -> ! { // Enable clock recovery system. enable_crs(); - // Enable USB power (and disable VddUSB power isolation). - enable_usb_pwr(); let mut gpioa = dp.GPIOA.split(&mut rcc.ahb2); - let usb = USB { - usb_global: dp.OTG_FS_GLOBAL, - usb_device: dp.OTG_FS_DEVICE, - usb_pwrclk: dp.OTG_FS_PWRCLK, - hclk: clocks.hclk(), - pin_dm: gpioa + let usb = Usb::new( + dp.OTG_FS_GLOBAL, + dp.OTG_FS_DEVICE, + dp.OTG_FS_PWRCLK, + gpioa .pa11 .into_alternate(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrh) .set_speed(Speed::VeryHigh), - pin_dp: gpioa + gpioa .pa12 .into_alternate(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrh) .set_speed(Speed::VeryHigh), - }; + &mut pwr, + clocks.hclk(), + ); let usb_bus = UsbBus::new(usb, &mut EP_MEMORY); diff --git a/src/otg_fs.rs b/src/otg_fs.rs index 8e0f88f0..836fb0a9 100644 --- a/src/otg_fs.rs +++ b/src/otg_fs.rs @@ -2,32 +2,57 @@ //! //! The STM32L4 series only supports the full-speed peripheral. -use crate::rcc::{Enable, Reset}; -use crate::stm32; - -use crate::gpio::{ - gpioa::{PA11, PA12}, - Alternate, PushPull, -}; -use crate::time::Hertz; - pub use synopsys_usb_otg::UsbBus; use synopsys_usb_otg::UsbPeripheral; -pub struct USB { - pub usb_global: stm32::OTG_FS_GLOBAL, - pub usb_device: stm32::OTG_FS_DEVICE, - pub usb_pwrclk: stm32::OTG_FS_PWRCLK, +use crate::{ + gpio::{ + gpioa::{PA11, PA12}, + Alternate, PushPull, + }, + pac, + pwr::Pwr, + rcc::{Clocks, Enable, Reset}, + time::Hertz, +}; + +pub struct Usb { + usb_global: pac::OTG_FS_GLOBAL, + usb_device: pac::OTG_FS_DEVICE, + usb_pwrclk: pac::OTG_FS_PWRCLK, // TODO: check type - pub pin_dm: PA11>, - pub pin_dp: PA12>, - pub hclk: Hertz, + pin_dm: PA11>, + pin_dp: PA12>, + hclk: Hertz, +} + +impl Usb { + pub fn new( + global: pac::OTG_FS_GLOBAL, + device: pac::OTG_FS_DEVICE, + pwrclk: pac::OTG_FS_PWRCLK, + dm: PA11>, + dp: PA12>, + pwr: &mut Pwr, + clocks: Clocks, + ) -> Self { + pwr.cr2.reg().modify(|_, w| w.usv().set_bit()); + + Self { + usb_global: global, + usb_device: device, + usb_pwrclk: pwrclk, + pin_dm: dm, + pin_dp: dp, + hclk: clocks.hclk(), + } + } } -unsafe impl Sync for USB {} +unsafe impl Sync for Usb {} -unsafe impl UsbPeripheral for USB { - const REGISTERS: *const () = stm32::OTG_FS_GLOBAL::ptr() as *const (); +unsafe impl UsbPeripheral for Usb { + const REGISTERS: *const () = pac::OTG_FS_GLOBAL::ptr() as *const (); const HIGH_SPEED: bool = false; const FIFO_DEPTH_WORDS: usize = 320; @@ -37,10 +62,10 @@ unsafe impl UsbPeripheral for USB { fn enable() { cortex_m::interrupt::free(|_| unsafe { // Enable USB peripheral - stm32::OTG_FS_GLOBAL::enable_unchecked(); + pac::OTG_FS_GLOBAL::enable_unchecked(); // Reset USB peripheral - stm32::OTG_FS_GLOBAL::reset_unchecked(); + pac::OTG_FS_GLOBAL::reset_unchecked(); }); } @@ -49,4 +74,4 @@ unsafe impl UsbPeripheral for USB { } } -pub type UsbBusType = UsbBus; +pub type UsbBusType = UsbBus; From 494131e56fe8fb1eebe972b6caa3df1cabfeb812 Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Sun, 29 May 2022 21:26:13 +0200 Subject: [PATCH 2/3] Fix example. --- examples/otg_fs_serial.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/otg_fs_serial.rs b/examples/otg_fs_serial.rs index f0c782a1..8acc10f5 100644 --- a/examples/otg_fs_serial.rs +++ b/examples/otg_fs_serial.rs @@ -13,7 +13,7 @@ use stm32l4xx_hal::prelude::*; use stm32l4xx_hal::rcc::{ ClockSecuritySystem, CrystalBypass, MsiFreq, PllConfig, PllDivider, PllSource, }; -use stm32l4xx_hal::stm32::{Peripherals, CRS, PWR, RCC}; +use stm32l4xx_hal::stm32::{Peripherals, CRS, RCC}; use usb_device::prelude::*; /// Enable CRS (Clock Recovery System) @@ -88,7 +88,7 @@ unsafe fn main() -> ! { .into_alternate(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrh) .set_speed(Speed::VeryHigh), &mut pwr, - clocks.hclk(), + clocks, ); let usb_bus = UsbBus::new(usb, &mut EP_MEMORY); From 901b435527d0f02339914c8eac1b5d1a43d01734 Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Tue, 14 Jun 2022 21:24:25 +0200 Subject: [PATCH 3/3] Rename unused fields. --- src/otg_fs.rs | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/otg_fs.rs b/src/otg_fs.rs index 836fb0a9..1a8eeda1 100644 --- a/src/otg_fs.rs +++ b/src/otg_fs.rs @@ -17,12 +17,12 @@ use crate::{ }; pub struct Usb { - usb_global: pac::OTG_FS_GLOBAL, - usb_device: pac::OTG_FS_DEVICE, - usb_pwrclk: pac::OTG_FS_PWRCLK, + _global: pac::OTG_FS_GLOBAL, + _device: pac::OTG_FS_DEVICE, + _pwrclk: pac::OTG_FS_PWRCLK, // TODO: check type - pin_dm: PA11>, - pin_dp: PA12>, + _dm: PA11>, + _dp: PA12>, hclk: Hertz, } @@ -39,11 +39,11 @@ impl Usb { pwr.cr2.reg().modify(|_, w| w.usv().set_bit()); Self { - usb_global: global, - usb_device: device, - usb_pwrclk: pwrclk, - pin_dm: dm, - pin_dp: dp, + _global: global, + _device: device, + _pwrclk: pwrclk, + _dm: dm, + _dp: dp, hclk: clocks.hclk(), } }