H503

Author: usbalbin

src/adc/h5.rs

@@ -1,5 +1,10 @@
 use super::{Adc, Disabled, Temperature, Vbat, Vddcore, Vrefint};
 use crate::gpio::{self, Analog};
+
+#[cfg(feature = "rm0492")]
+use crate::stm32::{ADC1, ADC1 as ADCC};
+
+#[cfg(feature = "rm0481")]
 use crate::stm32::{ADC1, ADC2, ADCC};
 
 macro_rules! adc_pins {
@@ -47,36 +52,78 @@ macro_rules! adc_internal {
     };
 }
 
+#[cfg(feature = "rm0492")]
 impl Vddcore {
+    pub fn enable(_adc: &Adc<ADC1, Disabled>) {
+        let adc = unsafe { ADC1::steal() };
+
+        adc.or().modify(|_, w| w.op1().set_bit());
+    }
+
+    pub fn disable(_adc: &Adc<ADC1, Disabled>) {
+        let adc = unsafe { ADC1::steal() };
+
+        adc.or().modify(|_, w| w.op1().clear_bit());
+    }
+}
+#[cfg(feature = "rm0492")]
+adc_pins!(ADC1, Vddcore => 16);
+
+#[cfg(feature = "rm0481")]
+impl Vddcore {
+    pub fn enable(_adc: &Adc<ADC2, Disabled>) {
+        let adc2 = unsafe { ADC1::steal() };
+
+        adc2.or().modify(|_, w| w.op0().bit(true));
+    }
+
     pub fn disable(_adc: &Adc<ADC2, Disabled>) {
         let adc2 = unsafe { ADC1::steal() };
 
         adc2.or().modify(|_, w| w.op0().bit(false));
     }
 }
+#[cfg(feature = "rm0481")]
+adc_pins!(ADC2, Vddcore => 17);
 
+#[cfg(feature = "rm0492")]
 adc_internal!(
     [ADC1, ADCC];
 
     Temperature => (16, tsen),
-    Vrefint => (17, vbaten),
+    Vrefint => (17, vrefen),
+    Vbat => (2, vbaten),
+);
 
+#[cfg(feature = "rm0481")]
+adc_internal!(
+    [ADC1, ADCC];
+
+    Temperature => (16, tsen),
+    Vrefint => (17, vrefen),
 );
 
+#[cfg(feature = "rm0481")]
 adc_internal!(
     [ADC2, ADCC];
 
-    Vbat => (16, vrefen),
+    Vbat => (16, vbaten),
 );
 
 macro_rules! adc_pins_common {
     ($($input:ty => $chan:expr),+ $(,)*) => {$(
         adc_pins!(ADC1, $input => $chan);
+
+        #[cfg(feature = "rm0481")]
         adc_pins!(ADC2, $input => $chan);
     )*};
 }
 
-// stm32h523
+#[cfg(any(
+    feature = "stm32h503",
+    feature = "stm32h523",
+    feature = "stm32h533"
+))]
 adc_pins_common!(
     gpio::PC0<Analog> => 10,
     gpio::PC1<Analog> => 11,
@@ -88,23 +135,25 @@ adc_pins_common!(
     gpio::PA2<Analog> => 14,
     gpio::PA3<Analog> => 15,
     gpio::PA4<Analog> => 18,
-
     gpio::PA5<Analog> => 19,
     gpio::PA6<Analog> => 3,
     gpio::PA7<Analog> => 7,
+
     gpio::PC4<Analog> => 4,
     gpio::PC5<Analog> => 8,
     gpio::PB0<Analog> => 9,
     gpio::PB1<Analog> => 5,
 );
 
+#[cfg(feature = "stm32h523")]
 adc_pins!(
     ADC1,
     gpio::PF11<Analog> => 2,
     gpio::PF12<Analog> => 6,
 
 );
 
+#[cfg(feature = "stm32h523")]
 adc_pins!(
     ADC2,
     gpio::PF13<Analog> => 2,

src/adc/mod.rs

@@ -15,10 +15,14 @@ use core::marker::PhantomData;
 use core::ops::Deref;
 
 use embedded_hal::delay::DelayNs;
-use stm32h5::stm32h523::ADCC;
 
 use crate::rcc::rec::AdcDacClkSelGetter;
-use crate::stm32::{ADC1, ADC2};
+
+#[cfg(feature = "rm0492")]
+use crate::stm32::{ADC1, ADC1 as ADCC};
+
+#[cfg(feature = "rm0481")]
+use crate::stm32::{ADC1, ADC2, ADCC};
 
 use crate::pwr::{self, VoltageScale};
 //use crate::rcc::rec::AdcClkSelGetter;
@@ -32,9 +36,13 @@ pub trait Instance:
 }
 
 impl crate::Sealed for ADC1 {}
+
+#[cfg(feature = "rm0481")]
 impl crate::Sealed for ADC2 {}
 
 impl Instance for ADC1 {}
+
+#[cfg(feature = "rm0481")]
 impl Instance for ADC2 {}
 
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -194,7 +202,7 @@ impl AdcCalLinear {
 /// Vref internal signal
 #[derive(Default)]
 pub struct Vrefint;
-/// Vbat internal signal
+/// Vbat/4 (Vbat pin input voltage divided by 4) internal signal
 #[derive(Default)]
 pub struct Vbat;
 /// Internal temperature sensor
@@ -263,13 +271,48 @@ fn kernel_clk_unwrap(
     }
 }
 
-// ADC12 is a unique case where a single reset line is used to control two
-// peripherals that have separate peripheral definitions in the SVD.
+#[cfg(feature = "rm0492")]
+pub fn adc1(
+    adc1: ADC1,
+    f_adc: impl Into<Hertz>,
+    delay: &mut impl DelayNs,
+    prec: rec::Adc,
+    clocks: &CoreClocks,
+    pwrcfg: &pwr::PowerConfiguration,
+) -> Adc<ADC1, Disabled> {
+    // Consume ADC register block, produce ADC1/2 with default settings
+    let mut adc1 = Adc::<ADC1, Disabled>::default_from_rb(adc1);
+
+    // Check adc_ker_ck_input
+    kernel_clk_unwrap(&prec, clocks);
+
+    // Enable AHB clock
+    let prec = prec.enable();
+
+    // Power Down
+    adc1.power_down();
+
+    // Reset peripheral
+    let prec = prec.reset();
+
+    // Power Up, Preconfigure and Calibrate
+    adc1.power_up(delay);
+    adc1.configure_clock(f_adc.into(), prec, clocks, pwrcfg); // ADC12_COMMON
+    adc1.preconfigure();
+    adc1.calibrate();
+
+    // From RM0481:
+    // This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected
+    adc1.rb.or().modify(|_, w| w.op0().set_bit());
+
+    adc1
+}
 
 /// Initialise ADC12 together
 ///
 /// Sets all configurable parameters to one-shot defaults,
 /// performs a boot-time calibration.
+#[cfg(feature = "rm0481")]
 pub fn adc12(
     adc1: ADC1,
     adc2: ADC2,
@@ -308,28 +351,12 @@ pub fn adc12(
 
     // From RM0481:
     // This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected
-    adc2.rb.or().modify(|_, w| w.op0().set_bit());
+    adc1.rb.or().modify(|_, w| w.op0().set_bit());
     adc2.rb.or().modify(|_, w| w.op0().set_bit());
 
     (adc1, adc2)
 }
 
-/// Free both ADC1 and ADC2 along with PREC.
-///
-/// Since ADC1 and ADC2 are controlled together, they are freed together.
-pub fn free_adc12<ED>(
-    adc1: Adc<ADC1, ED>,
-    adc2: Adc<ADC2, ED>,
-) -> (ADC1, ADC2, rec::Adc) {
-    (
-        adc1.rb,
-        adc2.rb,
-        rec::Adc {
-            _marker: PhantomData,
-        },
-    )
-}
-
 impl<ADC: Instance> AdcExt<ADC> for ADC {
     type Rec = rec::Adc;