Hello @ssvb , @libv , @aschnell !
Thanks for sharing the source code!
I'm currently porting limare to bare metal for the Allwinner A13/R8 (sun5i).
I'm using end-to-end address translation (virtual address equals physical address). For simplicity, caching is disabled on the CPU side.
I'm trying to reproduce the GP Job logic. I'm encountering a problem: after the GP job starts successfully, I get an empty tile buffer (pointed to by the MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR register). All attempts to fill this buffer failed.
Meanwhile, when running PP Job, the result is that the display is filled with the background color (normal behavior), but no polygons are rendered (most likely due to an empty tile buffer that the GP was supposed to create).
Mali-400 GPU configuration: default. I checked: PMU is active, L2 caching is disabled, and the MMU for GP and PP is disabled. In theory, this configuration is valid for physical memory writethrough.
I'm providing the program log below. It's possible the command lists are incorrect, or I did something wrong (ALL Zero tile buffer):
Jump to 0x40000000...
R8 Mali-400 MP r3p2...
Mali-400 Clock/Gate init...
PLL5_CFG_REG=0xB1059191
MBUS_SCLK_CFG_REG=0x82000001
GP_Version=0x0B070101
PP_Version=0xCD070101
MALI-400 GP & PP Versions correct!
Kernel driver is version 19
state->type=400, state->pp_core_count=1
state->mem_base=0x40E02000
limare_render_state_template
fb_open
framerate_time=0
limare_init DONE!
state->frame_mem_physical=0x40E02000
state->program_mem_physical=0x41A02000
state->aux_mem_physical=0x41A12000
fb->fb_physical=0x48E02000
Using dual buffered direct rendering to FB.
fb_init
state->fb->mali_physical[0]=0x48E02000
state->fb->mali_physical[1]=0x4905A000
limare_state_init
vertex_shader_attach_mbs_stream
fragment_shader_attach_mbs_stream
limare_link
limare_attribute_pointer
limare_texture_upload
limare_texture_attach
esMatrixLoadIdentity
esTranslate
esRotate
esMatrixLoadIdentity
esFrustum
esMatrixLoadIdentity
esMatrixMultiply
limare_uniform_attach
limare_frame_new
limare_draw_elements
frame_regs.vs_commands_start: Mem Address=0x40E31D80
===> 0x41A02000
===> 0x400F0000
===> 0x00D03800
===> 0x10000040
===> 0x01000100
===> 0x10000042
===> 0x40F52300
===> 0x30070000
===> 0x40F51DC0
===> 0x20040000
===> 0x40F51E40
===> 0x20040008
===> 0x00000003
===> 0x10000041
===> 0x18000001
===> 0x00000000
===> 0x00000000
===> 0x60000000
===> 0x00018000
===> 0x50000000
Memory Dump Finished
frame_regs.plbu_commands_start: Mem Address=0x40F41D80
===> 0x00000200
===> 0x1000010B
===> 0x10010002
===> 0x1000010C
===> 0x3F002500
===> 0x10000109
===> 0x00000010
===> 0x30000000
===> 0x40E28000
===> 0x2800012F
===> 0x00000000
===> 0x10000107
===> 0x44800000
===> 0x10000108
===> 0x00000000
===> 0x10000105
===> 0x44160000
===> 0x10000106
===> 0x40E41D80
===> 0x10000103
===> 0x40F41D80
===> 0x10000104
===> 0x00022200
===> 0x1000010B
===> 0x40F523C0
===> 0x840F5218
===> 0x00000000
===> 0x10000107
===> 0x44800000
===> 0x10000108
===> 0x00000000
===> 0x10000105
===> 0x44160000
===> 0x10000106
===> 0x00000000
===> 0x1000010A
===> 0x00000000
===> 0x1000010E
===> 0x3F800000
===> 0x1000010F
===> 0x40F52180
===> 0x10000100
===> 0x40F51D80
===> 0x10000101
===> 0x00010001
===> 0x60000000
===> 0x24000000
===> 0x00240000
===> 0x00000000
===> 0x50000000
Memory Dump Finished
=== DEBUG Full lima_gp_job_start_r3p0 Dump =================================================================
fd (File Descriptor): 100
user_job_ptr (Job Handle/ID): 0x80000000
priority: 1
--- frame_registers (GP Addresses) ---
vs_commands_start (VS Cmd Buffer Start): 0x40E31D80
vs_commands_end (VS Cmd Buffer End): 0x40E31DD0
plbu_commands_start (PLBU Cmd Buffer Start): 0x40F41D80
plbu_commands_end (PLBU Cmd Buffer End): 0x40F41E48
tile_heap_start (Tile Heap Start): 0x40E41D80
tile_heap_end (Tile Heap End): 0x40F41D80
--- Other Fields ---
perf_counter_flag: 0
perf_counter_src0: 0
perf_counter_src1: 0
frame_builder_id: 0
flush_id: 0
============================================================================================================
Ioctl received 100 0x60048500 0x543EFE0C
IOCTL: LIMA_GP_START_JOB_R3P0
Register=0x01C40000, Value=0x40E31D80
Register=0x01C40004, Value=0x40E31DD0
Register=0x01C40008, Value=0x40F41D80
Register=0x01C4000C, Value=0x40F41E48
Register=0x01C40010, Value=0x40E41D80
Register=0x01C40014, Value=0x40F41D80
Register=0x01C40044, Value=0x0000000A
Register=0x01C4003C, Value=0x00000001
Register=0x01C40048, Value=0x0000000A
Register=0x01C40040, Value=0x00000001
Mali GP: Starting job (0x543efe0c) on core Mali-400 MP GP with command 0x00000003
Register=0x01C40020, Value=0x00000010
Register=0x01C40020, Value=0x00000003
GP_INT_Status=0x00000000, GP_Status=0x0000000A
AXI Bus Error Status: 0x00000000
Vertices Processed Count 0: 0
Vertices Processed Count 1: 8
MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR : Mem Address=0x40E41D80
ALL ZERO!
Memory Dump Finished
GP_INT_Status=0x00000003, GP_Status=0x00000001
AXI Bus Error Status: 0x00000000
Vertices Processed Count 0: 24
Vertices Processed Count 1: 24
MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR : Mem Address=0x40E41D80
ALL ZERO!
Memory Dump Finished
GP_INT_Status=0x00000003, GP_Status=0x00000001
AXI Bus Error Status: 0x00000000
Vertices Processed Count 0: 24
Vertices Processed Count 1: 24
MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR : Mem Address=0x40E41D80
ALL ZERO!
Memory Dump Finished
GP_INT_Status=0x00000003, GP_Status=0x00000001
AXI Bus Error Status: 0x00000000
Vertices Processed Count 0: 24
Vertices Processed Count 1: 24
MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR : Mem Address=0x40E41D80
ALL ZERO!
Memory Dump Finished
Then I clear interrupts registers. Next Log:
GP_INT_Status=0x00000000, GP_Status=0x00000000
AXI Bus Error Status: 0x00000000
Vertices Processed Count 0: 24
Vertices Processed Count 1: 24
MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR : Mem Address=0x40E41D80
ALL ZERO!
Memory Dump Finished
GP_INT_Status=0x00000000, GP_Status=0x00000000
AXI Bus Error Status: 0x00000000
Vertices Processed Count 0: 24
Vertices Processed Count 1: 24
MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR : Mem Address=0x40E41D80
ALL ZERO!
Memory Dump Finished
GP_INT_Status=0x00000000, GP_Status=0x00000000
AXI Bus Error Status: 0x00000000
Vertices Processed Count 0: 24
Vertices Processed Count 1: 24
MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR : Mem Address=0x40E41D80
ALL ZERO!
Memory Dump Finished
In this source : https://github.com/ssvb/lima-memtester/blob/master/textured_cube_mainloop.c - binary shaders suitable for A13 or not?
Please help me figure this out. What could be wrong that causes the tile buffer not filled after a GP Job completes?
Hello @ssvb , @libv , @aschnell !
Thanks for sharing the source code!
I'm currently porting limare to bare metal for the Allwinner A13/R8 (sun5i).
I'm using end-to-end address translation (virtual address equals physical address). For simplicity, caching is disabled on the CPU side.
I'm trying to reproduce the GP Job logic. I'm encountering a problem: after the GP job starts successfully, I get an empty tile buffer (pointed to by the MALIGP2_REG_ADDR_MGMT_PLBU_ALLOC_START_ADDR register). All attempts to fill this buffer failed.
Meanwhile, when running PP Job, the result is that the display is filled with the background color (normal behavior), but no polygons are rendered (most likely due to an empty tile buffer that the GP was supposed to create).
Mali-400 GPU configuration: default. I checked: PMU is active, L2 caching is disabled, and the MMU for GP and PP is disabled. In theory, this configuration is valid for physical memory writethrough.
I'm providing the program log below. It's possible the command lists are incorrect, or I did something wrong (ALL Zero tile buffer):
Then I clear interrupts registers. Next Log:
In this source : https://github.com/ssvb/lima-memtester/blob/master/textured_cube_mainloop.c - binary shaders suitable for A13 or not?
Please help me figure this out. What could be wrong that causes the tile buffer not filled after a GP Job completes?