diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..f33b24d --- /dev/null +++ b/.gitignore @@ -0,0 +1,8 @@ +.apax/ +.env/ +[Bb]in/ +[Ll]ibrary/ +[Tt]est[Rr]esult*/ +*.tgz +*.tracerec.json +obj \ No newline at end of file diff --git a/.vscode/launch.json b/.vscode/launch.json new file mode 100644 index 0000000..907438c --- /dev/null +++ b/.vscode/launch.json @@ -0,0 +1,15 @@ +{ + // Use IntelliSense to learn about possible attributes. + // Hover to view descriptions of existing attributes. + // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387 + "version": "0.2.0", + "configurations": [ + { + "type": "lldb", + "request": "launch", + "name": "Debug ST tests", + "program": "bin/axunit-llvm/tests.exe", + "terminal": "console" + } + ] +} \ No newline at end of file diff --git a/LIBRARY.md b/LIBRARY.md new file mode 100644 index 0000000..c7394dd --- /dev/null +++ b/LIBRARY.md @@ -0,0 +1,29 @@ +# Creating a library project + +## Preconditions + +1. Install [APAX](https://axciteme.siemens.com/downloads.html) +2. Login to APAX/NPM registries, e. g. + - `apax login --registry https://axciteme.siemens.com/registry/apax/ --password f1ee0c0ffee` + - `apax login --registry https://npm.pkg.github.com --password f1ee0c0ffee` +3. Create a new GitLab/GitHub project +4. Clone the GitLab/GitHub project, e. g. `git clone git@github.com:AX-Showcase/my-lib.git` +5. Open a shell in the repo directory + + +## Steps for creation + +1. `apax init --lib @ax-showcase/my-lib` +2. `cd ax-showcase-my-lib` +3. `touch LIBRARY.md` +4. `nano README.md` +5. `nano LICENSE.md` +6. `nano .gitignore` +7. `nano apax.yml` +8. `cd ..` + + +## Steps for package + +1. `apax run deliver` +2. `apax run publish` diff --git a/LICENSE.md b/LICENSE.md new file mode 100644 index 0000000..45318a1 --- /dev/null +++ b/LICENSE.md @@ -0,0 +1,26 @@ +# **Legal information** + +## **Use of application examples** + +Application examples illustrate the solution of automation tasks through an interaction of several components in the form of text, graphics and/or software modules. The application examples are a free service by Siemens AG and/or a subsidiary of Siemens AG (“Siemens”). They are non-binding and make no claim to completeness or functionality regarding configuration and equipment. The application examples merely offer help with typical tasks; they do not constitute customer-specific solutions. You yourself are responsible for the proper and safe operation of the products in accordance with applicable regulations and must also check the function of the respective application example and customize it for your system. + +Any change to the application examples is your responsibility. The application examples are not required to undergo the customary tests and quality inspections of a chargeable product; they may have functional and performance defects as well as errors. It is your responsibility to use them in such a manner that any malfunctions that may occur do not result in property damage or injury to persons. Siemens reserves the right to make changes to the application examples at any time without notice. The application examples of this repository are licensed under the MIT License (see below). + +## MIT License + +Copyright 2020 Siemens AG + +Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +## **Security information** + +Siemens provides products and solutions with industrial security functions that support the secure operation of plants, systems, machines and networks. In order to protect plants, systems, machines and networks against cyber threats, it is necessary to implement – and continuously maintain – a holistic, state-of-the-art industrial security concept. Siemens’ products and solutions constitute one element of such a concept. Customers are responsible for preventing unauthorized access to their plants, systems, machines and networks. Such systems, machines and components should only be connected to an enterprise network or the Internet if and to the extent such a connection is necessary and only when appropriate security measures (e.g. firewalls and/or network segmentation) are in place. +For additional information on industrial security measures that may be implemented, please visit https://www.siemens.com/industrialsecurity. + +Siemens’ products and solutions undergo continuous development to make them more secure. Siemens strongly recommends that product updates are applied as soon as they are available and that the latest product versions are used. Use of product versions that are no longer supported, and failure to apply the latest updates may increase customer’s exposure to cyber threats. + +To stay informed about product updates, subscribe to the Siemens Industrial Security RSS Feed at: https://www.siemens.com/industrialsecurity. diff --git a/TESTS.md b/TESTS.md new file mode 100644 index 0000000..4aec0f9 --- /dev/null +++ b/TESTS.md @@ -0,0 +1,21 @@ +# Creating a tests project + +## Preconditions + +1. Create a library project +2. Open a shell in the repo directory + + +## Steps for creation + +1. `apax init --app @ax-showcase/my-lib.tests` +2. `cd ax-showcase-my-lib.tests` +3. `touch TESTS.md` +4. `nano .gitignore` +5. `nano apax.yml` +6. `cd ..` + + +## Steps for test execution + +`apax run test` diff --git a/apax.lock b/apax.lock new file mode 100644 index 0000000..861787a --- /dev/null +++ b/apax.lock @@ -0,0 +1,364 @@ +# THIS IS AN AUTOGENERATED FILE. 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+++ b/apax.yml @@ -0,0 +1,33 @@ +name: '@ax-showcase/io' +version: 0.0.0-placeholder # correct version will be set by script +author: Siemens AG +type: lib +variables: + APAX_BUILD_ARGS: + - '--log Debug' + - '--simulation' + # APAX_TEST_ARGS: + # - --only-meta true + # - --machine-readable true + # - --nologo + # - '--output "testResults"' +targets: + - '1500' + - 'axunit-llvm' +scripts: + clean: + - 'clean-tests' + "pretest": "apax build" +dependencies: + "@ax-showcase/mocks": 0.2.0 + "@ax/system-timer": 0.4.2 +devDependencies: + '@ax-showcase/ax-sdk': 0.2.449 +registries: + '@ax-showcase': 'https://npm.pkg.github.com/' +files: + - 'README.md' + - 'LICENSE.md' + - 'doc' + - 'src' # ship library with source + # - 'bin/1500/' # ship library with binary diff --git a/doc/cover.md b/doc/cover.md new file mode 100644 index 0000000..546e54b --- /dev/null +++ b/doc/cover.md @@ -0,0 +1,12 @@ +# Siemens.AX.IO + +Version: 0.0.0-placeholder + + +## Usage + +The library consists of the following namespaces: + +- `Siemens.AX.IO` +- `Siemens.AX.IO.Input` +- `Siemens.AX.IO.Output` diff --git a/newfile.st b/newfile.st new file mode 100644 index 0000000..e9c6568 --- /dev/null +++ b/newfile.st @@ -0,0 +1,2 @@ +//sdfasd +// create new file \ No newline at end of file diff --git a/src/CheckTimerstatus.st b/src/CheckTimerstatus.st new file mode 100644 index 0000000..6659afb --- /dev/null +++ b/src/CheckTimerstatus.st @@ -0,0 +1,18 @@ +USING System.Timer; + +NAMESPACE Siemens.AX.IO + FUNCTION CheckTimerstatus : BOOL + VAR_IN_OUT + iecTimer : OnDelay; + END_VAR + CheckTimerstatus := iecTimer.output; + END_FUNCTION + + FUNCTION CheckTimerstatus : BOOL + VAR_IN_OUT + iecTimer : OffDelay; + END_VAR + CheckTimerstatus := iecTimer.output; + END_FUNCTION + +END_NAMESPACE \ No newline at end of file diff --git a/src/Input/BinSignal.st b/src/Input/BinSignal.st new file mode 100644 index 0000000..ec5b8ce --- /dev/null +++ b/src/Input/BinSignal.st @@ -0,0 +1,65 @@ +NAMESPACE Siemens.Ax.IO.Input + CLASS BinSignal EXTENDS InputBase IMPLEMENTS IBinSignal + VAR PUBLIC + invert : BOOL := FALSE; + END_VAR + VAR PRIVATE + _signalInOld : BOOL; + END_VAR + VAR PROTECTED + _signalInPrefiltered : BOOL; + _statusQ : BOOL; + _statusQRis : BOOL; + _statusQFal : BOOL; + END_VAR + METHOD PUBLIC ReadCyclic + VAR_INPUT + signal : BOOL; + valid : BOOL := TRUE; + default : BOOL := FALSE; + END_VAR + + IF (valid) THEN + _signalInPrefiltered := signal XOR invert; + THIS.QBad(value := FALSE); + ELSE + _signalInPrefiltered := default; + THIS.QBad(value := TRUE); + END_IF; + + _statusQ := _signalInPrefiltered; + _statusQRis := _statusQ AND NOT(_signalInOld); + _statusQFal := NOT(_statusQ) AND _signalInOld; + _signalInOld := _statusQ; + END_METHOD + + + /// + /// + /// Returns if the signal is inverted + METHOD PUBLIC IsInverted : BOOL + IsInverted := invert; + END_METHOD + + /// + /// + /// Returns the current status of BinSignal + METHOD PUBLIC Q : BOOL + Q := _statusQ; + END_METHOD + + /// + /// + /// Returns if a rising edge was detected in the current cycle + METHOD PUBLIC QRis : BOOL + QRis := _statusQRis; + END_METHOD + + /// + /// + /// Returns if a falling edge was detected in the current cycle + METHOD PUBLIC QFal : BOOL + QFal := _statusQFal; + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/src/Input/BinSignalExt.st b/src/Input/BinSignalExt.st new file mode 100644 index 0000000..93f42a8 --- /dev/null +++ b/src/Input/BinSignalExt.st @@ -0,0 +1,55 @@ +USING System.Timer; +NAMESPACE Siemens.AX.IO.Input + CLASS BinSignalExt EXTENDS BinSignal + VAR PUBLIC + ondelay : TIME; + offdelay : TIME; + END_VAR + VAR PRIVATE + _ton : OnDelay; + _toff : OffDelay; + _signalInOld : BOOL; + END_VAR + + /// + /// Read digital signal (must be executed in every cycle - recommendation: begin of cycle in case of digital input signals) + /// + /// Digital/Boolean signal + /// signal is valid (if FALSE, the default value will be used); default = TRUE + /// default value which is used, when valid 0 FALSE + METHOD PUBLIC OVERRIDE ReadCyclic + VAR_INPUT + signal : BOOL; + valid : BOOL := TRUE; + default : BOOL := FALSE; + END_VAR + VAR_TEMP + _tonDelayed : BOOL; + _toffDelayed : BOOL; + END_VAR + + SUPER.ReadCyclic(signal := signal, valid := valid, default := default); + + + IF (ondelay > T#0ms) THEN + _ton(duration := ondelay, signal := _signalInPrefiltered); + _tonDelayed := _ton.output; + ELSE + _tonDelayed := _signalInPrefiltered; + END_IF; + + IF (offdelay > T#0ms) THEN + _toff(duration := offdelay, signal := _signalInPrefiltered); + _toffDelayed := _toff.output; + ELSE + _toffDelayed := _tonDelayed; + END_IF; + + _statusQ := _tonDelayed OR _toffDelayed; + _statusQRis := _statusQ AND NOT(_signalInOld); + _statusQFal := NOT(_statusQ) AND _signalInOld; + _signalInOld := _statusQ; + END_METHOD + + END_CLASS +END_NAMESPACE diff --git a/src/Input/DintInput.st b/src/Input/DintInput.st new file mode 100644 index 0000000..f159422 --- /dev/null +++ b/src/Input/DintInput.st @@ -0,0 +1,51 @@ +NAMESPACE Siemens.AX.IO.Input + /// + /// Class to handle DINT input values + /// + CLASS DintInput EXTENDS InputBase + + VAR PRIVATE + _value : DINT := DINT#0; + _default : DINT := DINT#0; + _qBad : BOOL; + END_VAR + + /// + /// The max and min value of datataype Dint + /// + VAR CONSTANT PUBLIC + MIN : DINT := DINT#-2147483648; + MAX : DINT := DINT#2147483647; + END_VAR + + /// + /// Read the input value from Input area of type Double Integer + /// + /// The double integer input value + /// The input value is valid (e.g. periphery is ok) + /// Default value if valid = FALSE + METHOD PUBLIC ReadCyclic + VAR_INPUT + value : DINT; + valid : BOOL := TRUE; + default : DINT := DINT#0; + END_VAR + + THIS.QBad(value := NOT(valid)); + _value := value; + _default := default; + END_METHOD + + /// + /// Returns the actual value of double integer + /// + /// Actual value of the DINT + METHOD PUBLIC Q : DINT + IF (NOT(THIS.QBad())) THEN + Q := _value; + ELSE + Q := _default; + END_IF; + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/src/Input/IBinSignal.st b/src/Input/IBinSignal.st new file mode 100644 index 0000000..fd0f15b --- /dev/null +++ b/src/Input/IBinSignal.st @@ -0,0 +1,12 @@ +NAMESPACE Siemens.Ax.IO.Input + INTERFACE IBinSignal + METHOD Q : BOOL + END_METHOD + METHOD QRis : BOOL + END_METHOD + METHOD QFal : BOOL + END_METHOD + METHOD QBad : BOOL + END_METHOD + END_INTERFACE +END_NAMESPACE \ No newline at end of file diff --git a/src/Input/InputBase.st b/src/Input/InputBase.st new file mode 100644 index 0000000..402af4d --- /dev/null +++ b/src/Input/InputBase.st @@ -0,0 +1,32 @@ +NAMESPACE Siemens.AX.IO.Input + /// + /// QBad-Status of binary input signal + /// + CLASS InputBase + VAR PROTECTED + _isQBad : BOOL; // TRUE : signal is invalid + END_VAR + + /// + /// Set the status to QBad + /// + /// OnDelay value for BinSignal + METHOD PROTECTED QBad + VAR_INPUT + value : BOOL; + END_VAR + _isQBad := value; + END_METHOD + + /// + /// Returns the QBad-Status of BinSignal. If valid = FALSE --> QBad = TRUE + /// + /// The QBad-Status of BinSignal + METHOD PUBLIC QBad : BOOL + QBad := _isQBad; + ; + END_METHOD + + END_CLASS +END_NAMESPACE + diff --git a/src/Input/IntInput.st b/src/Input/IntInput.st new file mode 100644 index 0000000..60ff956 --- /dev/null +++ b/src/Input/IntInput.st @@ -0,0 +1,50 @@ +NAMESPACE Siemens.AX.IO.Input + /// + /// Class to handle INT input values + /// + CLASS IntInput EXTENDS InputBase + + VAR PRIVATE + _value : INT := 0; + _default : INT := 0; + END_VAR + /// + /// The max and min value of datataype int + /// + VAR CONSTANT PUBLIC + MAX : INT := 32767; + MIN : INT := -32768; + END_VAR + + /// + /// Read the input value from Input area of type Integer + /// + /// The integer input value + /// The input value is valid (e.g. periphery is ok) + /// Default value if valid = FALSE + METHOD PUBLIC ReadCyclic + VAR_INPUT + value : INT; + valid : BOOL := TRUE; + default : INT := 0; + END_VAR + + THIS.QBad(value := NOT(valid)); + _value := value; + _default := default; + END_METHOD + + /// + /// Returns the actual value of integer + /// + /// Actual value of the INT + METHOD PUBLIC Q : Int + IF (NOT(THIS.QBad())) THEN + Q := _value; + ELSE + Q := _default; + END_IF; + END_METHOD + + END_CLASS +END_NAMESPACE diff --git a/src/Input/LRealInput.st b/src/Input/LRealInput.st new file mode 100644 index 0000000..049b7f7 --- /dev/null +++ b/src/Input/LRealInput.st @@ -0,0 +1,68 @@ +NAMESPACE Siemens.AX.IO.Input + /// + /// Class to handle LREAL input values + /// + CLASS LRealInput EXTENDS InputBase + + VAR PRIVATE + _value : LREAL := LREAL#0.0; + _default : LREAL := LREAL#0.0; + END_VAR + + /// + /// The max and min value of datataype LReal + /// + VAR CONSTANT PUBLIC + MAX : LREAL := LREAL#1.79769313486231e+308; + MIN : LREAL := LREAL#-1.79769313486231e+308; + END_VAR + + /// + /// Read the input value from Input area of type Real + /// + /// The integer input value + /// The input value is valid (e.g. periphery is ok) + /// Default value if valid = FALSE + METHOD PUBLIC ReadCyclic + VAR_INPUT + value : LWORD; + valid : BOOL := TRUE; + default : LREAL := LREAL#0.0; + END_VAR + + THIS.QBad(value := NOT(valid)); + _value := TO_LREAL(value); + _default := default; + END_METHOD + + /// + /// Read the input value from Input area of type Real + /// + /// The LREAL input value + /// The input value is valid (e.g. periphery is ok) + /// Default value if valid = FALSE + METHOD PUBLIC ReadCyclic + VAR_INPUT + value : LREAL; + valid : BOOL := TRUE; + default : LREAL := LREAL#0.0; + END_VAR + + THIS.QBad(value := NOT(valid)); + _value := value; + _default := default; + END_METHOD + + /// + /// Returns the actual value of integer + /// + /// Actual value of the LREAL input + METHOD PUBLIC Q : LREAL + IF (NOT(THIS.QBad())) THEN + Q := _value; + ELSE + Q := _default; + END_IF; + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/src/Input/RealInput.st b/src/Input/RealInput.st new file mode 100644 index 0000000..719e8b4 --- /dev/null +++ b/src/Input/RealInput.st @@ -0,0 +1,51 @@ +NAMESPACE Siemens.AX.IO.Input + /// + /// Class to handle REAL input values + /// + CLASS RealInput EXTENDS InputBase + + VAR PRIVATE + _value : REAL := REAL#0.0; + _default : REAL := REAL#0.0; + END_VAR + + /// + /// The max and min value of datataype LReal + /// + VAR CONSTANT PUBLIC + MAX : REAL := REAL#+3.402823e+38; + MIN : REAL := REAL#-3.402823e+38; + END_VAR + + /// + /// Read the input value from Input area of type Real + /// + /// The integer input value + /// The input value is valid (e.g. periphery is ok) + /// Default value if valid = FALSE + METHOD PUBLIC ReadCyclic + VAR_INPUT + value : DWORD; + valid : BOOL := TRUE; + default : REAL := REAL#0.0; + END_VAR + + THIS.QBad(value := NOT(valid)); + _value := TO_REAL(value); + _default := default; + END_METHOD + + /// + /// Returns the actual value of integer + /// + /// Actual value of the REAL input + METHOD PUBLIC Q : REAL + IF (NOT(THIS.QBad())) THEN + Q := _value; + ELSE + Q := _default; + END_IF; + END_METHOD + + END_CLASS +END_NAMESPACE diff --git a/src/Input/WordInput.st b/src/Input/WordInput.st new file mode 100644 index 0000000..c2a27a7 --- /dev/null +++ b/src/Input/WordInput.st @@ -0,0 +1,50 @@ +NAMESPACE Siemens.AX.IO.Input + /// + /// Class to handle WORD input values + /// + CLASS WordInput EXTENDS InputBase + + VAR PRIVATE + _value : WORD := WORD#16#0; + _default : WORD := WORD#16#0; + END_VAR + + /// + /// The max and min value of datataype word + /// + VAR CONSTANT PUBLIC + MIN : WORD := WORD#16#0; + MAX : WORD := WORD#16#FFFF; + END_VAR + + /// + /// Read the input value from Input area of type Integer + /// + /// The integer input value + /// The input value is valid (e.g. periphery is ok) + /// Default value if valid = FALSE + METHOD PUBLIC ReadCyclic + VAR_INPUT + value : WORD; + valid : BOOL := TRUE; + default : WORD := WORD#16#0; + END_VAR + + THIS.QBad(value := NOT(valid)); + _value := value; + _default := default; + END_METHOD + + /// + /// Returns the actual value of integer + /// + /// Actual value of the WORD input + METHOD PUBLIC Q : WORD + IF (NOT(THIS.QBad())) THEN + Q := _value; + ELSE + Q := _default; + END_IF; + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/src/Output/BinOutput.st b/src/Output/BinOutput.st new file mode 100644 index 0000000..bbf08ca --- /dev/null +++ b/src/Output/BinOutput.st @@ -0,0 +1,97 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Class BinOutput + /// An OOP concept to handle digital outputs as a own object + /// + CLASS BinOutput IMPLEMENTS IBinOutput + VAR + _state : BOOL; // internal status + _stateOld : BOOL := FALSE; + _switchedOn : BOOL; + _switchedOff : BOOL; + _hasChanged : BOOL; + END_VAR + + /// + /// Write the internal state to the digital output + /// (must be executed in every cycle - recommendation end of cycle) + /// + /// The internal state of the digital output + METHOD PUBLIC WriteCyclic + VAR_OUTPUT + Q : BOOL; + END_VAR + _switchedOn := _state AND NOT(_stateOld); + _switchedOff := NOT(_state) AND _stateOld; + _hasChanged := _switchedOn OR _switchedOff; + _stateOld := _state; + Q:= _state; + + END_METHOD + + /// + /// Set the digital output to "value" + /// + /// Value to set + METHOD PUBLIC SetQ + VAR_INPUT + value : BOOL; + END_VAR + _state := value; + END_METHOD + + /// + /// Set the digital output to "TRUE" + /// + METHOD PUBLIC SetOn + _state := TRUE; + END_METHOD + + /// + /// Set the digital output to "off" + /// + METHOD PUBLIC SetOff + _state := FALSE; + END_METHOD + + /// + /// Toggle the digital output to off-->on-->off + /// + METHOD PUBLIC Toggle + _state := NOT(_state); + END_METHOD + + /// + /// Returns the status of the digital output + /// + /// The status of the digital output + METHOD PUBLIC IsOn : BOOL + IsOn := _state; + END_METHOD + + /// + /// Returns TRUE if the value has changed + /// + /// TRUE if the value has changed + METHOD PUBLIC HasChanged : BOOL + HasChanged := _hasChanged; + END_METHOD + + /// + /// Returns TRUE if the value has switched on + /// + /// TRUE if the value has switched on + METHOD PUBLIC HasSwitchedOn : BOOL + HasSwitchedOn := _switchedOn; + END_METHOD + + /// + /// Returns TRUE if the value has switched off + /// + /// TRUE if the value has switched off + METHOD PUBLIC HasSwitchedOff : BOOL + HasSwitchedOff := _switchedOff; + END_METHOD + + END_CLASS +END_NAMESPACE diff --git a/src/Output/DWordOutput.st b/src/Output/DWordOutput.st new file mode 100644 index 0000000..c379eff --- /dev/null +++ b/src/Output/DWordOutput.st @@ -0,0 +1,36 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Class to handle double word output values + /// + CLASS DWordOutput EXTENDS OutputBase + VAR + _actualValue : DWORD; + _oldValue : DWORD; + END_VAR + + + /// + /// Set the value of class DWordOutput + /// + /// Value to set + METHOD PUBLIC SetValue + VAR_INPUT + value : DWORD; + END_VAR + _actualValue := value; + END_METHOD + + /// + /// Write the value to the periphery. But class can also be uses for none hardware access + /// + /// The actual value of the DWORD output + METHOD PUBLIC WriteCyclic + VAR_OUTPUT + Q : DWORD; + END_VAR + THIS.HasChanged(value := _actualValue <> _oldValue); + _oldValue := _actualValue; + Q:= _actualValue; + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/src/Output/DintOutput.st b/src/Output/DintOutput.st new file mode 100644 index 0000000..8694ab3 --- /dev/null +++ b/src/Output/DintOutput.st @@ -0,0 +1,35 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Class to handle double integer output values + /// + CLASS DintOutput EXTENDS OutputBase + VAR + _actualValue : DINT; + _oldValue : DINT; + END_VAR + + /// + /// Set the value of class DINTOutput + /// + /// Value to set + METHOD PUBLIC SetValue + VAR_INPUT + value : DINT; + END_VAR + _actualValue := value; + END_METHOD + + /// + /// Write the value to the periphery. But class can also be uses for none hardware access + /// + /// The actual value of the DINT output + METHOD PUBLIC WriteCyclic + VAR_OUTPUT + Q : DINT; + END_VAR + THIS.HasChanged(value := _actualValue <> _oldValue); + _oldValue := _actualValue; + Q:= _actualValue; + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/src/Output/IBinOutput.st b/src/Output/IBinOutput.st new file mode 100644 index 0000000..07912f5 --- /dev/null +++ b/src/Output/IBinOutput.st @@ -0,0 +1,17 @@ +NAMESPACE Siemens.Ax.IO.Output + INTERFACE IBinOutput + METHOD SetQ + VAR_INPUT + value : BOOL; + END_VAR + END_METHOD + METHOD SetOn + END_METHOD + METHOD SetOff + END_METHOD + METHOD Toggle + END_METHOD + METHOD IsOn : BOOL + END_METHOD + END_INTERFACE +END_NAMESPACE \ No newline at end of file diff --git a/src/Output/IntOutput.st b/src/Output/IntOutput.st new file mode 100644 index 0000000..e7920c0 --- /dev/null +++ b/src/Output/IntOutput.st @@ -0,0 +1,36 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Class to handle integer output values + /// + CLASS IntOutput EXTENDS OutputBase + VAR + _actualValue : INT; + _oldValue : INT; + END_VAR + + + /// + /// Set the value of class IntOutput + /// + /// Value to set + METHOD PUBLIC SetValue + VAR_INPUT + value : INT; + END_VAR + _actualValue := value; + END_METHOD + + /// + /// Write the value to the periphery. But class can also be uses for none hardware access + /// + /// The actual value of the INT output + METHOD PUBLIC WriteCyclic + VAR_OUTPUT + Q : INT; + END_VAR + THIS.HasChanged(value := _actualValue <> _oldValue); + _oldValue := _actualValue; + Q:= _actualValue; + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/src/Output/LIntOutput.st b/src/Output/LIntOutput.st new file mode 100644 index 0000000..d36c5d8 --- /dev/null +++ b/src/Output/LIntOutput.st @@ -0,0 +1,36 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Class to handle long integer output values + /// + CLASS LIntOutput EXTENDS OutputBase + VAR + _actualValue : LINT; + _oldValue : LINT; + END_VAR + + + /// + /// Set the value of class LIntOutput + /// + /// Value to set + METHOD PUBLIC SetValue + VAR_INPUT + value : LINT; + END_VAR + _actualValue := value; + END_METHOD + + /// + /// Write the value to the periphery. But class can also be uses for none hardware access + /// + /// The actual value of the LINT output + METHOD PUBLIC WriteCyclic + VAR_OUTPUT + Q : LINT; + END_VAR + THIS.HasChanged(value := _actualValue <> _oldValue); + _oldValue := _actualValue; + Q:= _actualValue; + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/src/Output/LRealOutput.st b/src/Output/LRealOutput.st new file mode 100644 index 0000000..c98d682 --- /dev/null +++ b/src/Output/LRealOutput.st @@ -0,0 +1,37 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Class to handle long REAL output values + /// + CLASS LRealOutput EXTENDS OutputBase + VAR + _actualValue : LREAL; + _oldValue : LREAL; + END_VAR + + + /// + /// Set the value of class LRealOutput + /// + /// Value to set + METHOD PUBLIC SetValue + VAR_INPUT + value : LREAL; + END_VAR + _actualValue := value; + END_METHOD + + /// + /// Write the value to the periphery. But class can also be uses for none hardware access + /// + /// The actual value of the LREAL output as LWORD + METHOD PUBLIC WriteCyclic + VAR_OUTPUT + Q : LWORD; + END_VAR + THIS.HasChanged(value := _actualValue <> _oldValue); + _oldValue := _actualValue; + Q:= TO_LWORD(_actualValue); + END_METHOD + + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/src/Output/OutputBase.st b/src/Output/OutputBase.st new file mode 100644 index 0000000..d5571f0 --- /dev/null +++ b/src/Output/OutputBase.st @@ -0,0 +1,30 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Status of binary output signal + /// + CLASS OutputBase + VAR + _hasChanged : BOOL; + END_VAR + + /// + /// Returns if the value has changed in the last cycle + /// + /// If the value has changed in the last cycle + METHOD PUBLIC HasChanged : BOOL + HasChanged := _hasChanged; + END_METHOD + + /// + /// Set the status of hasChanged. Must be implemented in the concrete class + /// + /// TRUE if the value has changed + METHOD PROTECTED HasChanged + VAR_INPUT + value : BOOL; + END_VAR + _hasChanged := true; + END_METHOD + + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/src/Output/RealOutput.st b/src/Output/RealOutput.st new file mode 100644 index 0000000..9b56bfe --- /dev/null +++ b/src/Output/RealOutput.st @@ -0,0 +1,37 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Class to handle REAL output values + /// + CLASS RealOutput EXTENDS OutputBase + VAR + _actualValue : REAL; + _oldValue : REAL; + END_VAR + + + /// + /// Set the value of class RealOutput + /// + /// Value to set + METHOD PUBLIC SetValue + VAR_INPUT + value : REAL; + END_VAR + _actualValue := value; + END_METHOD + + /// + /// Write the value to the periphery. But class can also be uses for none hardware access + /// + /// The actual value of the REAL output as DWORD + METHOD PUBLIC WriteCyclic + VAR_OUTPUT + Q : DWORD; + END_VAR + THIS.HasChanged(value := _actualValue <> _oldValue); + _oldValue := _actualValue; + Q:= TO_DWORD(_actualValue); + END_METHOD + + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/src/Output/WordOutput.st b/src/Output/WordOutput.st new file mode 100644 index 0000000..0db152c --- /dev/null +++ b/src/Output/WordOutput.st @@ -0,0 +1,36 @@ +NAMESPACE Siemens.AX.IO.Output + /// + /// Class to handle WORD output values + /// + CLASS WordOutput EXTENDS OutputBase + VAR + _actualValue : WORD; + _oldValue : WORD; + END_VAR + + + /// + /// Set the value of class WordOutput + /// + /// Value to set + METHOD PUBLIC SetValue + VAR_INPUT + value : WORD; + END_VAR + _actualValue := value; + END_METHOD + + /// + /// Write the value to the periphery. But class can also be uses for none hardware access + /// + /// The actual value of the WORD output + METHOD PUBLIC WriteCyclic + VAR_OUTPUT + Q : WORD; + END_VAR + THIS.HasChanged(value := _actualValue <> _oldValue); + _oldValue := _actualValue; + Q:= _actualValue; + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/test/Input/BinSignalExtTest.st b/test/Input/BinSignalExtTest.st new file mode 100644 index 0000000..96d7c56 --- /dev/null +++ b/test/Input/BinSignalExtTest.st @@ -0,0 +1,168 @@ +USING AxUnit; +USING Siemens.AX.IO.Input; +USING System.Timer; +//USING AxUnit; + +NAMESPACE Siemens.AX.IO.Input.Test + + {TestFixture} + CLASS BinSignalExtTest + VAR + o : BinSignalExt; + END_VAR + + {Test} + METHOD PUBLIC TestQ_And_expect_true + o.ReadCyclic(signal := TRUE); + Assert.Equal(expected := TRUE, actual := o.Q()); + END_METHOD + + {Test(isignal := FALSE, ienable := FALSE, idefault := FALSE, iexpq := FALSE, iexpqbad := TRUE)} + {Test(isignal := FALSE, ienable := FALSE, idefault := TRUE, iexpq := TRUE, iexpqbad := TRUE)} + {Test(isignal := FALSE, ienable := TRUE, idefault := FALSE, iexpq := FALSE, iexpqbad := FALSE)} + {Test(isignal := FALSE, ienable := TRUE, idefault := TRUE, iexpq := FALSE, iexpqbad := FALSE)} + + {Test(isignal := TRUE, ienable := FALSE, idefault := FALSE, iexpq := FALSE, iexpqbad := TRUE)} + {Test(isignal := TRUE, ienable := FALSE, idefault := TRUE, iexpq := TRUE, iexpqbad := TRUE)} + {Test(isignal := TRUE, ienable := TRUE, idefault := FALSE, iexpq := TRUE, iexpqbad := FALSE)} + {Test(isignal := TRUE, ienable := TRUE, idefault := TRUE, iexpq := TRUE, iexpqbad := FALSE)} + + METHOD PUBLIC execute + VAR_INPUT + isignal : BOOL; + ienable : BOOL; + idefault : BOOL; + iexpq : BOOL; + iexpqbad : BOOL; + END_VAR + + o.ReadCyclic(signal := iSignal, valid := iEnable, default := iDefault); + AxUnit.Assert.Equal(expected := iExpQ, actual := o.Q()); + + END_METHOD + + {Test(isignal := TRUE, ienable := TRUE, idefault := FALSE, iexpq := TRUE, iexpqris := TRUE, iexpqfal := FALSE, itestfallingedge := FALSE)} + {Test(isignal := FALSE, ienable := TRUE, idefault := FALSE, iexpq := FALSE, iexpqris := FALSE, iexpqfal := TRUE, itestfallingedge := TRUE)} + //----------------------------------------------------------- + // test SetOff + //----------------------------------------------------------- + METHOD PUBLIC QRis2 + VAR_INPUT + isignal : BOOL; + ienable : BOOL; + idefault : BOOL; + iexpq : BOOL; + iexpqris : BOOL; + iexpqfal : BOOL; + itestfallingedge : BOOL; + END_VAR + + + IF (iTestFallingEdge) then + o.ReadCyclic(signal := TRUE, valid := iEnable, default := iDefault); + END_IF; + + o.ReadCyclic(signal := iSignal, valid := iEnable, default := iDefault); + AxUnit.Assert.Equal(expected := iExpQ, actual := o.Q()); + AxUnit.Assert.Equal(expected := iExpQRis, actual := o.QRis()); + AxUnit.Assert.Equal(expected := iExpQFal, actual := o.QFal()); + + o.ReadCyclic(signal := iSignal, valid := iEnable, default := iDefault); + AxUnit.Assert.Equal(expected := iExpQ, actual := o.Q()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + + END_METHOD + + //----------------------------------------------------------- + // test Q + //----------------------------------------------------------- + {Test} + METHOD PUBLIC Q + VAR_TEMP + END_VAR + AxUnit.Assert.Equal(expected := FALSE, actual := o.Q()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.Q()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QBad()); + END_METHOD + + //----------------------------------------------------------- + // test QRis + //----------------------------------------------------------- + {Test} + METHOD PUBLIC QRis + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QRis()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + + o.invert := TRUE; + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QRis()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + + END_METHOD + //----------------------------------------------------------- + // test QFal + //----------------------------------------------------------- + {Test} + METHOD PUBLIC QFal + + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QFal()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + + o.invert := TRUE; + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QFal()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + + + END_METHOD + + //----------------------------------------------------------- + // test QBad + //----------------------------------------------------------- + {Test} + METHOD PUBLIC QBad + + o.ReadCyclic(signal := TRUE, valid := FALSE, default := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QBad()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.Q()); + + o.ReadCyclic(signal := FALSE, valid := FALSE, default := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QBad()); + AxUnit.Assert.Equal(expected := TRUE, actual := o.Q()); + + o.invert := TRUE; + o.ReadCyclic(signal := TRUE, valid := FALSE, default := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QBad()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.Q()); + + o.ReadCyclic(signal := FALSE, valid := FALSE, default := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QBad()); + AxUnit.Assert.Equal(expected := TRUE, actual := o.Q()); + + + o.invert := TRUE; + AxUnit.Assert.Equal(expected := TRUE, actual := o.IsInverted()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.Q()); + + END_METHOD + + + + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/test/Input/BinSignalExtTest_TimeBehavior.st b/test/Input/BinSignalExtTest_TimeBehavior.st new file mode 100644 index 0000000..27c07dc --- /dev/null +++ b/test/Input/BinSignalExtTest_TimeBehavior.st @@ -0,0 +1,55 @@ +USING AxUnit; +USING Siemens.AX.IO.Input; +USING System.Timer; +//USING AxUnit; + +NAMESPACE Siemens.AX.IO.Input.Test + + {TestFixture} + CLASS BinSignalExt_TimingTest + VAR + o : BinSignalExt; + END_VAR + + {Test} + METHOD PUBLIC TestOnDelay_After_signal_true_expect_false + o.ondelay := T#10ms; + o.ReadCyclic(signal := TRUE); + Assert.Equal(expected := FALSE, actual := o.Q()); + END_METHOD + + {Test} + METHOD PUBLIC TestOnDelay_10ms_After_signal_true_expect_true + AxUnit.Mocking.Mock('System.Timer.OnDelay', 'Siemens.AX.Mocks.OnDelayMock_true'); + o.ondelay := T#10ms; + o.ReadCyclic(signal := TRUE); + Assert.Equal(expected := TRUE, actual := o.Q()); + END_METHOD + + {Test} + METHOD PUBLIC TestOnDelay_10ms_signal_goes_to_False_expect_false + //this.TestOnDelay_10ms_After_signal_true_expect_true(); + AxUnit.Mocking.Mock('System.Timer.OnDelay', 'Siemens.AX.Mocks.OnDelayMock_true'); + o.ondelay := T#10ms; + o.ReadCyclic(signal := TRUE); + Assert.Equal(expected := TRUE, actual := o.Q()); + AxUnit.Mocking.Mock('System.Timer.OnDelay', 'Siemens.AX.Mocks.OnDelayMock_false'); + o.ReadCyclic(signal := FALSE); + Assert.Equal(expected := FALSE, actual := o.Q()); + END_METHOD + + + {Test} + METHOD PUBLIC TestOffDelay_10ms_After_signal_true_expect_true + AxUnit.Mocking.Mock('System.Timer.OffDelay', 'Siemens.AX.Mocks.OffDelayMock_true'); + o.offdelay := T#10ms; + o.ReadCyclic(signal := TRUE); + o.ReadCyclic(signal := FALSE); + Assert.Equal(expected := TRUE, actual := o.Q()); + + AxUnit.Mocking.Mock('System.Timer.OffDelay', 'Siemens.AX.Mocks.OffDelayMock_false'); + o.ReadCyclic(signal := FALSE); + Assert.Equal(expected := FALSE, actual := o.Q()); + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/test/Input/BinSignalTest.st b/test/Input/BinSignalTest.st new file mode 100644 index 0000000..67641d2 --- /dev/null +++ b/test/Input/BinSignalTest.st @@ -0,0 +1,168 @@ +USING AxUnit; +USING Siemens.AX.IO.Input; +USING System.Timer; +//USING AxUnit; + +NAMESPACE Siemens.AX.IO.Input.Test + + {TestFixture} + CLASS BinSignalTest + VAR + o : BinSignal; + END_VAR + + {Test} + METHOD PUBLIC TestQ_And_expect_true + o.ReadCyclic(signal := TRUE); + Assert.Equal(expected := TRUE, actual := o.Q()); + END_METHOD + + {Test(isignal := FALSE, ienable := FALSE, idefault := FALSE, iexpq := FALSE, iexpqbad := TRUE)} + {Test(isignal := FALSE, ienable := FALSE, idefault := TRUE, iexpq := TRUE, iexpqbad := TRUE)} + {Test(isignal := FALSE, ienable := TRUE, idefault := FALSE, iexpq := FALSE, iexpqbad := FALSE)} + {Test(isignal := FALSE, ienable := TRUE, idefault := TRUE, iexpq := FALSE, iexpqbad := FALSE)} + + {Test(isignal := TRUE, ienable := FALSE, idefault := FALSE, iexpq := FALSE, iexpqbad := TRUE)} + {Test(isignal := TRUE, ienable := FALSE, idefault := TRUE, iexpq := TRUE, iexpqbad := TRUE)} + {Test(isignal := TRUE, ienable := TRUE, idefault := FALSE, iexpq := TRUE, iexpqbad := FALSE)} + {Test(isignal := TRUE, ienable := TRUE, idefault := TRUE, iexpq := TRUE, iexpqbad := FALSE)} + + METHOD PUBLIC execute + VAR_INPUT + isignal : BOOL; + ienable : BOOL; + idefault : BOOL; + iexpq : BOOL; + iexpqbad : BOOL; + END_VAR + + o.ReadCyclic(signal := iSignal, valid := iEnable, default := iDefault); + AxUnit.Assert.Equal(expected := iExpQ, actual := o.Q()); + + END_METHOD + + {Test(isignal := TRUE, ienable := TRUE, idefault := FALSE, iexpq := TRUE, iexpqris := TRUE, iexpqfal := FALSE, itestfallingedge := FALSE)} + {Test(isignal := FALSE, ienable := TRUE, idefault := FALSE, iexpq := FALSE, iexpqris := FALSE, iexpqfal := TRUE, itestfallingedge := TRUE)} + //----------------------------------------------------------- + // test SetOff + //----------------------------------------------------------- + METHOD PUBLIC QRis2 + VAR_INPUT + isignal : BOOL; + ienable : BOOL; + idefault : BOOL; + iexpq : BOOL; + iexpqris : BOOL; + iexpqfal : BOOL; + itestfallingedge : BOOL; + END_VAR + + + IF (iTestFallingEdge) then + o.ReadCyclic(signal := TRUE, valid := iEnable, default := iDefault); + END_IF; + + o.ReadCyclic(signal := iSignal, valid := iEnable, default := iDefault); + AxUnit.Assert.Equal(expected := iExpQ, actual := o.Q()); + AxUnit.Assert.Equal(expected := iExpQRis, actual := o.QRis()); + AxUnit.Assert.Equal(expected := iExpQFal, actual := o.QFal()); + + o.ReadCyclic(signal := iSignal, valid := iEnable, default := iDefault); + AxUnit.Assert.Equal(expected := iExpQ, actual := o.Q()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + + END_METHOD + + //----------------------------------------------------------- + // test Q + //----------------------------------------------------------- + {Test} + METHOD PUBLIC Q + VAR_TEMP + END_VAR + AxUnit.Assert.Equal(expected := FALSE, actual := o.Q()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.Q()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QBad()); + END_METHOD + + //----------------------------------------------------------- + // test QRis + //----------------------------------------------------------- + {Test} + METHOD PUBLIC QRis + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QRis()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + + o.invert := TRUE; + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QRis()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QRis()); + + END_METHOD + //----------------------------------------------------------- + // test QFal + //----------------------------------------------------------- + {Test} + METHOD PUBLIC QFal + + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QFal()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + + o.invert := TRUE; + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + o.ReadCyclic(signal := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QFal()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := FALSE, actual := o.QFal()); + + + END_METHOD + + //----------------------------------------------------------- + // test QBad + //----------------------------------------------------------- + {Test} + METHOD PUBLIC QBad + + o.ReadCyclic(signal := TRUE, valid := FALSE, default := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QBad()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.Q()); + + o.ReadCyclic(signal := FALSE, valid := FALSE, default := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QBad()); + AxUnit.Assert.Equal(expected := TRUE, actual := o.Q()); + + o.invert := TRUE; + o.ReadCyclic(signal := TRUE, valid := FALSE, default := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QBad()); + AxUnit.Assert.Equal(expected := FALSE, actual := o.Q()); + + o.ReadCyclic(signal := FALSE, valid := FALSE, default := TRUE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.QBad()); + AxUnit.Assert.Equal(expected := TRUE, actual := o.Q()); + + + o.invert := TRUE; + AxUnit.Assert.Equal(expected := TRUE, actual := o.IsInverted()); + o.ReadCyclic(signal := FALSE); + AxUnit.Assert.Equal(expected := TRUE, actual := o.Q()); + + END_METHOD + + + + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/test/Input/DintInputTest.st b/test/Input/DintInputTest.st new file mode 100644 index 0000000..01fd7fa --- /dev/null +++ b/test/Input/DintInputTest.st @@ -0,0 +1,43 @@ +USING Siemens.AX.IO.Input; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Input.Test + + {TestFixture} + CLASS DintInputTest + VAR + o : DintInput; + oMinMaxTest : DintInput; + END_VAR + + + {Test(signalValue := DINT#0, isValid := FALSE, defaultValue := DINT#0, expectedValueWhenQBad := DINT#0, expectedQBad := TRUE)} + {Test(signalValue := DINT#0, isValid := FALSE, defaultValue := DINT#1, expectedValueWhenQBad := DINT#1, expectedQBad := TRUE)} + {Test(signalValue := DINT#0, isValid := TRUE, defaultValue := DINT#0, expectedValueWhenQBad := DINT#0, expectedQBad := FALSE)} + {Test(signalValue := DINT#0, isValid := TRUE, defaultValue := DINT#1, expectedValueWhenQBad := DINT#0, expectedQBad := FALSE)} + + {Test(signalValue := DINT#100, isValid := FALSE, defaultValue := DINT#0, expectedValueWhenQBad := DINT#0, expectedQBad := TRUE)} + {Test(signalValue := DINT#100, isValid := FALSE, defaultValue := DINT#1, expectedValueWhenQBad := DINT#1, expectedQBad := TRUE)} + {Test(signalValue := DINT#100, isValid := TRUE, defaultValue := DINT#0, expectedValueWhenQBad := DINT#100, expectedQBad := FALSE)} + {Test(signalValue := DINT#100, isValid := TRUE, defaultValue := DINT#1, expectedValueWhenQBad := DINT#100, expectedQBad := FALSE)} + METHOD PUBLIC Check_different_values_and_results + VAR_INPUT + signalValue : DINT; + isValid : BOOL; + defaultValue : DINT; + expectedValueWhenQBad : DINT; + expectedQBad : BOOL; + END_VAR + + o.ReadCyclic(value := signalValue, valid := isValid, default := defaultValue); + Assert.Equal(expected := expectedValueWhenQBad, actual := o.Q()); + Assert.Equal(expected := expectedQBad, actual := o.QBad()); + END_METHOD + + {Test} + METHOD PUBLIC CheckMinMax + Assert.Equal(expected := DINT#-2147483648, actual := oMinMaxTest.Min); + Assert.Equal(expected := DINT#2147483647, actual := oMinMaxTest.Max); + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/test/Input/IntInputTest.st b/test/Input/IntInputTest.st new file mode 100644 index 0000000..581f089 --- /dev/null +++ b/test/Input/IntInputTest.st @@ -0,0 +1,44 @@ +USING Siemens.AX.IO.Input; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Input.Test + + {TestFixture} + CLASS IntInputTest + VAR + o : IntInput; + oMinMaxTest : IntInput; + END_VAR + + + {Test(signalValue := INT#0, isValid := FALSE, defaultValue := INT#0, expectedValueWhenQBad := INT#0, expectedQBad := TRUE)} + {Test(signalValue := INT#0, isValid := FALSE, defaultValue := INT#1, expectedValueWhenQBad := INT#1, expectedQBad := TRUE)} + {Test(signalValue := INT#0, isValid := TRUE, defaultValue := INT#0, expectedValueWhenQBad := INT#0, expectedQBad := FALSE)} + {Test(signalValue := INT#0, isValid := TRUE, defaultValue := INT#1, expectedValueWhenQBad := INT#0, expectedQBad := FALSE)} + + {Test(signalValue := INT#100, isValid := FALSE, defaultValue := INT#0, expectedValueWhenQBad := INT#0, expectedQBad := TRUE)} + {Test(signalValue := INT#100, isValid := FALSE, defaultValue := INT#1, expectedValueWhenQBad := INT#1, expectedQBad := TRUE)} + {Test(signalValue := INT#100, isValid := TRUE, defaultValue := INT#0, expectedValueWhenQBad := INT#100, expectedQBad := FALSE)} + {Test(signalValue := INT#100, isValid := TRUE, defaultValue := INT#1, expectedValueWhenQBad := INT#100, expectedQBad := FALSE)} + METHOD PUBLIC Check_different_values_and_results + VAR_INPUT + signalValue : INT; + isValid : BOOL; + defaultValue : INT; + expectedValueWhenQBad : INT; + expectedQBad : BOOL; + END_VAR + + o.ReadCyclic(value := signalValue, valid := isValid, default := defaultValue); + Assert.Equal(expected := expectedValueWhenQBad, actual := o.Q()); + Assert.Equal(expected := expectedQBad, actual := o.QBad()); + END_METHOD + + {Test} + METHOD PUBLIC CheckMinMax + AxUnit.Assert.Equal(expected := -32768, actual := oMinMaxTest.Min); + AxUnit.Assert.Equal(expected := 32767, actual := oMinMaxTest.Max); + + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/test/Input/LRealInputTest.st b/test/Input/LRealInputTest.st new file mode 100644 index 0000000..7434d5c --- /dev/null +++ b/test/Input/LRealInputTest.st @@ -0,0 +1,66 @@ +USING Siemens.AX.IO.Input; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Input.Test + + {TestFixture} + CLASS LRealInputTest + VAR + o : LRealInput; + oMinMaxTest : LRealInput; + END_VAR + + + {Test(signalValue := LREAL#0.0, isValid := FALSE, defaultValue := LREAL#0.0, expectedValueWhenQBad := LREAL#0.0, expectedQBad := TRUE)} + {Test(signalValue := LREAL#0.0, isValid := FALSE, defaultValue := LREAL#1.0, expectedValueWhenQBad := LREAL#1.0, expectedQBad := TRUE)} + {Test(signalValue := LREAL#0.0, isValid := TRUE, defaultValue := LREAL#0.0, expectedValueWhenQBad := LREAL#0.0, expectedQBad := FALSE)} + {Test(signalValue := LREAL#0.0, isValid := TRUE, defaultValue := LREAL#1.0, expectedValueWhenQBad := LREAL#0.0, expectedQBad := FALSE)} + + {Test(signalValue := LREAL#100.0, isValid := FALSE, defaultValue := LREAL#0.0, expectedValueWhenQBad := LREAL#0.0, expectedQBad := TRUE)} + {Test(signalValue := LREAL#100.0, isValid := FALSE, defaultValue := LREAL#1.0, expectedValueWhenQBad := LREAL#1.0, expectedQBad := TRUE)} + {Test(signalValue := LREAL#100.0, isValid := TRUE, defaultValue := LREAL#0.0, expectedValueWhenQBad := LREAL#100.0, expectedQBad := FALSE)} + {Test(signalValue := LREAL#100.0, isValid := TRUE, defaultValue := LREAL#1.0, expectedValueWhenQBad := LREAL#100.0, expectedQBad := FALSE)} + METHOD PUBLIC Check_different_values_and_results + VAR_INPUT + signalValue : LREAL; + isValid : BOOL; + defaultValue : LREAL; + expectedValueWhenQBad : LREAL; + expectedQBad : BOOL; + END_VAR + + o.ReadCyclic(value := TO_LWORD(signalValue), valid := isValid, default := defaultValue); + Assert.Equal(expected := expectedValueWhenQBad, actual := o.Q()); + Assert.Equal(expected := expectedQBad, actual := o.QBad()); + END_METHOD + + {Test(signalValue := LREAL#0.0, isValid := FALSE, defaultValue := LREAL#0.0, expectedValueWhenQBad := LREAL#0.0, expectedQBad := TRUE)} + {Test(signalValue := LREAL#0.0, isValid := FALSE, defaultValue := LREAL#1.0, expectedValueWhenQBad := LREAL#1.0, expectedQBad := TRUE)} + {Test(signalValue := LREAL#0.0, isValid := TRUE, defaultValue := LREAL#0.0, expectedValueWhenQBad := LREAL#0.0, expectedQBad := FALSE)} + {Test(signalValue := LREAL#0.0, isValid := TRUE, defaultValue := LREAL#1.0, expectedValueWhenQBad := LREAL#0.0, expectedQBad := FALSE)} + + {Test(signalValue := LREAL#100.0, isValid := FALSE, defaultValue := LREAL#0.0, expectedValueWhenQBad := LREAL#0.0, expectedQBad := TRUE)} + {Test(signalValue := LREAL#100.0, isValid := FALSE, defaultValue := LREAL#1.0, expectedValueWhenQBad := LREAL#1.0, expectedQBad := TRUE)} + {Test(signalValue := LREAL#100.0, isValid := TRUE, defaultValue := LREAL#0.0, expectedValueWhenQBad := LREAL#100.0, expectedQBad := FALSE)} + {Test(signalValue := LREAL#100.0, isValid := TRUE, defaultValue := LREAL#1.0, expectedValueWhenQBad := LREAL#100.0, expectedQBad := FALSE)} + METHOD PUBLIC Check_different_LREAL_values_and_results + VAR_INPUT + signalValue : LREAL; + isValid : BOOL; + defaultValue : LREAL; + expectedValueWhenQBad : LREAL; + expectedQBad : BOOL; + END_VAR + + o.ReadCyclic(value := signalValue, valid := isValid, default := defaultValue); + Assert.Equal(expected := expectedValueWhenQBad, actual := o.Q()); + Assert.Equal(expected := expectedQBad, actual := o.QBad()); + END_METHOD + + {Test} + METHOD PUBLIC CheckMinMax + Assert.Equal(expected := LREAL#1.79769313486231e+308, actual := oMinMaxTest.Max); + Assert.Equal(expected := LREAL#-1.79769313486231e+308, actual := oMinMaxTest.Min); + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/test/Input/RealInputTest.st b/test/Input/RealInputTest.st new file mode 100644 index 0000000..4116f16 --- /dev/null +++ b/test/Input/RealInputTest.st @@ -0,0 +1,44 @@ +USING Siemens.AX.IO.Input; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Input.Test + + {TestFixture} + CLASS RealInputTest + VAR + o : RealInput; + oMinMaxTest : RealInput; + END_VAR + + + {Test(signalValue := REAL#0.0, isValid := FALSE, defaultValue := REAL#0.0, expectedValueWhenQBad := REAL#0.0, expectedQBad := TRUE)} + {Test(signalValue := REAL#0.0, isValid := FALSE, defaultValue := REAL#1.0, expectedValueWhenQBad := REAL#1.0, expectedQBad := TRUE)} + {Test(signalValue := REAL#0.0, isValid := TRUE, defaultValue := REAL#0.0, expectedValueWhenQBad := REAL#0.0, expectedQBad := FALSE)} + {Test(signalValue := REAL#0.0, isValid := TRUE, defaultValue := REAL#1.0, expectedValueWhenQBad := REAL#0.0, expectedQBad := FALSE)} + + {Test(signalValue := REAL#100.0, isValid := FALSE, defaultValue := REAL#0.0, expectedValueWhenQBad := REAL#0.0, expectedQBad := TRUE)} + {Test(signalValue := REAL#100.0, isValid := FALSE, defaultValue := REAL#1.0, expectedValueWhenQBad := REAL#1.0, expectedQBad := TRUE)} + {Test(signalValue := REAL#100.0, isValid := TRUE, defaultValue := REAL#0.0, expectedValueWhenQBad := REAL#100.0, expectedQBad := FALSE)} + {Test(signalValue := REAL#100.0, isValid := TRUE, defaultValue := REAL#1.0, expectedValueWhenQBad := REAL#100.0, expectedQBad := FALSE)} + METHOD PUBLIC Check_different_values_and_results + VAR_INPUT + signalValue : REAL; + isValid : BOOL; + defaultValue : REAL; + expectedValueWhenQBad : REAL; + expectedQBad : BOOL; + END_VAR + + o.ReadCyclic(value := TO_DWORD(signalValue), valid := isValid, default := defaultValue); + Assert.Equal(expected := expectedValueWhenQBad, actual := o.Q()); + Assert.Equal(expected := expectedQBad, actual := o.QBad()); + END_METHOD + + {Test} + METHOD PUBLIC CheckMinMax + Assert.Equal(expected := REAL#+3.402823e+38, actual := oMinMaxTest.Max); + Assert.Equal(expected := REAL#-3.402823e+38, actual := oMinMaxTest.Min); + END_METHOD + END_CLASS +END_NAMESPACE + diff --git a/test/Input/WordInputTest.st b/test/Input/WordInputTest.st new file mode 100644 index 0000000..22ddc19 --- /dev/null +++ b/test/Input/WordInputTest.st @@ -0,0 +1,44 @@ +USING Siemens.AX.IO.Input; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Input.Test + + {TestFixture} + CLASS WordInputTest + VAR + o : WordInput; + oMinMaxTest : WordInput; + END_VAR + + + {Test(signalValue := WORD#16#0, isValid := FALSE, defaultValue := WORD#16#0, expectedValueWhenQBad := WORD#16#0, expectedQBad := TRUE)} + {Test(signalValue := WORD#16#0, isValid := FALSE, defaultValue := WORD#16#1, expectedValueWhenQBad := WORD#16#1, expectedQBad := TRUE)} + {Test(signalValue := WORD#16#0, isValid := TRUE, defaultValue := WORD#16#0, expectedValueWhenQBad := WORD#16#0, expectedQBad := FALSE)} + {Test(signalValue := WORD#16#0, isValid := TRUE, defaultValue := WORD#16#1, expectedValueWhenQBad := WORD#16#0, expectedQBad := FALSE)} + + {Test(signalValue := WORD#16#100, isValid := FALSE, defaultValue := WORD#16#0, expectedValueWhenQBad := WORD#16#0, expectedQBad := TRUE)} + {Test(signalValue := WORD#16#100, isValid := FALSE, defaultValue := WORD#16#1, expectedValueWhenQBad := WORD#16#1, expectedQBad := TRUE)} + {Test(signalValue := WORD#16#100, isValid := TRUE, defaultValue := WORD#16#0, expectedValueWhenQBad := WORD#16#100, expectedQBad := FALSE)} + {Test(signalValue := WORD#16#100, isValid := TRUE, defaultValue := WORD#16#1, expectedValueWhenQBad := WORD#16#100, expectedQBad := FALSE)} + METHOD PUBLIC Check_different_values_and_results + VAR_INPUT + signalValue : WORD; + isValid : BOOL; + defaultValue : WORD; + expectedValueWhenQBad : WORD; + expectedQBad : BOOL; + END_VAR + + o.ReadCyclic(value := signalValue, valid := isValid, default := defaultValue); + Assert.Equal(expected := expectedValueWhenQBad, actual := o.Q()); + Assert.Equal(expected := expectedQBad, actual := o.QBad()); + END_METHOD + + {Test} + METHOD PUBLIC CheckMinMax + AxUnit.Assert.Equal(expected := WORD#16#0, actual := oMinMaxTest.Min); + AxUnit.Assert.Equal(expected := WORD#16#FFFF, actual := oMinMaxTest.Max); + + END_METHOD + END_CLASS +END_NAMESPACE \ No newline at end of file diff --git a/test/Output/BinOutputTest.st b/test/Output/BinOutputTest.st new file mode 100644 index 0000000..f4d46fe --- /dev/null +++ b/test/Output/BinOutputTest.st @@ -0,0 +1,184 @@ +// USING Siemens.AX.IO.Output; + +// NAMESPACE Siemens.AX.IO.Output.Test + +// //----------------------------------------------------------- +// // test SetQ(value) +// //----------------------------------------------------------- +// {Test(value := 0, expect := 0)} +// {Test(value := 1, expect := 1)} +// FUNCTION TestSetQ +// VAR_INPUT +// value : INT; +// expect : INT; +// END_VAR +// VAR_EXTERNAL +// bo1 : BinOutput; +// END_VAR +// VAR_TEMP +// tValue : BOOL; +// tExp : BOOL; +// tActual : BOOL; +// END_VAR + +// tValue := value <> 0; +// tExp := expect <> 0; + +// bo1.SetQ(value := tValue); +// AxUnit.Assert.Equal(expected := tExp, actual := bo1.IsOn()); +// END_FUNCTION + +// //----------------------------------------------------------- +// // test SetOn +// //----------------------------------------------------------- +// {Test} +// FUNCTION SetOn +// VAR_EXTERNAL +// bo2 : BinOutput; +// END_VAR + +// AxUnit.Assert.Equal(expected := FALSE, actual := bo2.IsOn()); +// bo2.SetOn(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo2.IsOn()); +// END_FUNCTION + +// //----------------------------------------------------------- +// // test SetOff +// //----------------------------------------------------------- +// {Test} +// FUNCTION SetOff + +// VAR_EXTERNAL +// bo3 : BinOutput; +// END_VAR + +// bo3.SetOn(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo3.IsOn()); +// bo3.SetOff(); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo3.IsOn()); +// END_FUNCTION + +// //----------------------------------------------------------- +// // test SetOff +// //----------------------------------------------------------- +// {Test} +// FUNCTION Toggle + +// VAR_EXTERNAL +// bo4 : BinOutput; +// END_VAR + +// AxUnit.Assert.Equal(expected := FALSE, actual := bo4.IsOn()); +// bo4.Toggle(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo4.IsOn()); +// bo4.Toggle(); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo4.IsOn()); +// END_FUNCTION + +// //----------------------------------------------------------- +// // HasChanged +// //----------------------------------------------------------- +// {Test} +// FUNCTION HasChanged_Test_Toggle + +// VAR_EXTERNAL +// bo5 : BinOutput; +// END_VAR + + +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasSwitchedOff()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasSwitchedOn()); + +// bo5.Toggle(); +// bo5.WriteCyclic(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo5.HasChanged()); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo5.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasSwitchedOff()); +// bo5.WriteCyclic(); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasSwitchedOff()); + + +// bo5.Toggle(); +// bo5.WriteCyclic(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo5.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo5.HasSwitchedOff()); + +// bo5.WriteCyclic(); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo5.HasSwitchedOff()); +// END_FUNCTION + +// {Test} +// FUNCTION HasChanged_Test_SetQ + +// VAR_EXTERNAL +// bo6 : BinOutput; +// END_VAR +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasSwitchedOff()); + +// bo6.SetQ(TRUE); +// bo6.WriteCyclic(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo6.HasChanged()); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo6.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasSwitchedOff()); + +// bo6.WriteCyclic(); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasSwitchedOff()); + +// bo6.SetQ(FALSE); +// bo6.WriteCyclic(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo6.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo6.HasSwitchedOff()); + +// bo6.WriteCyclic(); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo6.HasSwitchedOff()); + +// END_FUNCTION + + +// {Test} +// FUNCTION HasChanged_Test_SetOnOff + +// VAR_EXTERNAL +// bo7 : BinOutput; +// END_VAR +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasSwitchedOff()); + +// bo7.SetOn(); +// bo7.WriteCyclic(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo7.HasChanged()); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo7.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasSwitchedOff()); +// bo7.WriteCyclic(); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasSwitchedOff()); + +// bo7.SetOff(); +// bo7.WriteCyclic(); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo7.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := TRUE, actual := bo7.HasSwitchedOff()); +// bo7.WriteCyclic(); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasChanged()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasSwitchedOn()); +// AxUnit.Assert.Equal(expected := FALSE, actual := bo7.HasSwitchedOff()); +// END_FUNCTION + + + +// END_NAMESPACE \ No newline at end of file diff --git a/test/Output/DWordOutputTest.st b/test/Output/DWordOutputTest.st new file mode 100644 index 0000000..5320107 --- /dev/null +++ b/test/Output/DWordOutputTest.st @@ -0,0 +1,45 @@ +USING Siemens.AX.IO.Output; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Output.Test + + {TestFixture} + CLASS TestDWordOutputSetValueClass + VAR + o : DWordOutput; + oHasChanged : DWordOutput; + END_VAR + + // ----------------------------------------------------------- + // test SetQ(value) + // ----------------------------------------------------------- + {Test(value := DWORD#16#0, actual := DWORD#16#0)} + {Test(value := DWORD#16#1, actual := DWORD#16#1)} + METHOD PUBLIC TestOutputSetValue + VAR_INPUT + value : DWORD; + actual : DWORD; + END_VAR + VAR_TEMP + _expect : DWORD; + END_VAR + + + o.SetValue(value := value); + o.WriteCyclic(Q => _expect); + Assert.Equal(expected := _expect, actual := actual); + END_METHOD + + + {Test} + METHOD PUBLIC TestOutputHasChanged + VAR_TEMP + value : DWORD; + END_VAR + Assert.Equal(FALSE, oHasChanged.HasChanged()); + oHasChanged.SetValue(value := DWORD#1); + oHasChanged.WriteCyclic(Q => value); + Assert.Equal(TRUE, oHasChanged.HasChanged()); + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/test/Output/DintOutputTest.st b/test/Output/DintOutputTest.st new file mode 100644 index 0000000..fa21651 --- /dev/null +++ b/test/Output/DintOutputTest.st @@ -0,0 +1,45 @@ +USING Siemens.AX.IO.Output; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Output.Test + + {TestFixture} + CLASS TestDIntOutputSetValueClass + VAR + o : DIntOutput; + oHasChanged : DIntOutput; + END_VAR + + // ----------------------------------------------------------- + // test SetQ(value) + // ----------------------------------------------------------- + {Test(value := DINT#0, actual := DINT#0)} + {Test(value := DINT#1, actual := DINT#1)} + METHOD PUBLIC TestOutputSetValue + VAR_INPUT + value : DINT; + actual : DINT; + END_VAR + VAR_TEMP + _expect : DINT; + END_VAR + + + o.SetValue(value := value); + o.WriteCyclic(Q => _expect); + Assert.Equal(expected := _expect, actual := actual); + END_METHOD + + + {Test} + METHOD PUBLIC TestOutputHasChanged + VAR_TEMP + value : DINT; + END_VAR + Assert.Equal(FALSE, oHasChanged.HasChanged()); + oHasChanged.SetValue(value := DINT#1); + oHasChanged.WriteCyclic(Q => value); + Assert.Equal(TRUE, oHasChanged.HasChanged()); + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/test/Output/IntOutputTest.st b/test/Output/IntOutputTest.st new file mode 100644 index 0000000..63ad04f --- /dev/null +++ b/test/Output/IntOutputTest.st @@ -0,0 +1,45 @@ +USING Siemens.AX.IO.Output; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Output.Test + + {TestFixture} + CLASS TestIntOutputSetValueClass + VAR + o : IntOutput; + oHasChanged : IntOutput; + END_VAR + + // ----------------------------------------------------------- + // test SetQ(value) + // ----------------------------------------------------------- + {Test(value := 0, actual := 0)} + {Test(value := 1, actual := 1)} + METHOD PUBLIC TestOutputSetValue + VAR_INPUT + value : INT; + actual : INT; + END_VAR + VAR_TEMP + _expect : INT; + END_VAR + + + o.SetValue(value := value); + o.WriteCyclic(Q => _expect); + Assert.Equal(expected := _expect, actual := actual); + END_METHOD + + + {Test} + METHOD PUBLIC TestOutputHasChanged + VAR_TEMP + value : INT; + END_VAR + Assert.Equal(FALSE, oHasChanged.HasChanged()); + oHasChanged.SetValue(value := 1); + oHasChanged.WriteCyclic(Q => value); + Assert.Equal(TRUE, oHasChanged.HasChanged()); + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/test/Output/LRealTest.st b/test/Output/LRealTest.st new file mode 100644 index 0000000..4da81a9 --- /dev/null +++ b/test/Output/LRealTest.st @@ -0,0 +1,45 @@ +USING Siemens.AX.IO.Output; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Output.Test + + {TestFixture} + CLASS TestLRealOutputSetValueClass + VAR + o : LRealOutput; + oHasChanged : LRealOutput; + END_VAR + + // ----------------------------------------------------------- + // test SetQ(value) + // ----------------------------------------------------------- + {Test(value := LREAL#0.0, actual := LREAL#0.0)} + {Test(value := LREAL#1.0, actual := LREAL#1.0)} + METHOD PUBLIC TestOutputSetValue + VAR_INPUT + value : LREAL; + actual : LREAL; + END_VAR + VAR_TEMP + _expect : LWORD; + END_VAR + + + o.SetValue(value := value); + o.WriteCyclic(Q => _expect); + Assert.Equal(expected := _expect, actual := TO_LWORD(actual)); + END_METHOD + + + {Test} + METHOD PUBLIC TestOutputHasChanged + VAR_TEMP + value : LWORD; + END_VAR + Assert.Equal(FALSE, oHasChanged.HasChanged()); + oHasChanged.SetValue(value := LREAL#1.0); + oHasChanged.WriteCyclic(Q => value); + Assert.Equal(TRUE, oHasChanged.HasChanged()); + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/test/Output/LintOutputTest.st b/test/Output/LintOutputTest.st new file mode 100644 index 0000000..0d64226 --- /dev/null +++ b/test/Output/LintOutputTest.st @@ -0,0 +1,45 @@ +USING Siemens.AX.IO.Output; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Output.Test + + {TestFixture} + CLASS TestLIntOutputSetValueClass + VAR + o : LIntOutput; + oHasChanged : LIntOutput; + END_VAR + + // ----------------------------------------------------------- + // test SetQ(value) + // ----------------------------------------------------------- + {Test(value := LINT#0, actual := LINT#0)} + {Test(value := LINT#1, actual := LINT#1)} + METHOD PUBLIC TestOutputSetValue + VAR_INPUT + value : LINT; + actual : LINT; + END_VAR + VAR_TEMP + _expect : LINT; + END_VAR + + + o.SetValue(value := value); + o.WriteCyclic(Q => _expect); + Assert.Equal(expected := _expect, actual := actual); + END_METHOD + + + {Test} + METHOD PUBLIC TestOutputHasChanged + VAR_TEMP + value : LINT; + END_VAR + Assert.Equal(FALSE, oHasChanged.HasChanged()); + oHasChanged.SetValue(value := LINT#1); + oHasChanged.WriteCyclic(Q => value); + Assert.Equal(TRUE, oHasChanged.HasChanged()); + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/test/Output/RealOutputTest.st b/test/Output/RealOutputTest.st new file mode 100644 index 0000000..2e40831 --- /dev/null +++ b/test/Output/RealOutputTest.st @@ -0,0 +1,45 @@ +USING Siemens.AX.IO.Output; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Output.Test + + {TestFixture} + CLASS TestRealOutputSetValueClass + VAR + o : RealOutput; + oHasChanged : RealOutput; + END_VAR + + // ----------------------------------------------------------- + // test SetQ(value) + // ----------------------------------------------------------- + {Test(value := REAL#0.0, actual := REAL#0.0)} + {Test(value := REAL#1.0, actual := REAL#1.0)} + METHOD PUBLIC TestWordOutputSetValue + VAR_INPUT + value : REAL; + actual : REAL; + END_VAR + VAR_TEMP + _expect : DWORD; + END_VAR + + + o.SetValue(value := value); + o.WriteCyclic(Q => _expect); + Assert.Equal(expected := _expect, actual := TO_DWORD(actual)); + END_METHOD + + + {Test} + METHOD PUBLIC TestRealOutputHasChanged + VAR_TEMP + value : DWORD; + END_VAR + Assert.Equal(FALSE, oHasChanged.HasChanged()); + oHasChanged.SetValue(value := REAL#1.0); + oHasChanged.WriteCyclic(Q => value); + Assert.Equal(TRUE, oHasChanged.HasChanged()); + END_METHOD + END_CLASS +END_NAMESPACE diff --git a/test/Output/WordOutputTest.st b/test/Output/WordOutputTest.st new file mode 100644 index 0000000..f992d2e --- /dev/null +++ b/test/Output/WordOutputTest.st @@ -0,0 +1,45 @@ +USING Siemens.AX.IO.Output; +USING AxUnit; + +NAMESPACE Siemens.AX.IO.Output.Test + + {TestFixture} + CLASS TestWordOutputSetValueClass + VAR + o : WordOutput; + oHasChanged : WordOutput; + END_VAR + + // ----------------------------------------------------------- + // test SetQ(value) + // ----------------------------------------------------------- + {Test(value := WORD#16#0, actual := WORD#16#0)} + {Test(value := WORD#16#1, actual := WORD#16#1)} + METHOD PUBLIC TestOutputSetValue + VAR_INPUT + value : WORD; + actual : WORD; + END_VAR + VAR_TEMP + _expect : WORD; + END_VAR + + + o.SetValue(value := value); + o.WriteCyclic(Q => _expect); + Assert.Equal(expected := _expect, actual := actual); + END_METHOD + + + {Test} + METHOD PUBLIC TestOutputHasChanged + VAR_TEMP + value : Word; + END_VAR + Assert.Equal(FALSE, oHasChanged.HasChanged()); + oHasChanged.SetValue(value := WORD#1); + oHasChanged.WriteCyclic(Q => value); + Assert.Equal(TRUE, oHasChanged.HasChanged()); + END_METHOD + END_CLASS +END_NAMESPACE