Skip to content

Commit fc8c236

Browse files
RalfJungAmanieu
RalfJung
authored and
Amanieu
committed
use inline const for last simd_shuffle argument
1 parent 3d89e05 commit fc8c236

File tree

19 files changed

+1789
-1905
lines changed

19 files changed

+1789
-1905
lines changed

‎crates/core_arch/src/aarch64/neon/generated.rs

+664-664
Large diffs are not rendered by default.

‎crates/core_arch/src/aarch64/neon/mod.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -737,7 +737,7 @@ pub unsafe fn vld1_dup_f64(ptr: *const f64) -> float64x1_t {
737737
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
738738
pub unsafe fn vld1q_dup_f64(ptr: *const f64) -> float64x2_t {
739739
let x = vld1q_lane_f64::<0>(ptr, transmute(f64x2::splat(0.)));
740-
simd_shuffle2!(x, x, [0, 0])
740+
simd_shuffle!(x, x, [0, 0])
741741
}
742742

743743
/// Load one single-element structure to one lane of one register.
@@ -2101,7 +2101,7 @@ pub unsafe fn vgetq_lane_f64<const IMM5: i32>(v: float64x2_t) -> f64 {
21012101
#[cfg_attr(test, assert_instr(mov))]
21022102
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
21032103
pub unsafe fn vcombine_f64(low: float64x1_t, high: float64x1_t) -> float64x2_t {
2104-
simd_shuffle2!(low, high, [0, 1])
2104+
simd_shuffle!(low, high, [0, 1])
21052105
}
21062106

21072107
/// Table look-up

‎crates/core_arch/src/arm_shared/neon/generated.rs

+378-378
Large diffs are not rendered by default.

‎crates/core_arch/src/arm_shared/neon/mod.rs

+118-118
Large diffs are not rendered by default.

‎crates/core_arch/src/lib.rs

+3-1
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,9 @@
3232
allow_internal_unstable,
3333
decl_macro,
3434
asm_const,
35-
target_feature_11
35+
target_feature_11,
36+
inline_const,
37+
generic_arg_infer
3638
)]
3739
#![cfg_attr(test, feature(test, abi_vectorcall))]
3840
#![deny(clippy::missing_inline_in_public_items)]

‎crates/core_arch/src/macros.rs

+9-91
Original file line numberDiff line numberDiff line change
@@ -94,97 +94,15 @@ macro_rules! types {
9494
}
9595

9696
#[allow(unused)]
97-
macro_rules! simd_shuffle2 {
98-
($x:expr, $y:expr, <$(const $imm:ident : $ty:ty),+ $(,)?> $idx:expr $(,)?) => {{
99-
struct ConstParam<$(const $imm: $ty),+>;
100-
impl<$(const $imm: $ty),+> ConstParam<$($imm),+> {
101-
const IDX: [u32; 2] = $idx;
102-
}
103-
104-
simd_shuffle($x, $y, ConstParam::<$($imm),+>::IDX)
105-
}};
106-
($x:expr, $y:expr, $idx:expr $(,)?) => {{
107-
const IDX: [u32; 2] = $idx;
108-
simd_shuffle($x, $y, IDX)
109-
}};
110-
}
111-
112-
#[allow(unused_macros)]
113-
macro_rules! simd_shuffle4 {
114-
($x:expr, $y:expr, <$(const $imm:ident : $ty:ty),+ $(,)?> $idx:expr $(,)?) => {{
115-
struct ConstParam<$(const $imm: $ty),+>;
116-
impl<$(const $imm: $ty),+> ConstParam<$($imm),+> {
117-
const IDX: [u32; 4] = $idx;
118-
}
119-
120-
simd_shuffle($x, $y, ConstParam::<$($imm),+>::IDX)
121-
}};
122-
($x:expr, $y:expr, $idx:expr $(,)?) => {{
123-
const IDX: [u32; 4] = $idx;
124-
simd_shuffle($x, $y, IDX)
125-
}};
126-
}
127-
128-
#[allow(unused_macros)]
129-
macro_rules! simd_shuffle8 {
130-
($x:expr, $y:expr, <$(const $imm:ident : $ty:ty),+ $(,)?> $idx:expr $(,)?) => {{
131-
struct ConstParam<$(const $imm: $ty),+>;
132-
impl<$(const $imm: $ty),+> ConstParam<$($imm),+> {
133-
const IDX: [u32; 8] = $idx;
134-
}
135-
136-
simd_shuffle($x, $y, ConstParam::<$($imm),+>::IDX)
137-
}};
138-
($x:expr, $y:expr, $idx:expr $(,)?) => {{
139-
const IDX: [u32; 8] = $idx;
140-
simd_shuffle($x, $y, IDX)
141-
}};
142-
}
143-
144-
#[allow(unused)]
145-
macro_rules! simd_shuffle16 {
146-
($x:expr, $y:expr, <$(const $imm:ident : $ty:ty),+ $(,)?> $idx:expr $(,)?) => {{
147-
struct ConstParam<$(const $imm: $ty),+>;
148-
impl<$(const $imm: $ty),+> ConstParam<$($imm),+> {
149-
const IDX: [u32; 16] = $idx;
150-
}
151-
152-
simd_shuffle($x, $y, ConstParam::<$($imm),+>::IDX)
153-
}};
154-
($x:expr, $y:expr, $idx:expr $(,)?) => {{
155-
const IDX: [u32; 16] = $idx;
156-
simd_shuffle($x, $y, IDX)
157-
}};
158-
}
159-
160-
#[allow(unused_macros)]
161-
macro_rules! simd_shuffle32 {
162-
($x:expr, $y:expr, <$(const $imm:ident : $ty:ty),+> $(,)? $idx:expr $(,)?) => {{
163-
struct ConstParam<$(const $imm: $ty),+>;
164-
impl<$(const $imm: $ty),+> ConstParam<$($imm),+> {
165-
const IDX: [u32; 32] = $idx;
166-
}
167-
168-
simd_shuffle($x, $y, ConstParam::<$($imm),+>::IDX)
169-
}};
170-
($x:expr, $y:expr, $idx:expr $(,)?) => {{
171-
const IDX: [u32; 32] = $idx;
172-
simd_shuffle($x, $y, IDX)
173-
}};
174-
}
175-
176-
#[allow(unused_macros)]
177-
macro_rules! simd_shuffle64 {
178-
($x:expr, $y:expr, <$(const $imm:ident : $ty:ty),+ $(,)?> $idx:expr $(,)?) => {{
179-
struct ConstParam<$(const $imm: $ty),+>;
180-
impl<$(const $imm: $ty),+> ConstParam<$($imm),+> {
181-
const IDX: [u32; 64] = $idx;
182-
}
183-
184-
simd_shuffle($x, $y, ConstParam::<$($imm),+>::IDX)
185-
}};
97+
macro_rules! simd_shuffle {
18698
($x:expr, $y:expr, $idx:expr $(,)?) => {{
187-
const IDX: [u32; 64] = $idx;
188-
simd_shuffle($x, $y, IDX)
99+
simd_shuffle(
100+
$x,
101+
$y,
102+
const {
103+
let v: [u32; _] = $idx;
104+
v
105+
},
106+
)
189107
}};
190108
}

‎crates/core_arch/src/powerpc/vsx.rs

+4-4
Original file line numberDiff line numberDiff line change
@@ -47,10 +47,10 @@ mod sealed {
4747
#[cfg_attr(all(test, target_endian = "big"), assert_instr(xxspltd, dm = 0x0))]
4848
unsafe fn xxpermdi(a: i64x2, b: i64x2, dm: u8) -> i64x2 {
4949
match dm & 0b11 {
50-
0 => simd_shuffle2!(a, b, [0b00, 0b10]),
51-
1 => simd_shuffle2!(a, b, [0b01, 0b10]),
52-
2 => simd_shuffle2!(a, b, [0b00, 0b11]),
53-
_ => simd_shuffle2!(a, b, [0b01, 0b11]),
50+
0 => simd_shuffle!(a, b, [0b00, 0b10]),
51+
1 => simd_shuffle!(a, b, [0b01, 0b10]),
52+
2 => simd_shuffle!(a, b, [0b00, 0b11]),
53+
_ => simd_shuffle!(a, b, [0b01, 0b11]),
5454
}
5555
}
5656

0 commit comments

Comments
 (0)