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Re-enable all conditionally-disabled x86 assert_instr tests
1 parent 8ce1d5c commit dbace9d

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12 files changed

+101
-341
lines changed

12 files changed

+101
-341
lines changed

‎crates/core_arch/src/x86/avx.rs

+6-24
Original file line numberDiff line numberDiff line change
@@ -970,10 +970,7 @@ pub fn _mm256_cvttps_epi32(a: __m256) -> __m256i {
970970
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_ps)
971971
#[inline]
972972
#[target_feature(enable = "avx")]
973-
#[cfg_attr(
974-
all(test, not(target_env = "msvc")),
975-
assert_instr(vextractf128, IMM1 = 1)
976-
)]
973+
#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))]
977974
#[rustc_legacy_const_generics(1)]
978975
#[stable(feature = "simd_x86", since = "1.27.0")]
979976
pub fn _mm256_extractf128_ps<const IMM1: i32>(a: __m256) -> __m128 {
@@ -993,10 +990,7 @@ pub fn _mm256_extractf128_ps<const IMM1: i32>(a: __m256) -> __m128 {
993990
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_pd)
994991
#[inline]
995992
#[target_feature(enable = "avx")]
996-
#[cfg_attr(
997-
all(test, not(target_env = "msvc")),
998-
assert_instr(vextractf128, IMM1 = 1)
999-
)]
993+
#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))]
1000994
#[rustc_legacy_const_generics(1)]
1001995
#[stable(feature = "simd_x86", since = "1.27.0")]
1002996
pub fn _mm256_extractf128_pd<const IMM1: i32>(a: __m256d) -> __m128d {
@@ -1009,10 +1003,7 @@ pub fn _mm256_extractf128_pd<const IMM1: i32>(a: __m256d) -> __m128d {
10091003
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_si256)
10101004
#[inline]
10111005
#[target_feature(enable = "avx")]
1012-
#[cfg_attr(
1013-
all(test, not(target_env = "msvc")),
1014-
assert_instr(vextractf128, IMM1 = 1)
1015-
)]
1006+
#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))]
10161007
#[rustc_legacy_const_generics(1)]
10171008
#[stable(feature = "simd_x86", since = "1.27.0")]
10181009
pub fn _mm256_extractf128_si256<const IMM1: i32>(a: __m256i) -> __m128i {
@@ -1328,10 +1319,7 @@ pub unsafe fn _mm256_broadcast_pd(a: &__m128d) -> __m256d {
13281319
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_ps)
13291320
#[inline]
13301321
#[target_feature(enable = "avx")]
1331-
#[cfg_attr(
1332-
all(test, not(target_env = "msvc")),
1333-
assert_instr(vinsertf128, IMM1 = 1)
1334-
)]
1322+
#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))]
13351323
#[rustc_legacy_const_generics(2)]
13361324
#[stable(feature = "simd_x86", since = "1.27.0")]
13371325
pub fn _mm256_insertf128_ps<const IMM1: i32>(a: __m256, b: __m128) -> __m256 {
@@ -1352,10 +1340,7 @@ pub fn _mm256_insertf128_ps<const IMM1: i32>(a: __m256, b: __m128) -> __m256 {
13521340
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_pd)
13531341
#[inline]
13541342
#[target_feature(enable = "avx")]
1355-
#[cfg_attr(
1356-
all(test, not(target_env = "msvc")),
1357-
assert_instr(vinsertf128, IMM1 = 1)
1358-
)]
1343+
#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))]
13591344
#[rustc_legacy_const_generics(2)]
13601345
#[stable(feature = "simd_x86", since = "1.27.0")]
13611346
pub fn _mm256_insertf128_pd<const IMM1: i32>(a: __m256d, b: __m128d) -> __m256d {
@@ -1375,10 +1360,7 @@ pub fn _mm256_insertf128_pd<const IMM1: i32>(a: __m256d, b: __m128d) -> __m256d
13751360
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_si256)
13761361
#[inline]
13771362
#[target_feature(enable = "avx")]
1378-
#[cfg_attr(
1379-
all(test, not(target_env = "msvc")),
1380-
assert_instr(vinsertf128, IMM1 = 1)
1381-
)]
1363+
#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))]
13821364
#[rustc_legacy_const_generics(2)]
13831365
#[stable(feature = "simd_x86", since = "1.27.0")]
13841366
pub fn _mm256_insertf128_si256<const IMM1: i32>(a: __m256i, b: __m128i) -> __m256i {

‎crates/core_arch/src/x86/avx2.rs

+2-8
Original file line numberDiff line numberDiff line change
@@ -957,10 +957,7 @@ pub fn _mm256_cvtepu8_epi64(a: __m128i) -> __m256i {
957957
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extracti128_si256)
958958
#[inline]
959959
#[target_feature(enable = "avx2")]
960-
#[cfg_attr(
961-
all(test, not(target_env = "msvc")),
962-
assert_instr(vextractf128, IMM1 = 1)
963-
)]
960+
#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))]
964961
#[rustc_legacy_const_generics(1)]
965962
#[stable(feature = "simd_x86", since = "1.27.0")]
966963
pub fn _mm256_extracti128_si256<const IMM1: i32>(a: __m256i) -> __m128i {
@@ -1781,10 +1778,7 @@ pub unsafe fn _mm256_mask_i64gather_pd<const SCALE: i32>(
17811778
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_inserti128_si256)
17821779
#[inline]
17831780
#[target_feature(enable = "avx2")]
1784-
#[cfg_attr(
1785-
all(test, not(target_env = "msvc")),
1786-
assert_instr(vinsertf128, IMM1 = 1)
1787-
)]
1781+
#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))]
17881782
#[rustc_legacy_const_generics(2)]
17891783
#[stable(feature = "simd_x86", since = "1.27.0")]
17901784
pub fn _mm256_inserti128_si256<const IMM1: i32>(a: __m256i, b: __m128i) -> __m256i {

‎crates/core_arch/src/x86/avx512f.rs

+25-79
Original file line numberDiff line numberDiff line change
@@ -24799,10 +24799,7 @@ pub fn _mm256_maskz_shuffle_f64x2<const MASK: i32>(k: __mmask8, a: __m256d, b: _
2479924799
#[inline]
2480024800
#[target_feature(enable = "avx512f")]
2480124801
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24802-
#[cfg_attr(
24803-
all(test, not(target_env = "msvc")),
24804-
assert_instr(vextractf32x4, IMM8 = 3)
24805-
)]
24802+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))]
2480624803
#[rustc_legacy_const_generics(1)]
2480724804
pub fn _mm512_extractf32x4_ps<const IMM8: i32>(a: __m512) -> __m128 {
2480824805
unsafe {
@@ -24822,10 +24819,7 @@ pub fn _mm512_extractf32x4_ps<const IMM8: i32>(a: __m512) -> __m128 {
2482224819
#[inline]
2482324820
#[target_feature(enable = "avx512f")]
2482424821
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24825-
#[cfg_attr(
24826-
all(test, not(target_env = "msvc")),
24827-
assert_instr(vextractf32x4, IMM8 = 3)
24828-
)]
24822+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))]
2482924823
#[rustc_legacy_const_generics(3)]
2483024824
pub fn _mm512_mask_extractf32x4_ps<const IMM8: i32>(src: __m128, k: __mmask8, a: __m512) -> __m128 {
2483124825
unsafe {
@@ -24841,10 +24835,7 @@ pub fn _mm512_mask_extractf32x4_ps<const IMM8: i32>(src: __m128, k: __mmask8, a:
2484124835
#[inline]
2484224836
#[target_feature(enable = "avx512f")]
2484324837
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24844-
#[cfg_attr(
24845-
all(test, not(target_env = "msvc")),
24846-
assert_instr(vextractf32x4, IMM8 = 3)
24847-
)]
24838+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))]
2484824839
#[rustc_legacy_const_generics(2)]
2484924840
pub fn _mm512_maskz_extractf32x4_ps<const IMM8: i32>(k: __mmask8, a: __m512) -> __m128 {
2485024841
unsafe {
@@ -24861,7 +24852,7 @@ pub fn _mm512_maskz_extractf32x4_ps<const IMM8: i32>(k: __mmask8, a: __m512) ->
2486124852
#[target_feature(enable = "avx512f,avx512vl")]
2486224853
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2486324854
#[cfg_attr(
24864-
all(test, not(target_env = "msvc")),
24855+
test,
2486524856
assert_instr(vextract, IMM8 = 1) //should be vextractf32x4
2486624857
)]
2486724858
#[rustc_legacy_const_generics(1)]
@@ -24881,10 +24872,7 @@ pub fn _mm256_extractf32x4_ps<const IMM8: i32>(a: __m256) -> __m128 {
2488124872
#[inline]
2488224873
#[target_feature(enable = "avx512f,avx512vl")]
2488324874
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24884-
#[cfg_attr(
24885-
all(test, not(target_env = "msvc")),
24886-
assert_instr(vextractf32x4, IMM8 = 1)
24887-
)]
24875+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 1))]
2488824876
#[rustc_legacy_const_generics(3)]
2488924877
pub fn _mm256_mask_extractf32x4_ps<const IMM8: i32>(src: __m128, k: __mmask8, a: __m256) -> __m128 {
2489024878
unsafe {
@@ -24900,10 +24888,7 @@ pub fn _mm256_mask_extractf32x4_ps<const IMM8: i32>(src: __m128, k: __mmask8, a:
2490024888
#[inline]
2490124889
#[target_feature(enable = "avx512f,avx512vl")]
2490224890
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24903-
#[cfg_attr(
24904-
all(test, not(target_env = "msvc")),
24905-
assert_instr(vextractf32x4, IMM8 = 1)
24906-
)]
24891+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 1))]
2490724892
#[rustc_legacy_const_generics(2)]
2490824893
pub fn _mm256_maskz_extractf32x4_ps<const IMM8: i32>(k: __mmask8, a: __m256) -> __m128 {
2490924894
unsafe {
@@ -24920,7 +24905,7 @@ pub fn _mm256_maskz_extractf32x4_ps<const IMM8: i32>(k: __mmask8, a: __m256) ->
2492024905
#[target_feature(enable = "avx512f")]
2492124906
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2492224907
#[cfg_attr(
24923-
all(test, not(target_env = "msvc")),
24908+
test,
2492424909
assert_instr(vextractf64x4, IMM1 = 1) //should be vextracti64x4
2492524910
)]
2492624911
#[rustc_legacy_const_generics(1)]
@@ -24940,10 +24925,7 @@ pub fn _mm512_extracti64x4_epi64<const IMM1: i32>(a: __m512i) -> __m256i {
2494024925
#[inline]
2494124926
#[target_feature(enable = "avx512f")]
2494224927
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24943-
#[cfg_attr(
24944-
all(test, not(target_env = "msvc")),
24945-
assert_instr(vextracti64x4, IMM1 = 1)
24946-
)]
24928+
#[cfg_attr(test, assert_instr(vextracti64x4, IMM1 = 1))]
2494724929
#[rustc_legacy_const_generics(3)]
2494824930
pub fn _mm512_mask_extracti64x4_epi64<const IMM1: i32>(
2494924931
src: __m256i,
@@ -24963,10 +24945,7 @@ pub fn _mm512_mask_extracti64x4_epi64<const IMM1: i32>(
2496324945
#[inline]
2496424946
#[target_feature(enable = "avx512f")]
2496524947
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24966-
#[cfg_attr(
24967-
all(test, not(target_env = "msvc")),
24968-
assert_instr(vextracti64x4, IMM1 = 1)
24969-
)]
24948+
#[cfg_attr(test, assert_instr(vextracti64x4, IMM1 = 1))]
2497024949
#[rustc_legacy_const_generics(2)]
2497124950
pub fn _mm512_maskz_extracti64x4_epi64<const IMM1: i32>(k: __mmask8, a: __m512i) -> __m256i {
2497224951
unsafe {
@@ -24982,10 +24961,7 @@ pub fn _mm512_maskz_extracti64x4_epi64<const IMM1: i32>(k: __mmask8, a: __m512i)
2498224961
#[inline]
2498324962
#[target_feature(enable = "avx512f")]
2498424963
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24985-
#[cfg_attr(
24986-
all(test, not(target_env = "msvc")),
24987-
assert_instr(vextractf64x4, IMM8 = 1)
24988-
)]
24964+
#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))]
2498924965
#[rustc_legacy_const_generics(1)]
2499024966
pub fn _mm512_extractf64x4_pd<const IMM8: i32>(a: __m512d) -> __m256d {
2499124967
unsafe {
@@ -25003,10 +24979,7 @@ pub fn _mm512_extractf64x4_pd<const IMM8: i32>(a: __m512d) -> __m256d {
2500324979
#[inline]
2500424980
#[target_feature(enable = "avx512f")]
2500524981
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25006-
#[cfg_attr(
25007-
all(test, not(target_env = "msvc")),
25008-
assert_instr(vextractf64x4, IMM8 = 1)
25009-
)]
24982+
#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))]
2501024983
#[rustc_legacy_const_generics(3)]
2501124984
pub fn _mm512_mask_extractf64x4_pd<const IMM8: i32>(
2501224985
src: __m256d,
@@ -25026,10 +24999,7 @@ pub fn _mm512_mask_extractf64x4_pd<const IMM8: i32>(
2502624999
#[inline]
2502725000
#[target_feature(enable = "avx512f")]
2502825001
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25029-
#[cfg_attr(
25030-
all(test, not(target_env = "msvc")),
25031-
assert_instr(vextractf64x4, IMM8 = 1)
25032-
)]
25002+
#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))]
2503325003
#[rustc_legacy_const_generics(2)]
2503425004
pub fn _mm512_maskz_extractf64x4_pd<const IMM8: i32>(k: __mmask8, a: __m512d) -> __m256d {
2503525005
unsafe {
@@ -25046,7 +25016,7 @@ pub fn _mm512_maskz_extractf64x4_pd<const IMM8: i32>(k: __mmask8, a: __m512d) ->
2504625016
#[target_feature(enable = "avx512f")]
2504725017
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2504825018
#[cfg_attr(
25049-
all(test, not(target_env = "msvc")),
25019+
test,
2505025020
assert_instr(vextractf32x4, IMM2 = 3) //should be vextracti32x4
2505125021
)]
2505225022
#[rustc_legacy_const_generics(1)]
@@ -25071,10 +25041,7 @@ pub fn _mm512_extracti32x4_epi32<const IMM2: i32>(a: __m512i) -> __m128i {
2507125041
#[inline]
2507225042
#[target_feature(enable = "avx512f")]
2507325043
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25074-
#[cfg_attr(
25075-
all(test, not(target_env = "msvc")),
25076-
assert_instr(vextracti32x4, IMM2 = 3)
25077-
)]
25044+
#[cfg_attr(test, assert_instr(vextracti32x4, IMM2 = 3))]
2507825045
#[rustc_legacy_const_generics(3)]
2507925046
pub fn _mm512_mask_extracti32x4_epi32<const IMM2: i32>(
2508025047
src: __m128i,
@@ -25094,10 +25061,7 @@ pub fn _mm512_mask_extracti32x4_epi32<const IMM2: i32>(
2509425061
#[inline]
2509525062
#[target_feature(enable = "avx512f")]
2509625063
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25097-
#[cfg_attr(
25098-
all(test, not(target_env = "msvc")),
25099-
assert_instr(vextracti32x4, IMM2 = 3)
25100-
)]
25064+
#[cfg_attr(test, assert_instr(vextracti32x4, IMM2 = 3))]
2510125065
#[rustc_legacy_const_generics(2)]
2510225066
pub fn _mm512_maskz_extracti32x4_epi32<const IMM2: i32>(k: __mmask8, a: __m512i) -> __m128i {
2510325067
unsafe {
@@ -25114,7 +25078,7 @@ pub fn _mm512_maskz_extracti32x4_epi32<const IMM2: i32>(k: __mmask8, a: __m512i)
2511425078
#[target_feature(enable = "avx512f,avx512vl")]
2511525079
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2511625080
#[cfg_attr(
25117-
all(test, not(target_env = "msvc")),
25081+
test,
2511825082
assert_instr(vextract, IMM1 = 1) //should be vextracti32x4
2511925083
)]
2512025084
#[rustc_legacy_const_generics(1)]
@@ -25137,10 +25101,7 @@ pub fn _mm256_extracti32x4_epi32<const IMM1: i32>(a: __m256i) -> __m128i {
2513725101
#[inline]
2513825102
#[target_feature(enable = "avx512f,avx512vl")]
2513925103
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25140-
#[cfg_attr(
25141-
all(test, not(target_env = "msvc")),
25142-
assert_instr(vextracti32x4, IMM1 = 1)
25143-
)]
25104+
#[cfg_attr(test, assert_instr(vextracti32x4, IMM1 = 1))]
2514425105
#[rustc_legacy_const_generics(3)]
2514525106
pub fn _mm256_mask_extracti32x4_epi32<const IMM1: i32>(
2514625107
src: __m128i,
@@ -25160,10 +25121,7 @@ pub fn _mm256_mask_extracti32x4_epi32<const IMM1: i32>(
2516025121
#[inline]
2516125122
#[target_feature(enable = "avx512f,avx512vl")]
2516225123
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25163-
#[cfg_attr(
25164-
all(test, not(target_env = "msvc")),
25165-
assert_instr(vextracti32x4, IMM1 = 1)
25166-
)]
25124+
#[cfg_attr(test, assert_instr(vextracti32x4, IMM1 = 1))]
2516725125
#[rustc_legacy_const_generics(2)]
2516825126
pub fn _mm256_maskz_extracti32x4_epi32<const IMM1: i32>(k: __mmask8, a: __m256i) -> __m128i {
2516925127
unsafe {
@@ -25558,7 +25516,7 @@ pub fn _mm512_maskz_inserti32x4<const IMM8: i32>(k: __mmask16, a: __m512i, b: __
2555825516
#[target_feature(enable = "avx512f,avx512vl")]
2555925517
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2556025518
#[cfg_attr(
25561-
all(test, not(target_env = "msvc")),
25519+
test,
2556225520
assert_instr(vinsert, IMM8 = 1) //should be vinserti32x4
2556325521
)]
2556425522
#[rustc_legacy_const_generics(2)]
@@ -25581,10 +25539,7 @@ pub fn _mm256_inserti32x4<const IMM8: i32>(a: __m256i, b: __m128i) -> __m256i {
2558125539
#[inline]
2558225540
#[target_feature(enable = "avx512f,avx512vl")]
2558325541
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25584-
#[cfg_attr(
25585-
all(test, not(target_env = "msvc")),
25586-
assert_instr(vinserti32x4, IMM8 = 1)
25587-
)]
25542+
#[cfg_attr(test, assert_instr(vinserti32x4, IMM8 = 1))]
2558825543
#[rustc_legacy_const_generics(4)]
2558925544
pub fn _mm256_mask_inserti32x4<const IMM8: i32>(
2559025545
src: __m256i,
@@ -25605,10 +25560,7 @@ pub fn _mm256_mask_inserti32x4<const IMM8: i32>(
2560525560
#[inline]
2560625561
#[target_feature(enable = "avx512f,avx512vl")]
2560725562
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25608-
#[cfg_attr(
25609-
all(test, not(target_env = "msvc")),
25610-
assert_instr(vinserti32x4, IMM8 = 1)
25611-
)]
25563+
#[cfg_attr(test, assert_instr(vinserti32x4, IMM8 = 1))]
2561225564
#[rustc_legacy_const_generics(3)]
2561325565
pub fn _mm256_maskz_inserti32x4<const IMM8: i32>(k: __mmask8, a: __m256i, b: __m128i) -> __m256i {
2561425566
unsafe {
@@ -25759,7 +25711,7 @@ pub fn _mm512_maskz_insertf32x4<const IMM8: i32>(k: __mmask16, a: __m512, b: __m
2575925711
#[target_feature(enable = "avx512f,avx512vl")]
2576025712
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2576125713
#[cfg_attr(
25762-
all(test, not(target_env = "msvc")),
25714+
test,
2576325715
assert_instr(vinsert, IMM8 = 1) //should be vinsertf32x4
2576425716
)]
2576525717
#[rustc_legacy_const_generics(2)]
@@ -25780,10 +25732,7 @@ pub fn _mm256_insertf32x4<const IMM8: i32>(a: __m256, b: __m128) -> __m256 {
2578025732
#[inline]
2578125733
#[target_feature(enable = "avx512f,avx512vl")]
2578225734
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25783-
#[cfg_attr(
25784-
all(test, not(target_env = "msvc")),
25785-
assert_instr(vinsertf32x4, IMM8 = 1)
25786-
)]
25735+
#[cfg_attr(test, assert_instr(vinsertf32x4, IMM8 = 1))]
2578725736
#[rustc_legacy_const_generics(4)]
2578825737
pub fn _mm256_mask_insertf32x4<const IMM8: i32>(
2578925738
src: __m256,
@@ -25804,10 +25753,7 @@ pub fn _mm256_mask_insertf32x4<const IMM8: i32>(
2580425753
#[inline]
2580525754
#[target_feature(enable = "avx512f,avx512vl")]
2580625755
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25807-
#[cfg_attr(
25808-
all(test, not(target_env = "msvc")),
25809-
assert_instr(vinsertf32x4, IMM8 = 1)
25810-
)]
25756+
#[cfg_attr(test, assert_instr(vinsertf32x4, IMM8 = 1))]
2581125757
#[rustc_legacy_const_generics(3)]
2581225758
pub fn _mm256_maskz_insertf32x4<const IMM8: i32>(k: __mmask8, a: __m256, b: __m128) -> __m256 {
2581325759
unsafe {
@@ -26944,7 +26890,7 @@ pub fn _mm512_castsi512_pd(a: __m512i) -> __m512d {
2694426890
#[inline]
2694526891
#[target_feature(enable = "avx512f")]
2694626892
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
26947-
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(vmovd))]
26893+
#[cfg_attr(test, assert_instr(vmovd))]
2694826894
pub fn _mm512_cvtsi512_si32(a: __m512i) -> i32 {
2694926895
unsafe { simd_extract!(a.as_i32x16(), 0) }
2695026896
}

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