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Rollup merge of #80525 - devsnek:wasm64, r=nagisa
wasm64 support There is still some upstream llvm work needed before this can land.
2 parents 8ad6a44 + da66a31 commit 0d12422

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19 files changed

+129
-18
lines changed

19 files changed

+129
-18
lines changed

compiler/rustc_codegen_llvm/src/attributes.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -317,7 +317,7 @@ pub fn from_fn_attrs(cx: &CodegenCx<'ll, 'tcx>, llfn: &'ll Value, instance: ty::
317317
// Note that currently the `wasm-import-module` doesn't do anything, but
318318
// eventually LLVM 7 should read this and ferry the appropriate import
319319
// module to the output file.
320-
if cx.tcx.sess.target.arch == "wasm32" {
320+
if cx.tcx.sess.target.is_like_wasm {
321321
if let Some(module) = wasm_import_module(cx.tcx, instance.def_id()) {
322322
llvm::AddFunctionAttrStringValue(
323323
llfn,

compiler/rustc_codegen_llvm/src/back/write.rs

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -170,10 +170,7 @@ pub fn target_machine_factory(
170170
// On the wasm target once the `atomics` feature is enabled that means that
171171
// we're no longer single-threaded, or otherwise we don't want LLVM to
172172
// lower atomic operations to single-threaded operations.
173-
if singlethread
174-
&& sess.target.llvm_target.contains("wasm32")
175-
&& sess.target_features.contains(&sym::atomics)
176-
{
173+
if singlethread && sess.target.is_like_wasm && sess.target_features.contains(&sym::atomics) {
177174
singlethread = false;
178175
}
179176

compiler/rustc_codegen_llvm/src/debuginfo/metadata.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1083,9 +1083,9 @@ pub fn compile_unit_metadata(
10831083
);
10841084
}
10851085

1086-
// Insert `llvm.ident` metadata on the wasm32 targets since that will
1086+
// Insert `llvm.ident` metadata on the wasm targets since that will
10871087
// get hooked up to the "producer" sections `processed-by` information.
1088-
if tcx.sess.opts.target_triple.triple().starts_with("wasm32") {
1088+
if tcx.sess.target.is_like_wasm {
10891089
let name_metadata = llvm::LLVMMDStringInContext(
10901090
debug_context.llcontext,
10911091
rustc_producer.as_ptr().cast(),

compiler/rustc_codegen_ssa/src/back/linker.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -186,7 +186,7 @@ impl<'a> GccLinker<'a> {
186186
// * On OSX they have their own linker, not binutils'
187187
// * For WebAssembly the only functional linker is LLD, which doesn't
188188
// support hint flags
189-
!self.sess.target.is_like_osx && self.sess.target.arch != "wasm32"
189+
!self.sess.target.is_like_osx && !self.sess.target.is_like_wasm
190190
}
191191

192192
// Some platforms take hints about whether a library is static or dynamic.

compiler/rustc_codegen_ssa/src/target_features.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -161,7 +161,7 @@ pub fn supported_target_features(sess: &Session) -> &'static [(&'static str, Opt
161161
"mips" | "mips64" => MIPS_ALLOWED_FEATURES,
162162
"powerpc" | "powerpc64" => POWERPC_ALLOWED_FEATURES,
163163
"riscv32" | "riscv64" => RISCV_ALLOWED_FEATURES,
164-
"wasm32" => WASM_ALLOWED_FEATURES,
164+
"wasm32" | "wasm64" => WASM_ALLOWED_FEATURES,
165165
_ => &[],
166166
}
167167
}

compiler/rustc_session/src/config.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -822,6 +822,9 @@ pub fn default_configuration(sess: &Session) -> CrateConfig {
822822
}
823823
}
824824
ret.insert((sym::target_arch, Some(Symbol::intern(arch))));
825+
if sess.target.is_like_wasm {
826+
ret.insert((sym::wasm, None));
827+
}
825828
ret.insert((sym::target_endian, Some(Symbol::intern(end.as_str()))));
826829
ret.insert((sym::target_pointer_width, Some(Symbol::intern(&wordsz))));
827830
ret.insert((sym::target_env, Some(Symbol::intern(env))));

compiler/rustc_span/src/symbol.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1294,6 +1294,7 @@ symbols! {
12941294
vreg,
12951295
vreg_low16,
12961296
warn,
1297+
wasm,
12971298
wasm_import_module,
12981299
wasm_target_feature,
12991300
while_let,

compiler/rustc_symbol_mangling/src/lib.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -198,7 +198,7 @@ fn compute_symbol_name(
198198
//
199199
// [1]: https://bugs.llvm.org/show_bug.cgi?id=44316
200200
if is_foreign
201-
&& (tcx.sess.target.arch != "wasm32"
201+
&& (!tcx.sess.target.is_like_wasm
202202
|| !tcx.wasm_import_module_map(def_id.krate).contains_key(&def_id))
203203
{
204204
if let Some(name) = attrs.link_name {

compiler/rustc_target/src/abi/call/mod.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ mod sparc;
2020
mod sparc64;
2121
mod wasm32;
2222
mod wasm32_bindgen_compat;
23+
mod wasm64;
2324
mod x86;
2425
mod x86_64;
2526
mod x86_win64;
@@ -652,6 +653,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
652653
_ => wasm32_bindgen_compat::compute_abi_info(self),
653654
},
654655
"asmjs" => wasm32::compute_abi_info(cx, self),
656+
"wasm64" => wasm64::compute_abi_info(cx, self),
655657
a => return Err(format!("unrecognized arch \"{}\" in target specification", a)),
656658
}
657659

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,58 @@
1+
use crate::abi::call::{ArgAbi, FnAbi, Uniform};
2+
use crate::abi::{HasDataLayout, LayoutOf, TyAndLayout, TyAndLayoutMethods};
3+
4+
fn unwrap_trivial_aggregate<'a, Ty, C>(cx: &C, val: &mut ArgAbi<'a, Ty>) -> bool
5+
where
6+
Ty: TyAndLayoutMethods<'a, C> + Copy,
7+
C: LayoutOf<Ty = Ty, TyAndLayout = TyAndLayout<'a, Ty>> + HasDataLayout,
8+
{
9+
if val.layout.is_aggregate() {
10+
if let Some(unit) = val.layout.homogeneous_aggregate(cx).ok().and_then(|ha| ha.unit()) {
11+
let size = val.layout.size;
12+
if unit.size == size {
13+
val.cast_to(Uniform { unit, total: size });
14+
return true;
15+
}
16+
}
17+
}
18+
false
19+
}
20+
21+
fn classify_ret<'a, Ty, C>(cx: &C, ret: &mut ArgAbi<'a, Ty>)
22+
where
23+
Ty: TyAndLayoutMethods<'a, C> + Copy,
24+
C: LayoutOf<Ty = Ty, TyAndLayout = TyAndLayout<'a, Ty>> + HasDataLayout,
25+
{
26+
ret.extend_integer_width_to(64);
27+
if ret.layout.is_aggregate() && !unwrap_trivial_aggregate(cx, ret) {
28+
ret.make_indirect();
29+
}
30+
}
31+
32+
fn classify_arg<'a, Ty, C>(cx: &C, arg: &mut ArgAbi<'a, Ty>)
33+
where
34+
Ty: TyAndLayoutMethods<'a, C> + Copy,
35+
C: LayoutOf<Ty = Ty, TyAndLayout = TyAndLayout<'a, Ty>> + HasDataLayout,
36+
{
37+
arg.extend_integer_width_to(64);
38+
if arg.layout.is_aggregate() && !unwrap_trivial_aggregate(cx, arg) {
39+
arg.make_indirect_byval();
40+
}
41+
}
42+
43+
pub fn compute_abi_info<'a, Ty, C>(cx: &C, fn_abi: &mut FnAbi<'a, Ty>)
44+
where
45+
Ty: TyAndLayoutMethods<'a, C> + Copy,
46+
C: LayoutOf<Ty = Ty, TyAndLayout = TyAndLayout<'a, Ty>> + HasDataLayout,
47+
{
48+
if !fn_abi.ret.is_ignore() {
49+
classify_ret(cx, &mut fn_abi.ret);
50+
}
51+
52+
for arg in &mut fn_abi.args {
53+
if arg.is_ignore() {
54+
continue;
55+
}
56+
classify_arg(cx, arg);
57+
}
58+
}

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