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Auto merge of #131775 - Urgau:rollup-yc4a3sf, r=Urgau
Rollup of 10 pull requests Successful merges: - #131582 (Add wasm32-unknown-emscripten platform support document) - #131694 (Make fuchsia-test-runner.py compatible with new JSON output from llvm-readelf) - #131700 (Fix match_same_arms in stable_mir) - #131712 (Mark the unstable LazyCell::into_inner const) - #131746 (Relax a memory order in `once_box`) - #131754 (Don't report bivariance error when nesting a struct with field errors into another struct) - #131760 (llvm: Match aarch64 data layout to new LLVM layout) - #131764 (Fix unnecessary nesting in run-make test output directories) - #131766 (Add mailmap entry for my dev-desktop setup) - #131771 (Handle gracefully true/false in `cfg(target(..))` compact) r? `@ghost` `@rustbot` modify labels: rollup
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58 files changed

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.mailmap

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -280,6 +280,7 @@ Jerry Hardee <[email protected]>
280280
Jesús Rubio <[email protected]>
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Jethro Beekman <[email protected]>
282282
Jian Zeng <[email protected]>
283+
283284
284285
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Jihyun Yu <[email protected]> Jihyun Yu <[email protected]>

compiler/rustc_attr/src/builtin.rs

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -723,7 +723,13 @@ pub fn eval_condition(
723723
}
724724

725725
mis.iter().fold(true, |res, mi| {
726-
let mut mi = mi.meta_item().unwrap().clone();
726+
let Some(mut mi) = mi.meta_item().cloned() else {
727+
dcx.emit_err(session_diagnostics::CfgPredicateIdentifier {
728+
span: mi.span(),
729+
});
730+
return false;
731+
};
732+
727733
if let [seg, ..] = &mut mi.path.segments[..] {
728734
seg.ident.name = Symbol::intern(&format!("target_{}", seg.ident.name));
729735
}

compiler/rustc_codegen_llvm/src/context.rs

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -138,6 +138,16 @@ pub(crate) unsafe fn create_module<'ll>(
138138
}
139139
}
140140

141+
if llvm_version < (20, 0, 0) {
142+
if sess.target.arch == "aarch64" || sess.target.arch.starts_with("arm64") {
143+
// LLVM 20 defines three additional address spaces for alternate
144+
// pointer kinds used in Windows.
145+
// See https://github.com/llvm/llvm-project/pull/111879
146+
target_data_layout =
147+
target_data_layout.replace("-p270:32:32-p271:32:32-p272:64:64", "");
148+
}
149+
}
150+
141151
// Ensure the data-layout values hardcoded remain the defaults.
142152
{
143153
let tm = crate::back::write::create_informational_target_machine(tcx.sess, false);

compiler/rustc_hir_analysis/src/check/wfcheck.rs

Lines changed: 50 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1875,24 +1875,15 @@ fn check_variances_for_type_defn<'tcx>(
18751875
item: &'tcx hir::Item<'tcx>,
18761876
hir_generics: &hir::Generics<'tcx>,
18771877
) {
1878-
let identity_args = ty::GenericArgs::identity_for_item(tcx, item.owner_id);
1879-
18801878
match item.kind {
18811879
ItemKind::Enum(..) | ItemKind::Struct(..) | ItemKind::Union(..) => {
1882-
for field in tcx.adt_def(item.owner_id).all_fields() {
1883-
if field.ty(tcx, identity_args).references_error() {
1884-
return;
1885-
}
1886-
}
1880+
// Ok
18871881
}
18881882
ItemKind::TyAlias(..) => {
18891883
assert!(
18901884
tcx.type_alias_is_lazy(item.owner_id),
18911885
"should not be computing variance of non-weak type alias"
18921886
);
1893-
if tcx.type_of(item.owner_id).skip_binder().references_error() {
1894-
return;
1895-
}
18961887
}
18971888
kind => span_bug!(item.span, "cannot compute the variances of {kind:?}"),
18981889
}
@@ -1955,6 +1946,15 @@ fn check_variances_for_type_defn<'tcx>(
19551946
continue;
19561947
}
19571948

1949+
// Look for `ErrorGuaranteed` deeply within this type.
1950+
if let ControlFlow::Break(ErrorGuaranteed { .. }) = tcx
1951+
.type_of(item.owner_id)
1952+
.instantiate_identity()
1953+
.visit_with(&mut HasErrorDeep { tcx, seen: Default::default() })
1954+
{
1955+
continue;
1956+
}
1957+
19581958
match hir_param.name {
19591959
hir::ParamName::Error => {}
19601960
_ => {
@@ -1965,6 +1965,46 @@ fn check_variances_for_type_defn<'tcx>(
19651965
}
19661966
}
19671967

1968+
/// Look for `ErrorGuaranteed` deeply within structs' (unsubstituted) fields.
1969+
struct HasErrorDeep<'tcx> {
1970+
tcx: TyCtxt<'tcx>,
1971+
seen: FxHashSet<DefId>,
1972+
}
1973+
impl<'tcx> TypeVisitor<TyCtxt<'tcx>> for HasErrorDeep<'tcx> {
1974+
type Result = ControlFlow<ErrorGuaranteed>;
1975+
1976+
fn visit_ty(&mut self, ty: Ty<'tcx>) -> Self::Result {
1977+
match *ty.kind() {
1978+
ty::Adt(def, _) => {
1979+
if self.seen.insert(def.did()) {
1980+
for field in def.all_fields() {
1981+
self.tcx.type_of(field.did).instantiate_identity().visit_with(self)?;
1982+
}
1983+
}
1984+
}
1985+
ty::Error(guar) => return ControlFlow::Break(guar),
1986+
_ => {}
1987+
}
1988+
ty.super_visit_with(self)
1989+
}
1990+
1991+
fn visit_region(&mut self, r: ty::Region<'tcx>) -> Self::Result {
1992+
if let Err(guar) = r.error_reported() {
1993+
ControlFlow::Break(guar)
1994+
} else {
1995+
ControlFlow::Continue(())
1996+
}
1997+
}
1998+
1999+
fn visit_const(&mut self, c: ty::Const<'tcx>) -> Self::Result {
2000+
if let Err(guar) = c.error_reported() {
2001+
ControlFlow::Break(guar)
2002+
} else {
2003+
ControlFlow::Continue(())
2004+
}
2005+
}
2006+
}
2007+
19682008
fn report_bivariance<'tcx>(
19692009
tcx: TyCtxt<'tcx>,
19702010
param: &'tcx hir::GenericParam<'tcx>,

compiler/rustc_target/src/spec/targets/aarch64_apple_darwin.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,8 @@ pub(crate) fn target() -> Target {
1212
std: Some(true),
1313
},
1414
pointer_width: 64,
15-
data_layout: "e-m:o-i64:64-i128:128-n32:64-S128-Fn32".into(),
15+
data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
16+
.into(),
1617
arch,
1718
options: TargetOptions {
1819
mcount: "\u{1}mcount".into(),

compiler/rustc_target/src/spec/targets/aarch64_apple_ios.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,8 @@ pub(crate) fn target() -> Target {
1212
std: Some(true),
1313
},
1414
pointer_width: 64,
15-
data_layout: "e-m:o-i64:64-i128:128-n32:64-S128-Fn32".into(),
15+
data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
16+
.into(),
1617
arch,
1718
options: TargetOptions {
1819
features: "+neon,+fp-armv8,+apple-a7".into(),

compiler/rustc_target/src/spec/targets/aarch64_apple_ios_macabi.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,8 @@ pub(crate) fn target() -> Target {
1212
std: Some(true),
1313
},
1414
pointer_width: 64,
15-
data_layout: "e-m:o-i64:64-i128:128-n32:64-S128-Fn32".into(),
15+
data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
16+
.into(),
1617
arch,
1718
options: TargetOptions {
1819
features: "+neon,+fp-armv8,+apple-a12".into(),

compiler/rustc_target/src/spec/targets/aarch64_apple_ios_sim.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,8 @@ pub(crate) fn target() -> Target {
1212
std: Some(true),
1313
},
1414
pointer_width: 64,
15-
data_layout: "e-m:o-i64:64-i128:128-n32:64-S128-Fn32".into(),
15+
data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
16+
.into(),
1617
arch,
1718
options: TargetOptions {
1819
features: "+neon,+fp-armv8,+apple-a7".into(),

compiler/rustc_target/src/spec/targets/aarch64_apple_tvos.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,8 @@ pub(crate) fn target() -> Target {
1212
std: Some(true),
1313
},
1414
pointer_width: 64,
15-
data_layout: "e-m:o-i64:64-i128:128-n32:64-S128-Fn32".into(),
15+
data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
16+
.into(),
1617
arch,
1718
options: TargetOptions {
1819
features: "+neon,+fp-armv8,+apple-a7".into(),

compiler/rustc_target/src/spec/targets/aarch64_apple_tvos_sim.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,8 @@ pub(crate) fn target() -> Target {
1212
std: Some(true),
1313
},
1414
pointer_width: 64,
15-
data_layout: "e-m:o-i64:64-i128:128-n32:64-S128-Fn32".into(),
15+
data_layout: "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
16+
.into(),
1617
arch,
1718
options: TargetOptions {
1819
features: "+neon,+fp-armv8,+apple-a7".into(),

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