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4 files changed +6
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lines changed Original file line number Diff line number Diff line change 1
- c45dee5efd0c042e9d1e24559ebd0d6424d8aa70
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+ fa0068b5412baecc932772dda72c0621bfa7ab00
Original file line number Diff line number Diff line change @@ -241,12 +241,12 @@ pub enum ProvenanceExtra {
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Wildcard ,
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}
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- #[ cfg( all ( target_arch = "x86_64" , target_pointer_width = "64" ) ) ]
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+ #[ cfg( target_pointer_width = "64" ) ]
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static_assert_size ! ( Pointer <Provenance >, 24 ) ;
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// FIXME: this would with in 24bytes but layout optimizations are not smart enough
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- // #[cfg(all(target_arch = "x86_64", target_pointer_width = "64") )]
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+ // #[cfg(target_pointer_width = "64")]
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//static_assert_size!(Pointer<Option<Provenance>>, 24);
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- #[ cfg( all ( target_arch = "x86_64" , target_pointer_width = "64" ) ) ]
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+ #[ cfg( target_pointer_width = "64" ) ]
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static_assert_size ! ( Scalar <Provenance >, 32 ) ;
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impl fmt:: Debug for Provenance {
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//@normalize-stderr-test: "\n +at [^\n]+" -> ""
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//@normalize-stderr-test: "\n +\[\.\.\. omitted [0-9]+ frames? \.\.\.\]" -> ""
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//@normalize-stderr-test: "\n[ =]*note:.*" -> ""
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+ //@normalize-stderr-test: "DefId\([^()]*\)" -> "DefId"
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#![ feature( custom_mir, core_intrinsics) ]
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use core:: intrinsics:: mir:: * ;
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thread 'rustc' panicked at compiler/rustc_const_eval/src/transform/validate.rs:LL:CC:
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- broken MIR in Item(DefId(0:4 ~ mir_validation[fad2]::main) ) (after phase change to runtime-optimized) at bb0[1]:
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+ broken MIR in Item(DefId) (after phase change to runtime-optimized) at bb0[1]:
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(*(_2.0: *mut i32)), has deref at the wrong place
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stack backtrace:
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