From e68cbda4502c867dbc8310e056a2d9bf7472f9dd Mon Sep 17 00:00:00 2001 From: Paul Gilbert Date: Fri, 4 Dec 2020 16:09:12 -0500 Subject: [PATCH 1/6] - Added examples lora_spi_send, lora_spi_receive, and lora_spi_gps. These work on several different MCUs. Documentation for building and running is in lora_spi_send.rs. - moved memoryMaps into examples/. - uncommented portions of workflow rust.yml that had mistakenly been comment out. - updated libusb-sys to version 0.2 and added optional=true but unsure what "Fix for libusb-sys package discovery" was thus why "https://github.com/cmsd2/libusb-sys" was used. This change and related rust.yml update to "libusb-1.0-0" fix some CI errors but there remains an obscure "dpkg: error: need an action option" in rust.yml "Install libusb (apt armv7)". - cleaned up some rust.yml for running examples. - added feature example = [] used as gate to prevent cargo "test" and "cargo build --examples" from attempting to build unless appropriate features ar also specified. --- .cargo/config | 29 + .github/workflows/rust.yml | 95 +- .travis.yml | 39 - Cargo.lock | 860 ++++++++++++++---- Cargo.toml | 97 +- README.md | 5 +- build.rs | 108 +++ examples/lora_spi_gps.rs | 880 +++++++++++++++++++ examples/lora_spi_receive.rs | 654 ++++++++++++++ examples/lora_spi_send.rs | 709 +++++++++++++++ examples/memoryMaps/GD32VF103C8/memory.x | 13 + examples/memoryMaps/GD32VF103CB/memory.xA | 13 + examples/memoryMaps/GD32VF103_EXTRA/memory.x | 27 + examples/memoryMaps/LM3S6965/memory.x | 34 + examples/memoryMaps/STM32F030XC/memory.x | 8 + examples/memoryMaps/STM32F042/memory.x | 11 + examples/memoryMaps/STM32F100/memory.x | 6 + examples/memoryMaps/STM32F101/memory.x | 6 + examples/memoryMaps/STM32F103/memory.x | 6 + examples/memoryMaps/STM32F303XC/memory.x | 6 + examples/memoryMaps/STM32F401/memory.x | 6 + examples/memoryMaps/STM32F411/memory.x | 6 + examples/memoryMaps/STM32F722/memory.x | 9 + examples/memoryMaps/STM32H742/memory.x | 10 + examples/memoryMaps/STM32L0X2/memory.x | 5 + examples/memoryMaps/STM32L100/memory.x | 6 + examples/memoryMaps/STM32L151/memory.x | 7 + examples/memoryMaps/STM32L4X2/memory.x | 6 + openocd.gdb | 40 + 29 files changed, 3483 insertions(+), 218 deletions(-) delete mode 100644 .travis.yml create mode 100644 build.rs create mode 100644 examples/lora_spi_gps.rs create mode 100644 examples/lora_spi_receive.rs create mode 100644 examples/lora_spi_send.rs create mode 100644 examples/memoryMaps/GD32VF103C8/memory.x create mode 100644 examples/memoryMaps/GD32VF103CB/memory.xA create mode 100644 examples/memoryMaps/GD32VF103_EXTRA/memory.x create mode 100644 examples/memoryMaps/LM3S6965/memory.x create mode 100644 examples/memoryMaps/STM32F030XC/memory.x create mode 100644 examples/memoryMaps/STM32F042/memory.x create mode 100644 examples/memoryMaps/STM32F100/memory.x create mode 100644 examples/memoryMaps/STM32F101/memory.x create mode 100644 examples/memoryMaps/STM32F103/memory.x create mode 100644 examples/memoryMaps/STM32F303XC/memory.x create mode 100644 examples/memoryMaps/STM32F401/memory.x create mode 100644 examples/memoryMaps/STM32F411/memory.x create mode 100644 examples/memoryMaps/STM32F722/memory.x create mode 100644 examples/memoryMaps/STM32H742/memory.x create mode 100644 examples/memoryMaps/STM32L0X2/memory.x create mode 100644 examples/memoryMaps/STM32L100/memory.x create mode 100644 examples/memoryMaps/STM32L151/memory.x create mode 100644 examples/memoryMaps/STM32L4X2/memory.x create mode 100644 openocd.gdb diff --git a/.cargo/config b/.cargo/config index 78c1305..adce874 100644 --- a/.cargo/config +++ b/.cargo/config @@ -1,3 +1,32 @@ [target.armv7-unknown-linux-gnueabihf] linker = "arm-linux-gnueabihf-gcc" + +[target.thumbv7m-none-eabi] +#runner = 'arm-none-eabi-gdb' +runner = "gdb-multiarch -q -x openocd.gdb" +rustflags = [ + "-C", "link-arg=-Tlink.x", +] + +[target.thumbv7em-none-eabi] +#runner = 'arm-none-eabi-gdb' +runner = "gdb-multiarch -q -x openocd.gdb" +rustflags = [ + "-C", "link-arg=-Tlink.x", +] + +[target.thumbv7em-none-eabihf] +#runner = 'arm-none-eabi-gdb' +runner = "gdb-multiarch -q -x openocd.gdb" +rustflags = [ + "-C", "link-arg=-Tlink.x", +] + +[target.riscv32imac-unknown-none-elf] +#runner = 'riscv64-unknown-elf-gdb -x openocd.gdb' +runner = "gdb-multiarch -q -x openocd.gdb" +rustflags = [ + #"-C", "link-arg=-memory-CB.x", + "-C", "link-arg=-Tlink.x", +] diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index 195b1df..75f9ac2 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -2,7 +2,7 @@ name: Rust on: push: - branches: [ master ] + branches: [ master, testing-e-h_0.2.4, examples-testing ] tags: [ 'v*' ] pull_request: branches: [ master ] @@ -26,12 +26,15 @@ jobs: use_cross: false experimental: false args: --features util,driver-pal/hal-cp2130,driver-pal/hal-linux - - target: armv7-unknown-linux-gnueabihf + + # probably want next three targets on master, but they are time consuming when testing examples + - target: armv7-unknown-linux-gnueabihf os: ubuntu-latest output: sx127x-util use_cross: false experimental: true args: --features util,driver-pal/hal-cp2130,driver-pal/hal-linux + - target: x86_64-apple-darwin os: macos-latest output: sx127x-util @@ -70,14 +73,16 @@ jobs: - name: Install libusb (apt native) if: ${{ matrix.os == 'ubuntu-latest' && matrix.target == 'x86_64-unknown-linux-gnu' }} - run: sudo apt install -y libusb-1.0 libusb-dev + #run: sudo apt install -y libusb-1.0 libusb-dev + run: sudo apt install -y libusb-1.0-0 libusb-1.0-0-dev - name: Install libusb (apt armv7) if: ${{ matrix.os == 'ubuntu-latest' && matrix.target == 'armv7-unknown-linux-gnueabihf' }} run: | sudo dpkg add-architecture armhf sudo apt update - sudo apt install libusb-1.0:armhf libusb-dev:armhf + #sudo apt install libusb-1.0:armhf libusb-dev:armhf + sudo apt-get install libusb-1.0-0:armhf libusb-1.0-0-dev:armhf # try apt-get in place of apt - name: Install libusb (vcpkg) if: ${{ matrix.os == 'windows-latest' }} @@ -92,7 +97,8 @@ jobs: with: key: ${{ matrix.os }}-${{ matrix.target }} path: $VCPKG_DIRECTORY - + + # probably want next 4 name sections on master, but not on forks and branches - name: Build release uses: actions-rs/cargo@v1 with: @@ -121,6 +127,85 @@ jobs: tag: ${{ github.ref }} overwrite: true + test_examples: + name: Test examples + runs-on: ubuntu-latest + continue-on-error: true + strategy: + matrix: + mcu: [stm32f042, stm32f030xc, stm32f103, stm32f100, stm32f101, stm32f303xc, + stm32f401, stm32f411, stm32h742, stm32l0x2, stm32l100, stm32l151, stm32l4x2, ] + include: + - mcu: stm32f042 + hal: "stm32f0xx" + trg: "thumbv6m-none-eabi" + - mcu: stm32f030xc + hal: "stm32f0xx" + trg: "thumbv6m-none-eabi" + - mcu: stm32f100 + hal: "stm32f1xx" + trg: "thumbv7m-none-eabi" + - mcu: stm32f101 + hal: "stm32f1xx" + trg: "thumbv7m-none-eabi" + - mcu: stm32f103 + hal: "stm32f1xx" + trg: "thumbv7m-none-eabi" + - mcu: stm32f303xc + hal: "stm32f3xx" + trg: "thumbv7em-none-eabihf" + - mcu: stm32f401 + hal: "stm32f4xx" + trg: "thumbv7em-none-eabihf" + - mcu: stm32f411 + hal: "stm32f4xx" + trg: "thumbv7em-none-eabihf" + - mcu: stm32h742 + hal: "stm32h7xx" + trg: "thumbv7em-none-eabihf" + - mcu: stm32l0x2 + hal: "stm32l0xx" + trg: "thumbv6m-none-eabi" + - mcu: stm32l100 + hal: "stm32l1xx" + trg: "thumbv7m-none-eabi" + - mcu: stm32l151 + hal: "stm32l1xx" + trg: "thumbv7m-none-eabi" + - mcu: stm32l4x2 + hal: "stm32l4xx" + trg: "thumbv7em-none-eabi" + steps: + - uses: actions/checkout@v2 + - uses: actions-rs/toolchain@v1 + with: + profile: minimal + toolchain: stable + #- name: Build + # uses: actions-rs/cargo@v1 + # with: + # command: build + # args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.mcu }} + - name: Build example lora_spi_send + uses: actions-rs/cargo@v1 + with: + command: build + args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }} --example lora_spi_send + use-cross: true + - name: Build example lora_spi_receive + uses: actions-rs/cargo@v1 + with: + command: build + args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }} --example lora_spi_receive + use-cross: true + - name: Build example lora_spi_gps + uses: actions-rs/cargo@v1 + with: + command: build + args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }} --example lora_spi_gps + use-cross: true + + # probably want release on master, but not on forks and branches release: name: Create release runs-on: ubuntu-latest diff --git a/.travis.yml b/.travis.yml deleted file mode 100644 index 20797bf..0000000 --- a/.travis.yml +++ /dev/null @@ -1,39 +0,0 @@ -language: rust -cache: cargo -matrix: - include: - - env: TARGET=x86_64-unknown-linux-gnu - os: linux - - env: TARGET=armv7-unknown-linux-gnueabihf - os: linux - addons: - apt: - packages: - - libc6-i386 - - libc6-dev-i386 - - gcc-arm-linux-gnueabihf - - libc6-armhf-cross - - libc6-dev-armhf-cross -install: -- cargo fetch -- rustup target add armv7-unknown-linux-gnueabihf -- rustup component add rustfmt -script: -- cargo build && cargo test && cargo build --target=$TARGET --release -before_deploy: -- tar -cvf target/sx127x-util-$TARGET-$TRAVIS_TAG.tgz -C target/$TARGET/release/ sx127x-util - -notifications: - email: - on_success: never - on_failure: never -deploy: - provider: releases - api_key: - secure: KwL6ue3wNTQiUM05SxMUNlcOnlkCHxpZIKRNmpqhdT0F27RxNIl4DD0wcrA9yD1IB2jv+ZOiXeQGgYEu5s/uYpoNul9lEk3K3UxxxnzKxKH/ByaeiPnlzymBnaN47QFcjFEk5uY8eLHdtXzk6Ku6YbmSJ4uS2WSq3+Q/hnS2od/jqGi2aYy/RBHrS7oFirpcEDYQWfBDftn8vRtVSVPrv+kdBV1qKI5GhP7nodApC3g/LJHeoXHfJo9gxf4PxyCsrFKrjWvUPVkHAq62+J2ETzWNupMYpj8t23Ip+1KxTQd2MLL2epUggTvLA6nunwI3877Trjy76b4F1Ic72GD1WbL3o4UXG/9QRfAGXfjfDnp2W52v0L9uW9URF4qmBI1NY0lceQOmaSyYSJz/4xMV6Txbx+MPoISpsgVsdieMkRFUPo9cm/Lj4+TTgbLVXl2iNZU6H9ezbkx8K0gdrqGZIUJmpsPmONl7nqSNKHHtmyE0xME6TlRDwHWnLizRe4XfoIN89Fj3IM9I6AHx96gK8T7SRWBhIyVsJmuM13E1rbmKyaamB7onBjbay2rXeeO89f2uqvRBjcdsMecH85uUw0H5DnC4mPBJE8bGHnwm3sHx25a6ZP+vBS/Dza33Nqodh3KgNDOPSEK15Vn7+zB5Z5YhERhiL81bke3NF2irSko= - file: target/*.tgz - file_glob: true - skip_cleanup: true - on: - tags: true - repo: ryankurte/rust-radio-sx127x diff --git a/Cargo.lock b/Cargo.lock index a5f831e..6e0c6ee 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2,18 +2,39 @@ # It is not intended for manual editing. [[package]] name = "addr2line" -version = "0.14.0" +version = "0.14.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7c0929d69e78dd9bf5408269919fcbcaeb2e35e5d43e5815517cdc6a8e11a423" +checksum = "a55f82cfe485775d02112886f4169bde0c5894d75e79ead7eafe7e40a25e45f7" dependencies = [ "gimli", ] [[package]] name = "adler" -version = "0.2.3" +version = "1.0.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe" + +[[package]] +name = "adler32" +version = "1.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "aae1277d39aeec15cb388266ecc24b11c80469deae6067e17a1a7aa9e5c1f234" + +[[package]] +name = "aligned" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d39da9b88ae1a81c03c9c082b8db83f1d0e93914126041962af61034ab44c4a5" + +[[package]] +name = "aligned" +version = "0.3.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ee2a4ec343196209d6594e19543ae87a39f96d5534d7174822a3ad825dd6ed7e" +checksum = "c19796bd8d477f1a9d4ac2465b464a8b1359474f06a96bb3cda650b4fca309bf" +dependencies = [ + "as-slice", +] [[package]] name = "ansi_term" @@ -25,16 +46,16 @@ dependencies = [ ] [[package]] -name = "arrayref" -version = "0.3.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a4c527152e37cf757a3f78aae5a06fbeefdb07ccc535c980a3208ee3060dd544" - -[[package]] -name = "arrayvec" -version = "0.5.2" +name = "as-slice" +version = "0.1.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "23b62fc65de8e4e7f52534fb52b0f3ed04746ae267519eef2a83941e8085068b" +checksum = "45403b49e3954a4b8428a0ac21a4b7afadccf92bfd96273f1a58cd4812496ae0" +dependencies = [ + "generic-array 0.12.4", + "generic-array 0.13.3", + "generic-array 0.14.4", + "stable_deref_trait", +] [[package]] name = "atty" @@ -55,9 +76,9 @@ checksum = "cdb031dd78e28731d87d56cc8ffef4a8f36ca26c38fe2de700543e627f8a464a" [[package]] name = "backtrace" -version = "0.3.55" +version = "0.3.56" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ef5140344c85b01f9bbb4d4b7288a8aa4b3287ccef913a14bcc78a1063623598" +checksum = "9d117600f438b1707d4e4ae15d3595657288f8235a0eb593e80ecc98ab34e1bc" dependencies = [ "addr2line", "cfg-if 1.0.0", @@ -68,25 +89,25 @@ dependencies = [ ] [[package]] -name = "base64" -version = "0.13.0" +name = "bare-metal" +version = "0.2.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "904dfeac50f3cdaba28fc6f57fdcddb75f49ed61346676a78c4ffe55877802fd" +checksum = "5deb64efa5bd81e31fcd1938615a6d98c82eafcbcd787162b6f63b91d6bac5b3" +dependencies = [ + "rustc_version", +] [[package]] -name = "bit-set" -version = "0.2.0" +name = "bare-metal" +version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e6e1e6fb1c9e3d6fcdec57216a74eaa03e41f52a22f13a16438251d8e88b89da" -dependencies = [ - "bit-vec", -] +checksum = "f8fe8f5a8a398345e52358e18ff07cc17a568fbca5c6f73873d3a62056309603" [[package]] -name = "bit-vec" -version = "0.6.2" +name = "bitfield" +version = "0.13.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5f0dc55f2d8a1a85650ac47858bb001b4c0dd73d79e3c455a842925e68d29cd3" +checksum = "46afbd2983a5d5a7bd740ccb198caf5b82f45c40c09c0eed36052d91cb92e719" [[package]] name = "bitflags" @@ -94,22 +115,11 @@ version = "1.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "cf1de2fe8c75bc145a2f577add951f8134889b4795d47466a54a5c846d691693" -[[package]] -name = "blake2b_simd" -version = "0.5.11" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "afa748e348ad3be8263be728124b24a24f268266f6f5d58af9d75f6a40b5c587" -dependencies = [ - "arrayref", - "arrayvec", - "constant_time_eq", -] - [[package]] name = "byteorder" -version = "1.3.4" +version = "1.4.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "08c48aae112d48ed9f069b33538ea9e3e90aa263cfa3d1c24309612b1f7472de" +checksum = "ae44d1a3d5a19df61dd0c8beb138458ac2a53a7ac09eba97d55592540004306b" [[package]] name = "cast" @@ -122,9 +132,9 @@ dependencies = [ [[package]] name = "cc" -version = "1.0.65" +version = "1.0.67" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "95752358c8f7552394baf48cd82695b345628ad3f170d607de3ca03b8dacca15" +checksum = "e3c69b077ad434294d3ce9f1f6143a2a4b89a8a2d54ef813d85003a4fd1137fd" [[package]] name = "cfg-if" @@ -167,81 +177,108 @@ dependencies = [ ] [[package]] -name = "color-backtrace" -version = "0.5.0" +name = "cortex-m" +version = "0.5.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "54d692cadb16939b888c8232945dec39372207dd6893d19f536e318d14dc1468" +checksum = "59971a5cf4dacacaf738dd9d8660875118fce790f800f661893eb20894c1d622" dependencies = [ - "atty", - "backtrace", - "termcolor", + "aligned 0.2.0", + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "volatile-register", ] [[package]] -name = "constant_time_eq" -version = "0.1.5" +name = "cortex-m" +version = "0.6.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "245097e9a4535ee1e3e3931fcfcd55a796a44c643e8596ff6566d68f09b87bbc" +checksum = "9075300b07c6a56263b9b582c214d0ff037b00d45ec9fde1cc711490c56f1bb9" +dependencies = [ + "aligned 0.3.4", + "bare-metal 0.2.5", + "bitfield", + "cortex-m 0.7.2", + "volatile-register", +] [[package]] -name = "crossbeam-utils" -version = "0.8.1" +name = "cortex-m" +version = "0.7.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "02d96d1e189ef58269ebe5b97953da3274d83a93af647c2ddd6f9dab28cedb8d" +checksum = "643a210c1bdc23d0db511e2a576082f4ff4dcae9d0c37f50b431b8f8439d6d6b" dependencies = [ - "autocfg", - "cfg-if 1.0.0", - "lazy_static", + "bare-metal 0.2.5", + "bitfield", + "embedded-hal 0.2.4", + "volatile-register", ] [[package]] -name = "dirs" -version = "2.0.2" +name = "cortex-m-rt" +version = "0.6.13" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "13aea89a5c93364a98e9b37b2fa237effbb694d5cfe01c5b70941f7eb087d5e3" +checksum = "980c9d0233a909f355ed297ef122f257942de5e0a2cb1c39f60684b65bcb90fb" dependencies = [ - "cfg-if 0.1.10", - "dirs-sys", + "cortex-m-rt-macros", + "r0", ] [[package]] -name = "dirs-sys" -version = "0.3.5" +name = "cortex-m-rt-macros" +version = "0.1.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8e93d7f5705de3e49895a2b5e0b8855a1c27f080192ae9c32a6432d50741a57a" +checksum = "4717562afbba06e760d34451919f5c3bf3ac15c7bb897e8b04862a7428378647" dependencies = [ - "libc", - "redox_users", - "winapi", + "proc-macro2", + "quote", + "syn", +] + +[[package]] +name = "cortex-m-semihosting" +version = "0.3.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6bffa6c1454368a6aa4811ae60964c38e6996d397ff8095a8b9211b1c1f749bc" +dependencies = [ + "cortex-m 0.7.2", +] + +[[package]] +name = "crc32fast" +version = "1.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "81156fece84ab6a9f2afdb109ce3ae577e42b1228441eded99bd77f627953b1a" +dependencies = [ + "cfg-if 1.0.0", ] [[package]] name = "driver-cp2130" -version = "1.0.0-alpha.1" +version = "1.0.0-alpha.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "994be6a1b7cc259a2da6a3e9d11bdf4df58c2be841b75991d3bc4abca64b759d" +checksum = "f4eac76f1aa9cf700bb7e905fc3212014878bfd27571df5db648189c8d2e1d4b" dependencies = [ "bitflags", "byteorder", - "embedded-hal", + "embedded-hal 1.0.0-alpha.4", "failure", "hex", "lazy_static", "libc", - "libusb", "log", "rand", - "simplelog 0.7.6", + "rusb", + "simplelog 0.9.0", "structopt", ] [[package]] name = "driver-pal" -version = "0.8.0-alpha.0" +version = "0.8.0-alpha.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a9b6c25d9a1bad1421b81f647e6e6a199bc41f4e42c7e97a0db12edc624c7993" +checksum = "1c37eb49917b491b205271207996ac5b0d491312a4e8acd5014906280d16df31" dependencies = [ - "embedded-hal", + "embedded-hal 1.0.0-alpha.4", "log", "serde", "simplelog 0.8.0", @@ -249,6 +286,25 @@ dependencies = [ "toml", ] +[[package]] +name = "embedded-dma" +version = "0.1.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "46c8c02e4347a0267ca60813c952017f4c5948c232474c6010a381a337f1bda4" +dependencies = [ + "stable_deref_trait", +] + +[[package]] +name = "embedded-hal" +version = "0.2.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fa998ce59ec9765d15216393af37a58961ddcefb14c753b4816ba2191d865fcb" +dependencies = [ + "nb 0.1.3", + "void", +] + [[package]] name = "embedded-hal" version = "1.0.0-alpha.4" @@ -258,6 +314,25 @@ dependencies = [ "nb 1.0.0", ] +[[package]] +name = "embedded-hal-compat" +version = "0.1.2" +source = "git+https://github.com/ryankurte/embedded-hal-compat.git?branch=main#e58fd8ff563adee9609cdf891de61a03f7075666" +dependencies = [ + "embedded-hal 0.2.4", + "embedded-hal 1.0.0-alpha.4", +] + +[[package]] +name = "embedded-spi" +version = "0.6.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b5571fd6dcf36d58537276ea736c97e7358cfad9da9d48fc0a001b302e78933f" +dependencies = [ + "embedded-hal 0.2.4", + "log", +] + [[package]] name = "failure" version = "0.1.8" @@ -280,15 +355,55 @@ dependencies = [ "synstructure", ] +[[package]] +name = "filetime" +version = "0.2.14" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1d34cfa13a63ae058bfa601fe9e313bbdb3746427c1459185464ce0fcf62e1e8" +dependencies = [ + "cfg-if 1.0.0", + "libc", + "redox_syscall", + "winapi", +] + +[[package]] +name = "generic-array" +version = "0.12.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ffdf9f34f1447443d37393cc6c2b8313aebddcd96906caf34e54c68d8e57d7bd" +dependencies = [ + "typenum", +] + +[[package]] +name = "generic-array" +version = "0.13.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f797e67af32588215eaaab8327027ee8e71b9dd0b2b26996aedf20c030fce309" +dependencies = [ + "typenum", +] + +[[package]] +name = "generic-array" +version = "0.14.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "501466ecc8a30d1d3b7fc9229b122b2ce8ed6e9d9223f1138d4babb253e51817" +dependencies = [ + "typenum", + "version_check", +] + [[package]] name = "getrandom" -version = "0.1.15" +version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "fc587bc0ec293155d5bfa6b9891ec18a1e330c234f896ea47fbada4cadbe47e6" +checksum = "c9495705279e7140bf035dde1f6e750c162df8b625267cd52cc44e0b156732c8" dependencies = [ - "cfg-if 0.1.10", + "cfg-if 1.0.0", "libc", - "wasi 0.9.0+wasi-snapshot-preview1", + "wasi", ] [[package]] @@ -308,35 +423,56 @@ dependencies = [ "nix", ] +[[package]] +name = "hash32" +version = "0.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d4041af86e63ac4298ce40e5cca669066e75b6f1aa3390fe2561ffa5e1d9f4cc" +dependencies = [ + "byteorder", +] + +[[package]] +name = "heapless" +version = "0.6.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "634bd4d29cbf24424d0a4bfcbf80c6960129dc24424752a7d1d1390607023422" +dependencies = [ + "as-slice", + "generic-array 0.14.4", + "hash32", + "stable_deref_trait", +] + [[package]] name = "heck" -version = "0.3.1" +version = "0.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "20564e78d53d2bb135c343b3f47714a56af2061f1c928fdb541dc7b9fdd94205" +checksum = "87cbf45460356b7deeb5e3415b5563308c0a9b057c85e12b06ad551f98d0a6ac" dependencies = [ "unicode-segmentation", ] [[package]] name = "hermit-abi" -version = "0.1.17" +version = "0.1.18" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5aca5565f760fb5b220e499d72710ed156fdb74e631659e99377d9ebfbd13ae8" +checksum = "322f4de77956e22ed0e5032c359a0f1273f1f7f0d79bfa3b8ffbc730d7fbcc5c" dependencies = [ "libc", ] [[package]] name = "hex" -version = "0.4.2" +version = "0.4.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "644f9158b2f133fd50f5fb3242878846d9eb792e445c893805ff0e3824006e35" +checksum = "7f24254aa9a54b5c858eaee2f5bccdb46aaf0e486a595ed5fd8f86ba55232a70" [[package]] name = "humantime" -version = "2.0.1" +version = "2.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3c1ad908cc71012b7bea4d0c53ba96a8cba9962f048fa68d143376143d863b7a" +checksum = "9a3a5bfb195931eeb336b2a7b4d761daec841b97f947d34394601737a7bba5e4" [[package]] name = "i2cdev" @@ -367,30 +503,52 @@ checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646" [[package]] name = "libc" -version = "0.2.82" +version = "0.2.88" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "89203f3fba0a3795506acaad8ebce3c80c0af93f994d5a1d7a0b1eeb23271929" +checksum = "03b07a082330a35e43f63177cc01689da34fbffa0105e1246cf0311472cac73a" [[package]] -name = "libusb" -version = "0.3.0" +name = "libflate" +version = "1.0.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5f990ddd929cbe53de4ecd6cf26e1f4e0c5b9796e4c629d9046570b03738aa53" +checksum = "389de7875e06476365974da3e7ff85d55f1972188ccd9f6020dd7c8156e17914" dependencies = [ - "bit-set", - "libc", - "libusb-sys", + "adler32", + "crc32fast", + "libflate_lz77", + "rle-decode-fast", ] +[[package]] +name = "libflate_lz77" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3286f09f7d4926fc486334f28d8d2e6ebe4f7f9994494b6dab27ddfad2c9b11b" + [[package]] name = "libusb-sys" version = "0.2.3" -source = "git+https://github.com/cmsd2/libusb-sys#096f24787715239f9b71a0086ce81f6be157ceb7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4c53b6582563d64ad3e692f54ef95239c3ea8069e82c9eb70ca948869a7ad767" dependencies = [ "libc", "pkg-config", ] +[[package]] +name = "libusb1-sys" +version = "0.4.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "be241693102a24766d0b8526c8988771edac2842630d7e730f8e9fbc014f3703" +dependencies = [ + "cc", + "libc", + "libflate", + "pkg-config", + "tar", + "vcpkg", +] + [[package]] name = "linux-embedded-hal" version = "0.4.0-alpha.0" @@ -398,7 +556,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "cf344a431d851ca3181405a708961535366e167b28e51aa644488435512d0a8a" dependencies = [ "cast", - "embedded-hal", + "embedded-hal 1.0.0-alpha.4", "gpio-cdev", "i2cdev", "nb 1.0.0", @@ -410,18 +568,24 @@ dependencies = [ [[package]] name = "log" -version = "0.4.11" +version = "0.4.14" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4fabed175da42fed1fa0746b0ea71f412aa9d35e76e95e59b192c64b9dc2bf8b" +checksum = "51b9bbe6c47d51fc3e1a9b945965946b4c44142ab8792c50835a980d362c2710" dependencies = [ - "cfg-if 0.1.10", + "cfg-if 1.0.0", ] +[[package]] +name = "micromath" +version = "1.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "be00a244d4394124986da477e8b2814dcb7995ab238817d9037bc336c4b0b843" + [[package]] name = "miniz_oxide" -version = "0.4.3" +version = "0.4.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0f2d26ec3309788e423cfbf68ad1800f061638098d76a83681af979dc4eda19d" +checksum = "a92518e98c078586bc6c934028adcca4c92a53d6a958196de835170a01d84e4b" dependencies = [ "adler", "autocfg", @@ -476,9 +640,31 @@ dependencies = [ [[package]] name = "object" -version = "0.22.0" +version = "0.23.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a9a7ab5d64814df0fe4a4b5ead45ed6c5f181ee3ff04ba344313a6c80446c5d4" + +[[package]] +name = "panic-halt" +version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8d3b63360ec3cb337817c2dbd47ab4a0f170d285d8e5a2064600f3def1402397" +checksum = "de96540e0ebde571dc55c73d60ef407c653844e6f9a1e2fdbd40c07b9252d812" + +[[package]] +name = "panic-semihosting" +version = "0.5.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c3d55dedd501dfd02514646e0af4d7016ce36bc12ae177ef52056989966a1eec" +dependencies = [ + "cortex-m 0.7.2", + "cortex-m-semihosting", +] + +[[package]] +name = "paste" +version = "1.0.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c5d65c4d95931acda4498f675e332fcbdc9a06705cd07086c510e9b6009cd1c1" [[package]] name = "pkg-config" @@ -527,22 +713,28 @@ dependencies = [ [[package]] name = "quote" -version = "1.0.7" +version = "1.0.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "aa563d17ecb180e500da1cfd2b028310ac758de548efdd203e18f283af693f37" +checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7" dependencies = [ "proc-macro2", ] +[[package]] +name = "r0" +version = "0.2.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e2a38df5b15c8d5c7e8654189744d8e396bddc18ad48041a500ce52d6948941f" + [[package]] name = "radio" -version = "0.7.0" -source = "git+https://github.com/ryankurte/rust-radio.git?branch=master#6f82a79ddd0a7b0bf067df7fe0d5798363b3e85a" +version = "0.8.1" +source = "git+https://github.com/ryankurte/rust-radio.git?branch=master#b2383d559d0178f039d570189ed34593549ad66a" dependencies = [ "chrono", - "embedded-hal", + "embedded-hal 1.0.0-alpha.4", "log", - "nb 0.1.3", + "nb 1.0.0", ] [[package]] @@ -550,41 +742,60 @@ name = "radio-sx127x" version = "0.10.1" dependencies = [ "bitflags", - "color-backtrace", + "cortex-m 0.6.7", + "cortex-m-rt", + "cortex-m-semihosting", "driver-cp2130", "driver-pal", - "embedded-hal", + "embedded-hal 0.2.4", + "embedded-hal 1.0.0-alpha.4", + "embedded-hal-compat", + "embedded-spi", + "heapless", "humantime", "libc", + "libusb-sys", "linux-embedded-hal", "log", + "nb 1.0.0", + "panic-halt", + "panic-semihosting", "radio", "serde", "simplelog 0.8.0", + "stm32f0xx-hal", + "stm32f1xx-hal", + "stm32f3xx-hal", + "stm32f4xx-hal", + "stm32f7xx-hal", + "stm32h7xx-hal", + "stm32l0xx-hal", + "stm32l1xx-hal", + "stm32l4xx-hal", "structopt", + "void", ] [[package]] name = "rand" -version = "0.7.3" +version = "0.8.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6a6b1679d49b24bbfe0c803429aa1874472f50d9b363131f0e89fc356b544d03" +checksum = "0ef9e7e66b4468674bfcb0c81af8b7fa0bb154fa9f28eb840da5c447baeb8d7e" dependencies = [ - "getrandom", "libc", "rand_chacha", - "rand_core", + "rand_core 0.6.2", "rand_hc", ] [[package]] name = "rand_chacha" -version = "0.2.2" +version = "0.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f4c8ed856279c9737206bf725bf36935d8666ead7aa69b52be55af369d193402" +checksum = "e12735cf05c9e10bf21534da50a147b924d555dc7a547c42e6bb2d5b6017ae0d" dependencies = [ "ppv-lite86", - "rand_core", + "rand_core 0.6.2", ] [[package]] @@ -592,46 +803,57 @@ name = "rand_core" version = "0.5.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "90bde5296fc891b0cef12a6d03ddccc162ce7b2aff54160af9338f8d40df6d19" + +[[package]] +name = "rand_core" +version = "0.6.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "34cf66eb183df1c5876e2dcf6b13d57340741e8dc255b48e40a26de954d06ae7" dependencies = [ "getrandom", ] [[package]] name = "rand_hc" -version = "0.2.0" +version = "0.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ca3129af7b92a17112d59ad498c6f81eaf463253766b90396d39ea7a39d6613c" +checksum = "3190ef7066a446f2e7f42e239d161e905420ccab01eb967c9eb27d21b2322a73" dependencies = [ - "rand_core", + "rand_core 0.6.2", ] [[package]] name = "redox_syscall" -version = "0.1.57" +version = "0.2.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "94341e4e44e24f6b591b59e47a8a027df12e008d73fd5672dbea9cc22f4507d9" +dependencies = [ + "bitflags", +] + +[[package]] +name = "rle-decode-fast" +version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "41cc0f7e4d5d4544e8861606a285bb08d3e70712ccc7d2b84d7c0ccfaf4b05ce" +checksum = "cabe4fa914dec5870285fa7f71f602645da47c486e68486d2b4ceb4a343e90ac" [[package]] -name = "redox_users" -version = "0.3.5" +name = "rtcc" +version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "de0737333e7a9502c789a36d7c7fa6092a49895d4faa31ca5df163857ded2e9d" +checksum = "1048f7217bcd4bd977c01288e4973a69cf9195681f8b0b3a45d92ea21148f4a8" dependencies = [ - "getrandom", - "redox_syscall", - "rust-argon2", + "chrono", ] [[package]] -name = "rust-argon2" -version = "0.8.3" +name = "rusb" +version = "0.6.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4b18820d944b33caa75a71378964ac46f58517c92b6ae5f762636247c09e78fb" +checksum = "f6f32cd45962594f9f8cd4547b5757132715600e2c8840aa9ccd3d1a9ed6fdc6" dependencies = [ - "base64", - "blake2b_simd", - "constant_time_eq", - "crossbeam-utils", + "libc", + "libusb1-sys", ] [[package]] @@ -666,18 +888,18 @@ checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3" [[package]] name = "serde" -version = "1.0.117" +version = "1.0.124" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b88fa983de7720629c9387e9f517353ed404164b1e482c970a90c1a4aaf7dc1a" +checksum = "bd761ff957cb2a45fbb9ab3da6512de9de55872866160b23c25f1a841e99d29f" dependencies = [ "serde_derive", ] [[package]] name = "serde_derive" -version = "1.0.117" +version = "1.0.124" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cbd1ae72adb44aab48f325a02444a5fc079349a8d804c1fc922aed3f7454c74e" +checksum = "1800f7693e94e186f5e25a28291ae1570da908aff7d97a095dec1e56ff99069b" dependencies = [ "proc-macro2", "quote", @@ -707,20 +929,20 @@ dependencies = [ [[package]] name = "simplelog" -version = "0.7.6" +version = "0.8.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3cf9a002ccce717d066b3ccdb8a28829436249867229291e91b25d99bd723f0d" +checksum = "2b2736f58087298a448859961d3f4a0850b832e72619d75adc69da7993c2cd3c" dependencies = [ "chrono", "log", - "term", + "termcolor", ] [[package]] name = "simplelog" -version = "0.8.0" +version = "0.9.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2b2736f58087298a448859961d3f4a0850b832e72619d75adc69da7993c2cd3c" +checksum = "4bc0ffd69814a9b251d43afcabf96dad1b29f5028378056257be9e3fecc9f720" dependencies = [ "chrono", "log", @@ -729,15 +951,292 @@ dependencies = [ [[package]] name = "spidev" -version = "0.4.0" +version = "0.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "aa5aa93a87c20f4efdf494917ef8fb475522601256ba6bb00ad1e6101f779fe9" +checksum = "83d6d2546cfabc5769643fc2a430d6ef811342329a338d1a892c7d52c587890e" dependencies = [ "bitflags", "libc", "nix", ] +[[package]] +name = "stable_deref_trait" +version = "1.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3" + +[[package]] +name = "stm32-usbd" +version = "0.5.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "70d13eca735cae37df697f599777b000cc0ee924df8452f2b4bfaa6798ab0338" +dependencies = [ + "cortex-m 0.6.7", + "usb-device", + "vcell", +] + +[[package]] +name = "stm32f0" +version = "0.11.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9673b9c3ecdf8ea1133492f3070515d64f51e98439710eae062552fc80b94a6c" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32f0xx-hal" +version = "0.17.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a01836951a5eb4d322f31c63a30dcfcaec383f88d6d89cadb90311c00e564a3b" +dependencies = [ + "bare-metal 0.2.5", + "cast", + "cortex-m 0.6.7", + "embedded-hal 0.2.4", + "nb 0.1.3", + "stm32f0", + "void", +] + +[[package]] +name = "stm32f1" +version = "0.11.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "849b1e8d9bcfd792c9d9178cf86165d299a661c26e35d9322ae9382d3f3fe460" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32f1xx-hal" +version = "0.7.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bf679de34580d2f8806d9a6384c110b6df002404e1ff024cf8d567c91df4d4b2" +dependencies = [ + "cast", + "cortex-m 0.6.7", + "cortex-m-rt", + "embedded-dma", + "embedded-hal 0.2.4", + "nb 0.1.3", + "stm32f1", + "void", +] + +[[package]] +name = "stm32f3" +version = "0.12.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "636387c2c5af11075c8ed3ef203c01460204be3a479397c2380622cbd61a673f" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32f3xx-hal" +version = "0.6.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a96e54d3ba219c0d7d68e79fc72afd784972727e32c32bcae0178f2c132b1375" +dependencies = [ + "bare-metal 0.2.5", + "cfg-if 1.0.0", + "cortex-m 0.6.7", + "cortex-m-rt", + "embedded-dma", + "embedded-hal 0.2.4", + "nb 0.1.3", + "paste", + "rtcc", + "stm32-usbd", + "stm32f3", + "void", +] + +[[package]] +name = "stm32f4" +version = "0.11.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "11460b4de3a84f072e2cf6e76306c64d27f405a0e83bace0a726f555ddf4bf33" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32f4xx-hal" +version = "0.8.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b3a2f044469d1e3aff2cd02bee8b2724f3d5d91f3175e5d1ec99770320d16192" +dependencies = [ + "bare-metal 0.2.5", + "cast", + "cortex-m 0.6.7", + "cortex-m-rt", + "embedded-hal 0.2.4", + "nb 0.1.3", + "rand_core 0.5.1", + "stm32f4", + "void", +] + +[[package]] +name = "stm32f7" +version = "0.11.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e8e6dbd8bf0965421c0c76c09e05683e71243216bf4d87984c7f95ed53caa28c" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32f7xx-hal" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3146d2ffde605a5187a72419cda448a34daf057b27a178280b17f8a480501dc6" +dependencies = [ + "as-slice", + "bare-metal 0.2.5", + "cast", + "cortex-m 0.6.7", + "cortex-m-rt", + "embedded-hal 0.2.4", + "micromath", + "nb 0.1.3", + "stm32f7", + "void", +] + +[[package]] +name = "stm32h7" +version = "0.12.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7571f17d1ed7d67957d0004de6c52bd1ef5e736ed5ddc2bcecf001512269f77c" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32h7xx-hal" +version = "0.8.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2df47cc6248aa85e5d5762f8755448270fd406b0a155557671de46cb5aef4546" +dependencies = [ + "bare-metal 1.0.0", + "cast", + "cortex-m 0.6.7", + "cortex-m-rt", + "embedded-hal 0.2.4", + "nb 1.0.0", + "paste", + "stm32h7", + "void", +] + +[[package]] +name = "stm32l0" +version = "0.10.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8386ff55bd099b3c6c7ea16bb68296cbe6025981f96ed69b222b6e6633ca6148" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32l0xx-hal" +version = "0.6.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cb3d290213676eebb026c57d93d76e878ba554f3781693bb132891aedae83a8e" +dependencies = [ + "as-slice", + "cast", + "cortex-m 0.6.7", + "cortex-m-rt", + "cortex-m-semihosting", + "embedded-hal 0.2.4", + "nb 0.1.3", + "stm32l0", + "void", +] + +[[package]] +name = "stm32l1" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "edda4346740d0f01082c353dca33b320e84f9fb51765fdcac7a624017c5a8ff4" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.5.11", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32l1xx-hal" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4dc5ad008615fe51a3f7752468f83d1d1d5d80e1b32520be690bf4fad64e7aa4" +dependencies = [ + "bare-metal 0.2.5", + "cast", + "cortex-m 0.5.11", + "embedded-hal 0.2.4", + "nb 0.1.3", + "stm32l1", + "void", +] + +[[package]] +name = "stm32l4" +version = "0.12.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a9abc2787195d7055b342be5a7934d74099fd7e92b81c0771002b3b35ccfc85b" +dependencies = [ + "bare-metal 0.2.5", + "cortex-m 0.6.7", + "cortex-m-rt", + "vcell", +] + +[[package]] +name = "stm32l4xx-hal" +version = "0.6.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3fc8fef7443befd04ba8714ccb9475d86639794492e2b2dcbfbe675bbae8fafa" +dependencies = [ + "as-slice", + "cast", + "cortex-m 0.6.7", + "embedded-hal 0.2.4", + "generic-array 0.13.3", + "nb 0.1.3", + "stable_deref_trait", + "stm32l4", + "void", +] + [[package]] name = "strsim" version = "0.8.0" @@ -770,9 +1269,9 @@ dependencies = [ [[package]] name = "syn" -version = "1.0.52" +version = "1.0.62" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6c1e438504729046a5cfae47f97c30d6d083c7d91d94603efdae3477fc070d4c" +checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512" dependencies = [ "proc-macro2", "quote", @@ -801,13 +1300,14 @@ dependencies = [ ] [[package]] -name = "term" -version = "0.6.1" +name = "tar" +version = "0.4.33" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c0863a3345e70f61d613eab32ee046ccd1bcc5f9105fe402c61fcd0c13eeb8b5" +checksum = "c0bcfbd6a598361fda270d82469fff3d65089dc33e175c9a131f7b4cd395f228" dependencies = [ - "dirs", - "winapi", + "filetime", + "libc", + "xattr", ] [[package]] @@ -844,19 +1344,25 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "6db9e6914ab8b1ae1c260a4ae7a49b6c5611b40328a735b21862567685e73255" dependencies = [ "libc", - "wasi 0.10.0+wasi-snapshot-preview1", + "wasi", "winapi", ] [[package]] name = "toml" -version = "0.5.7" +version = "0.5.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "75cf45bb0bef80604d001caaec0d09da99611b3c0fd39d3080468875cdb65645" +checksum = "a31142970826733df8241ef35dc040ef98c679ab14d7c3e54d827099b3acecaa" dependencies = [ "serde", ] +[[package]] +name = "typenum" +version = "1.12.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "373c8a200f9e67a0c95e62a4f52fbf80c23b4381c05a17845531982fa99e6b33" + [[package]] name = "unicode-segmentation" version = "1.7.1" @@ -875,6 +1381,24 @@ version = "0.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564" +[[package]] +name = "usb-device" +version = "0.2.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "849eed9b4dc61a1f17ba1d7a5078ceb095b9410caa38a506eb281ed5eff12fbd" + +[[package]] +name = "vcell" +version = "0.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002" + +[[package]] +name = "vcpkg" +version = "0.2.11" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b00bca6106a5e23f3eee943593759b7fcddb00554332e856d990c893966879fb" + [[package]] name = "vec_map" version = "0.8.2" @@ -894,10 +1418,13 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d" [[package]] -name = "wasi" -version = "0.9.0+wasi-snapshot-preview1" +name = "volatile-register" +version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cccddf32554fecc6acb585f82a32a72e28b48f8c4c1883ddfeeeaa96f7d8e519" +checksum = "0d67cb4616d99b940db1d6bd28844ff97108b498a6ca850e5b6191a532063286" +dependencies = [ + "vcell", +] [[package]] name = "wasi" @@ -935,3 +1462,12 @@ name = "winapi-x86_64-pc-windows-gnu" version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" + +[[package]] +name = "xattr" +version = "0.2.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "244c3741f4240ef46274860397c7c74e50eb23624996930e484c16679633a54c" +dependencies = [ + "libc", +] diff --git a/Cargo.toml b/Cargo.toml index 4128fcc..0af5ead 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -11,7 +11,40 @@ edition = "2018" util = [ "structopt", "driver-pal/hal", "simplelog", "humantime" ] default = [ "util", "serde" ] +# features for examples +examples = [] + +stm32f0xx = [] +stm32f1xx = [] +stm32f3xx = [] +stm32f4xx = [] +stm32f7xx = [] +stm32h7xx = [] +stm32l0xx = [] +stm32l1xx = [] +stm32l4xx = [] + +stm32f042 = ["stm32f0xx-hal/stm32f042", "stm32f0xx-hal/rt", "examples"] +stm32f030xc = ["stm32f0xx-hal/stm32f030xc", "stm32f0xx-hal/rt", "examples"] +stm32f100 = ["stm32f1xx-hal/stm32f100", "stm32f1xx-hal/rt", "examples"] +stm32f101 = ["stm32f1xx-hal/stm32f101", "stm32f1xx-hal/rt", "examples"] +stm32f103 = ["stm32f1xx-hal/stm32f103", "stm32f1xx-hal/rt", "examples"] +stm32f303xc = ["stm32f3xx-hal/stm32f303xc", "stm32f3xx-hal/rt", "examples"] +stm32f401 = ["stm32f4xx-hal/stm32f401", "stm32f4xx-hal/rt", "examples"] +stm32f405 = ["stm32f4xx-hal/stm32f405", "stm32f4xx-hal/rt", "examples"] +stm32f411 = ["stm32f4xx-hal/stm32f411", "stm32f4xx-hal/rt", "examples"] +stm32f722 = ["stm32f7xx-hal/stm32f722", "stm32f7xx-hal/rt", "examples"] +stm32h742 = ["stm32h7xx-hal/stm32h742", "stm32h7xx-hal/rt", "examples"] +stm32l0x2 = ["stm32l0xx-hal/stm32l0x2", "stm32l0xx-hal/rt", "examples", "stm32l0xx-hal/mcu-STM32L072KZTx"] +stm32l0x1 = ["stm32l0xx-hal/stm32l0x1", "stm32l0xx-hal/rt", "examples", "stm32l0xx-hal/mcu-STM32L071KBTx"] +stm32l100 = ["stm32l1xx-hal/stm32l100", "stm32l1xx-hal/rt", "examples"] +stm32l151 = ["stm32l1xx-hal/stm32l151", "stm32l1xx-hal/rt", "examples"] +stm32l4x1 = ["stm32l4xx-hal/stm32l4x1", "stm32l4xx-hal/rt", "examples"] +stm32l4x2 = ["stm32l4xx-hal/stm32l4x2", "stm32l4xx-hal/rt", "examples"] + [dependencies] +#embedded-hal-compat = "0.1.3" +embedded-hal-compat = { git = "https://github.com/ryankurte/embedded-hal-compat.git", branch = "main"} libc = "0.2" log = { version = "0.4" } bitflags = "1.0" @@ -22,19 +55,41 @@ simplelog = { version = "0.8.0", optional = true } humantime = { version = "2.0.0", optional = true } linux-embedded-hal = { version = "0.4.0-alpha.0", optional = true } driver-cp2130 = { version = "1.0.0-alpha.1", optional = true } +void = { version = "1.0", default-features = false} # for return result i stm32f0xx_hal + +radio = { version = "0.8.1" } + +# Next could be dev-dependencies since they are only for examples, but +# dev-dependencies do not allow optional (as of cargo 1.44.1). +stm32f0xx-hal = {version = "^0.17.1",optional = true} +stm32f1xx-hal = {version = "^0.7.0", optional = true} +stm32f3xx-hal = {version = "^0.6.1", optional = true} +stm32f4xx-hal = {version = "^0.8.3", optional = true} +stm32f7xx-hal = {version = "^0.2.0", optional = true} +stm32h7xx-hal = {version = "^0.8.0", optional = true} +stm32l0xx-hal = {version = "^0.6.2", optional = true} +stm32l1xx-hal = {version = "^0.1.0", optional = true, default-features = false} +stm32l4xx-hal = {version = "^0.6.0", optional = true} + +embedded-hal = {version = "1.0.0-alpha.4" } +old-e-h = {version = "0.2.4", package = "embedded-hal" } -[dependencies.radio] -version = "0.7.0" +libusb-sys = {version ="0.2", optional = true} -[dependencies.embedded-hal] -version = "1.0.0-alpha.4" +embedded-spi = {version = "0.6", default-features = false} +driver-pal = {version = "0.8.0-alpha.0", default-features = false} -[dependencies.driver-pal] -version = "0.8.0-alpha.0" -default-features = false +#[dev-dependencies.color-backtrace] # this needs std, which causes example build to fail +#color-backtrace = "0.5" -[dev-dependencies] -color-backtrace = "0.5" +[dev-dependencies] # for examples +cortex-m = "0.6.7" +cortex-m-rt = "0.6.13" +cortex-m-semihosting = "0.3.7" +panic-halt = "0.2.0" +panic-semihosting = ">=0.5.2" +heapless = ">=0.4.3" # for example lora_spi_gps +nb = ">=0.1.2" # for example lora_spi_gps [[bin]] @@ -45,12 +100,32 @@ required-features = ["util"] [[test]] name = "integration" path = "tests/integration.rs" -required-features = ["utils"] +required-features = ["default", "util"] [patch.crates-io] # Patch for radio-hal to update embedded-hal version radio = { git = "https://github.com/ryankurte/rust-radio.git", branch = "master" } + # Fix for libusb-sys package discovery -libusb-sys = { git = "https://github.com/cmsd2/libusb-sys" } +#libusb-sys = { git = "https://github.com/cmsd2/libusb-sys" } +#libusb-sys = { git = "https://github.com/dcuddeback/libusb-sys" } +#https://github.com/dcuddeback/libusb-sys consider +#libusb-sys = {version ="0.2", optional = true} + + +[[example]] +name = "lora_spi_send" +path = "examples/lora_spi_send.rs" +required-features = ["examples"] + +[[example]] +name = "lora_spi_receive" +path = "examples/lora_spi_receive.rs" +required-features = ["examples"] + +[[example]] +name = "lora_spi_gps" +path = "examples/lora_spi_gps.rs" +required-features = ["examples"] diff --git a/README.md b/README.md index 939ef28..953d189 100644 --- a/README.md +++ b/README.md @@ -30,7 +30,10 @@ Install the utility with one of the following methods: The radio-sx127x crate can be used as an interface library for the sx127x radio on other embedded devices. To enable `no_std` usage, add `default-features = false` to your -`Cargo.toml` +`Cargo.toml`. +See examples `lora_spi_send`, `lora_spi_receive`, and `lora_spi_gps`. +Comments in the `file examples/lora_spi_send.rs` show how to build and run the examples +on several different MCUs. ## Useful Resources diff --git a/build.rs b/build.rs new file mode 100644 index 0000000..ebef9f7 --- /dev/null +++ b/build.rs @@ -0,0 +1,108 @@ +// following https://doc.rust-lang.org/cargo/reference/build-scripts.html +use std::env; +//use std::io::Write; //needed for debugging +//use std::path::PathBuf; //needed for one approach +//use std::fs; //needed for one approach + +fn main() { + // This file (build.rs) needs to be in the package root. + // It is called before the linker and used to arrange for the linker to find the + // proper memory.x file for the MCU. The memory.x files are assumed to be in a + // directory examples/memoryMaps/xxx/ where xxx is replaced by an one of + + let mcus = [ + "STM32F042", + "STM32F030XC", + "STM32F100", + "STM32F101", + "STM32F103", + "STM32F303XC", + "STM32F401", + "STM32F411", + "STM32F722", + "STM32H742", + "STM32L0X2", + "STM32L100", + "STM32L151", + "STM32L4X2", + "LM3S6965", + "GD32VF103CB", + "GD32VF103C8", + "GD32VF103_EXTRA", + ]; + + // For example, examples/memoryMaps/STM32F401/memory.x + // Note that the MCU string must be in upper case because it is also used to + // find the CARGO_FEATURE_xxx environment variable (eg CARGO_FEATURE_STM32F401) + // which is in upper case. + + // There are two possible appraches: one is to copy the appropriate memory.x file into the OUT_DIR + // where compiled pieces are placed for linking, then add that dir to the linker search path. + // (Adding to path may be redundant, the OUT_DIR is probably already in the search path.) + // The second approach is to simply add the location of the appropriate memory.x file to + // the search path. This is not only quicker, but has the advantage that the memory.x file + // can be MCU specific. In the copy appraoch the OUT_DIR is only MCU triple specific, so there + // could be conflicts (in the unlikely situation) where two mcu's have the same triple and + // different memory layouts. + + // The memoryNote.txt file is just to record some debugging information + //let mut df = std::fs::File::create("memoryNote.txt").unwrap(); + + // It is assumed that only one MCU feature will be specified. If there are more then + // only the first is found (but actual code may be a mess if cargo really lets you do that). + + let pre = "CARGO_FEATURE_".to_owned(); + + // For debugging. Write all CARGO_FEATURE_ mcu variables to file + //for m in &mcus { + // match env::var_os(pre.clone() + m) { + // None => df.write(format!("{}{} is not set\n", pre, m).as_bytes()).unwrap(), + // Some(x) => df.write(format!("{}{} is {:?}\n", pre, m, x).as_bytes()).unwrap() + // }; + // }; + + // For debugging. Write all env variables to file + //df.write(format!("env::vars() gives\n").as_bytes()).unwrap(); + //for (key, value) in env::vars() { + // df.write(format!(" {:?}: {:?}\n", key, value).as_bytes()).unwrap(); + // }; + + // Compare mcus elements against CARGO_FEATURE_* env variables to determine directory of + // memory.x file to use. + // If there is no MCU feature identified then the usual default is that memory.x is + // searched for in the package root. + + let mut indir: String = "".to_string(); + let d = "examples/memoryMaps/".to_owned(); + for m in &mcus { + let v = env::var_os(pre.clone() + m); + if v.is_some() { + indir = d + m; + break; + }; + } + + // Adding an empty search path causes problems compiling the crate, so skip if memory.x not found. + // This allows 'cargo build --features $MCU ' to work + // but do not expect to compile examples. (There will be a 'cannot find linker script memory.x' error.) + + if !indir.is_empty() { + //df.write(format!("in mcu found condition.\n").as_bytes()).unwrap(); + let infile = indir.clone() + "/memory.x"; + + // one approach + //let outdir = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + //let outfile = &PathBuf::from(env::var_os("OUT_DIR").unwrap()).join("memory.x"); + //fs::copy(&infile, outfile).unwrap(); // Copy memory.x to OUT_DIR. Possibly should handle error. + //println!("cargo:rustc-link-search={}", outdir.display()); + + // other approach + println!("cargo:rustc-link-search={}", indir); + + println!("cargo:rerun-if-changed=build.rs"); + println!("cargo:rerun-if-changed={}", infile); + } else { + //df.write(format!("mcu NOT found condition.\n").as_bytes()).unwrap(); + println!(); + } +} diff --git a/examples/lora_spi_gps.rs b/examples/lora_spi_gps.rs new file mode 100644 index 0000000..f63962a --- /dev/null +++ b/examples/lora_spi_gps.rs @@ -0,0 +1,880 @@ +//! Serial interface read GPS on usart and transmit with LoRa using crate radio_sx127x (on SPI). +//! See example lora_spi_send for more details. +//! See the MCU device setup() sections for details on pin connections. + +//https://www.rfwireless-world.com/Tutorials/LoRa-channels-list.html +// channels are as follows +// 'CH_00_900': 903.08, 'CH_01_900': 905.24, 'CH_02_900': 907.40, +// 'CH_03_900': 909.56, 'CH_04_900': 911.72, 'CH_05_900': 913.88, +// 'CH_06_900': 916.04, 'CH_07_900': 918.20, 'CH_08_900': 920.36, +// 'CH_09_900': 922.52, 'CH_10_900': 924.68, 'CH_11_900': 926.84, 'CH_12_900': 915, +// +// 'CH_10_868': 865.20, 'CH_11_868': 865.50, 'CH_12_868': 865.80, +// 'CH_13_868': 866.10, 'CH_14_868': 866.40, 'CH_15_868': 866.70, +// 'CH_16_868': 867 , 'CH_17_868': 868 , + +// See FREQUENCY below to set the channel. + +#![no_std] +#![no_main] + +#[cfg(debug_assertions)] +extern crate panic_semihosting; + +#[cfg(not(debug_assertions))] +extern crate panic_halt; +//extern crate panic_reset; + +use core::convert::Infallible; + +use cortex_m_rt::entry; +use cortex_m_semihosting::*; +use nb::block; + +use heapless::{consts, Vec}; + +use embedded_hal::blocking::delay::DelayMs; + +use embedded_hal_compat::eh1_0::blocking::delay::DelayMs as _; +use embedded_hal_compat::IntoCompat; + +// MODE needs the old version as it is passed to the device hal crates +//use embedded_hal::{spi::{Mode, Phase, Polarity}, }; +use old_e_h::spi::{Mode, Phase, Polarity}; + +//use asm_delay::{ AsmDelay, bitrate, }; + +//use cortex_m::asm; //for breakpoint + +use radio_sx127x::Error as sx127xError; // Error name conflict with hals +use radio_sx127x::{ + device::lora::{ + Bandwidth, CodingRate, FrequencyHopping, LoRaChannel, LoRaConfig, PayloadCrc, + PayloadLength, SpreadingFactor, + }, + device::{Channel, Modem, PaConfig, PaSelect}, + prelude::*, // prelude has Sx127x, +}; + +//use radio::{Receive, Transmit}; +use radio::Transmit; // trait needs to be in scope to find methods start_transmit and check_transmit. + +// lora and radio parameters + +pub const MODE: Mode = Mode { + // SPI mode for radio + phase: Phase::CaptureOnSecondTransition, + polarity: Polarity::IdleHigh, +}; + +const FREQUENCY: u32 = 907_400_000; // frequency in hertz ch_12_900: 915_000_000, ch_2_900: 907_400_000 + +const CONFIG_CH: LoRaChannel = LoRaChannel { + freq: FREQUENCY as u32, // frequency in hertz + bw: Bandwidth::Bw125kHz, + sf: SpreadingFactor::Sf7, + cr: CodingRate::Cr4_8, +}; + +const CONFIG_LORA: LoRaConfig = LoRaConfig { + preamble_len: 0x8, + symbol_timeout: 0x64, + payload_len: PayloadLength::Variable, + payload_crc: PayloadCrc::Enabled, + frequency_hop: FrequencyHopping::Disabled, + invert_iq: false, +}; + +const CONFIG_PA: PaConfig = PaConfig { + output: PaSelect::Boost, + power: 10, +}; + +//let CONFIG_RADIO = Config::default() ; + +const CONFIG_RADIO: radio_sx127x::device::Config = radio_sx127x::device::Config { + modem: Modem::LoRa(CONFIG_LORA), + channel: Channel::LoRa(CONFIG_CH), + pa_config: CONFIG_PA, + xtal_freq: 32000000, // CHECK + timeout_ms: 100, +}; + +// setup() does all hal/MCU specific setup and returns generic hal device for use in main code. + +#[cfg(feature = "stm32f0xx")] // eg stm32f030xc +use stm32f0xx_hal::{ + delay::Delay, + pac::Peripherals, + pac::USART2, + prelude::*, + serial::{Rx, Serial, Tx}, + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32f0xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let mut p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.configure().freeze(&mut p.FLASH); + + let gpioa = p.GPIOA.split(&mut rcc); + let gpiob = p.GPIOB.split(&mut rcc); + + // stm32f030xc builds with gpiob..into_alternate_af4(cs) USART3 on tx pb10, rx pb11 + // but stm32f042 only has 2 usarts. + // Both have gpioa..into_alternate_af1(cs) USART2 with tx on pa2 and rx pa3 + + let (tx, rx, sck, miso, mosi, _rst, pa1, pb8, pb9, pa0) = + cortex_m::interrupt::free(move |cs| { + ( + gpioa.pa2.into_alternate_af1(cs), //tx pa2 for GPS + gpioa.pa3.into_alternate_af1(cs), //rx pa3 for GPS + gpioa.pa5.into_alternate_af0(cs), // sck on PA5 + gpioa.pa6.into_alternate_af0(cs), // miso on PA6 + gpioa.pa7.into_alternate_af0(cs), // mosi on PA7 + //gpioa.pa1.into_push_pull_output(cs), // cs on PA1 + gpiob.pb1.into_push_pull_output(cs), // reset on PB1 + gpioa.pa1.into_push_pull_output(cs), // CsPin on PA1 + gpiob.pb8.into_floating_input(cs), // BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input(cs), // ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output(cs), // ResetPin on PA0 + ) + }); + + let (tx, rx) = Serial::usart2(p.USART2, (tx, rx), 9600.bps(), &mut rcc).split(); + + let spi = Spi::spi1(p.SPI1, (sck, miso, mosi), MODE, 8.mhz(), &mut rcc); + + let delay = Delay::new(cp.SYST, &rcc); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), + pa1.compat(), + pb8.compat(), + pb9.compat(), + pa0.compat(), + delay.compat(), + &CONFIG_RADIO, + ) + .unwrap(); // should handle error + + (tx, rx, lora) +} + +#[cfg(feature = "stm32f1xx")] // eg blue pill stm32f103 +use stm32f1xx_hal::{ + delay::Delay, + device::USART2, + pac::Peripherals, + prelude::*, + serial::{Config, Rx, Serial, Tx}, //, StopBits + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32f1xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + let clocks = rcc + .cfgr + .sysclk(64.mhz()) + .pclk1(32.mhz()) + .freeze(&mut p.FLASH.constrain().acr); + + let mut afio = p.AFIO.constrain(&mut rcc.apb2); + let mut gpioa = p.GPIOA.split(&mut rcc.apb2); + let mut gpiob = p.GPIOB.split(&mut rcc.apb2); + + let (tx, rx) = Serial::usart2( + p.USART2, + ( + gpioa.pa2.into_alternate_push_pull(&mut gpioa.crl), //tx pa2 for GPS rx + gpioa.pa3, + ), //rx pa3 for GPS tx + &mut afio.mapr, + Config::default().baudrate(9_600.bps()), + clocks, + &mut rcc.apb1, + ) + .split(); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_alternate_push_pull(&mut gpioa.crl), // sck on PA5 + gpioa.pa6.into_floating_input(&mut gpioa.crl), // miso on PA6 + gpioa.pa7.into_alternate_push_pull(&mut gpioa.crl), // mosi on PA7 + ), + &mut afio.mapr, + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output(&mut gpioa.crl).compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input(&mut gpiob.crh).compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input(&mut gpiob.crh).compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output(&mut gpioa.crl).compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + (tx, rx, lora) +} + +#[cfg(feature = "stm32f3xx")] // eg Discovery-stm32f303 +use stm32f3xx_hal::{ + delay::Delay, + prelude::*, + serial::{Rx, Serial, Tx}, + spi::{Error, Spi}, + stm32::Peripherals, + stm32::USART2, +}; + +#[cfg(feature = "stm32f3xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + let clocks = rcc + .cfgr + .sysclk(64.mhz()) + .pclk1(32.mhz()) + .freeze(&mut p.FLASH.constrain().acr); + + let mut gpioa = p.GPIOA.split(&mut rcc.ahb); + let mut gpiob = p.GPIOB.split(&mut rcc.ahb); + + let (tx, rx) = Serial::usart2( + p.USART2, + ( + gpioa.pa2.into_af7(&mut gpioa.moder, &mut gpioa.afrl), //tx pa2 for GPS rx + gpioa.pa3.into_af7(&mut gpioa.moder, &mut gpioa.afrl), + ), //rx pa3 for GPS tx + 9600.bps(), // 115_200.bps(), + clocks, + &mut rcc.apb1, + ) + .split(); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 + gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 + gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 + ), + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa + .pa1 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //CsPin on PA1 + gpiob + .pb8 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //BusyPin DIO0 on PB8 + gpiob + .pb9 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //ReadyPin DIO1 on PB9 + gpioa + .pa0 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + (tx, rx, lora) +} + +#[cfg(feature = "stm32f4xx")] +// eg Nucleo-64 stm32f411, blackpill stm32f411, blackpill stm32f401 +use stm32f4xx_hal::{ + delay::Delay, + prelude::*, + serial::{config::Config, Rx, Serial, Tx}, + spi::{Error, Spi}, + stm32::Peripherals, + stm32::USART2, + time::MegaHertz, +}; + +#[cfg(feature = "stm32f4xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let rcc = p.RCC.constrain(); + let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); + + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let (tx, rx) = Serial::usart2( + p.USART2, + ( + gpioa.pa2.into_alternate_af7(), //tx pa2 for GPS rx + gpioa.pa3.into_alternate_af7(), + ), //rx pa3 for GPS tx + Config::default().baudrate(9600.bps()), + clocks, + ) + .unwrap() + .split(); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_alternate_af5(), // sck on PA5 + gpioa.pa6.into_alternate_af5(), // miso on PA6 + gpioa.pa7.into_alternate_af5(), // mosi on PA7 + ), + MODE, + MegaHertz(8).into(), + clocks, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + // open_drain_output is really input and output. BusyPin is just input, but I think this should work + // gpiob.pb8.into_alternate_open_drain(&mut gpiob.crh), + // however, gives trait bound ... InputPin` is not satisfied + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + //DIO0 triggers RxDone/TxDone status. + //DIO1 triggers RxTimeout and other errors status. + //D02, D03 ? + + //lora.lora_configure( config_lora, &config_ch ).unwrap(); # not yet pub, to change something + + (tx, rx, lora) +} + +#[cfg(feature = "stm32f7xx")] +use stm32f7xx_hal::{ + delay::Delay, + device::Peripherals, // note non-standard device vs pac + device::USART2, // note non-standard device vs pac + prelude::*, + serial::{Config, Oversampling, Rx, Serial, Tx}, + spi::{ClockDivider, Error, Spi}, +}; + +#[cfg(feature = "stm32f7xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let sck = gpioa.pa5.into_alternate_af5(); // sck on PA5 + let miso = gpioa.pa6.into_alternate_af5(); // miso on PA6 + let mosi = gpioa.pa7.into_alternate_af5(); // mosi on PA7 + + // somewhere 8.mhz needs to be set in spi + + let spi = Spi::new(p.SPI1, (sck, miso, mosi)).enable::(&mut rcc, ClockDivider::DIV32, MODE); + + // Relative to other hal setups, Serial::new is after spi::new because clocks partially consumes rcc. + + let clocks = rcc.cfgr.sysclk(216.mhz()).freeze(); + //let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); + + let (tx, rx) = Serial::new( + p.USART2, + ( + gpioa.pa2.into_alternate_af7(), //tx pa2 for GPS + gpioa.pa3.into_alternate_af7(), + ), //rx pa3 for GPS + clocks, + Config { + baud_rate: 9600.bps(), + oversampling: Oversampling::By16, + }, + ) + .split(); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + (tx, rx, lora) +} + +#[cfg(feature = "stm32h7xx")] +use stm32h7xx_hal::{ + delay::Delay, + pac::Peripherals, + pac::USART2, + prelude::*, + serial::{Rx, Tx}, + spi::Error, +}; + +#[cfg(feature = "stm32h7xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let pwr = p.PWR.constrain(); + let vos = pwr.freeze(); + let rcc = p.RCC.constrain(); + let ccdr = rcc.sys_ck(160.mhz()).freeze(vos, &p.SYSCFG); + let clocks = ccdr.clocks; + + let gpioa = p.GPIOA.split(ccdr.peripheral.GPIOA); + let gpiob = p.GPIOB.split(ccdr.peripheral.GPIOB); + + let (tx, rx) = p + .USART2 + .serial( + ( + gpioa.pa2.into_alternate_af7(), //tx pa2 for GPS rx + gpioa.pa3.into_alternate_af7(), + ), //rx pa3 for GPS tx + 9600.bps(), + ccdr.peripheral.USART2, + &clocks, + ) + .unwrap() + .split(); + + // following github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/spi.rs + let spi = p.SPI1.spi( + ( + gpioa.pa5.into_alternate_af5(), // sck on PA5 + gpioa.pa6.into_alternate_af5(), // miso on PA6 + gpioa.pa7.into_alternate_af5(), // mosi on PA7 + ), + MODE, + 8.mhz(), + ccdr.peripheral.SPI1, + &clocks, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + (tx, rx, lora) +} + +#[cfg(feature = "stm32l0xx")] +use stm32l0xx_hal::{ + pac::Peripherals, + pac::USART2, + prelude::*, + rcc, // for ::Config but note name conflict with serial + serial::{Config, Rx, Serial2Ext, Tx}, + spi::Error, +}; + +#[cfg(feature = "stm32l0xx")] +use void; + +#[cfg(feature = "stm32l0xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.freeze(rcc::Config::hsi16()); + let gpioa = p.GPIOA.split(&mut rcc); + let gpiob = p.GPIOB.split(&mut rcc); + + let (tx, rx) = p + .USART2 + .usart( + gpioa.pa2, //tx pa2 for GPS + gpioa.pa3, //rx pa3 for GPS + Config::default().baudrate(9600.bps()), + &mut rcc, + ) + .unwrap() + .split(); + + // following github.com/stm32-rs/stm32l0xx-hal/blob/master/examples/spi.rs + let spi = p.SPI1.spi( + ( + gpioa.pa5, // sck on PA5 + gpioa.pa6, // miso on PA6 + gpioa.pa7, // mosi on PA7 + ), + MODE, + 8.mhz(), + &mut rcc, + ); + + let delay = cp.SYST.delay(rcc.clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + (tx, rx, lora) +} + +#[cfg(feature = "stm32l1xx")] // eg Discovery kit stm32l100 and Heltec lora_node STM32L151CCU6 +use stm32l1xx_hal::{ + prelude::*, + rcc, // for ::Config but note name conflict with serial + serial::{Config, Rx, SerialExt, Tx}, + spi::Error, + stm32::Peripherals, + stm32::USART1, +}; + +#[cfg(feature = "stm32l1xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.freeze(rcc::Config::hsi()); + + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let (tx, rx) = p + .USART1 + .usart( + ( + gpioa.pa9, //tx pa9 for GPS rx + gpioa.pa10, + ), //rx pa10 for GPS tx + Config::default().baudrate(9600.bps()), + &mut rcc, + ) + .unwrap() + .split(); + + let spi = p.SPI1.spi( + ( + gpioa.pa5, // sck on PA5 in board on Heltec + gpioa.pa6, // miso on PA6 in board on Heltec + gpioa.pa7, // mosi on PA7 in board on Heltec + ), + MODE, + 8.mhz(), + &mut rcc, + ); + + let delay = cp.SYST.delay(rcc.clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa4.into_push_pull_output().compat(), //CsPin on PA4 in board on Heltec + gpiob.pb11.into_floating_input().compat(), //BusyPin DIO0 on PB11 in board on Heltec + gpiob.pb10.into_floating_input().compat(), //ReadyPin DIO1 on PB10 in board on Heltec + gpioa.pa3.into_push_pull_output().compat(), //ResetPin on PA3 in board on Heltec + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + (tx, rx, lora) +} + +#[cfg(feature = "stm32l4xx")] +use stm32l4xx_hal::{ + delay::Delay, + pac::Peripherals, + pac::USART2, + prelude::*, + serial::{Config, Rx, Serial, Tx}, + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32l4xx")] +fn setup() -> ( + Tx, + Rx, + impl DelayMs + Transmit>, +) { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut flash = p.FLASH.constrain(); + let mut rcc = p.RCC.constrain(); + let mut pwr = p.PWR.constrain(&mut rcc.apb1r1); + let clocks = rcc + .cfgr + .sysclk(80.mhz()) + .pclk1(80.mhz()) + .pclk2(80.mhz()) + .freeze(&mut flash.acr, &mut pwr); + + let mut gpioa = p.GPIOA.split(&mut rcc.ahb2); + let mut gpiob = p.GPIOB.split(&mut rcc.ahb2); + + let (tx, rx) = Serial::usart2( + p.USART2, + ( + gpioa.pa2.into_af7(&mut gpioa.moder, &mut gpioa.afrl), //tx pa2 for GPS + gpioa.pa3.into_af7(&mut gpioa.moder, &mut gpioa.afrl), + ), //rx pa3 for GPS + Config::default().baudrate(9600.bps()), + clocks, + &mut rcc.apb1r1, + ) + .split(); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 + gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 + gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 + ), + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa + .pa1 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //CsPin on PA1 + gpiob + .pb8 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //BusyPin DIO0 on PB8 + gpiob + .pb9 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //ReadyPin DIO1 on PB9 + gpioa + .pa0 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + (tx, rx, lora) +} + +// End of hal/MCU specific setup. Following should be generic code. + +#[entry] +fn main() -> ! { + let (mut _tx_gps, mut rx_gps, mut lora) = setup(); // GPS, lora (delay is available in lora) + + // byte buffer Nov 2020 limit data.len() < 255 in radio_sx127x .start_transmit + let mut buffer: Vec = Vec::new(); + let mut buf2: Vec = Vec::new(); + + //hprintln!("buffer at {} of {}", buffer.len(), buffer.capacity()).unwrap(); //0 of 80 + //hprintln!("buf2 at {} of {}", buf2.len(), buf2.capacity()).unwrap(); //0 of 80 + buffer.clear(); + buf2.clear(); + + //hprintln!("going into write/read loop ^C to exit ...").unwrap(); + + let e: u8 = 9; // replace char errors with "9" + let mut good = false; // true while capturing a line + + //let mut size: usize; // buffer size should not be needed + //size = buffer.len(); //packet size + //hprintln!("read buffer {} of {}", size, buffer.capacity()).unwrap(); + hprintln!("entering transmit loop").unwrap(); + + loop { + let byte = match block!(rx_gps.read()) { + Ok(byt) => byt, + Err(_error) => e, + }; + + if byte == 36 { + // $ is 36. start of a line + buffer.clear(); + good = true; //start capturing line + }; + + if good { + if buffer.push(byte).is_err() || byte == 13 { + //transmit if end of line. \r is 13, \n is 10 + + //hprintln!("{:?}", &buffer).unwrap(); + + // this transmits the whole GPS message string + + match lora.start_transmit(&buffer) { + Ok(b) => b, // b is () + Err(_err) => { + hprintln!("Error returned from lora.start_transmit().").unwrap(); + panic!("should reset in release mode."); + } + }; + + // this transmits GPS N and E coordinates in hundredths of degrees + + if &buffer[0..6] == [36, 71, 80, 82, 77, 67] { + // if message id is $GPRMC + + for v in buffer[19..31].iter() { + buf2.push(*v).unwrap(); + } // [19..31] is north/south. + for v in b" ".iter() { + buf2.push(*v).unwrap(); + } + for v in buffer[32..45].iter() { + buf2.push(*v).unwrap(); + } // [32..45] is east/west + + //hprintln!("{:?}", &buf2).unwrap(); + hprint!(".").unwrap(); // print "." on transmit of $GPRMC message (but not others) + + match lora.start_transmit(&buf2) { + Ok(b) => b, // b is () + Err(_err) => { + hprintln!("Error returned from lora.start_transmit().").unwrap(); + panic!("should reset in release mode."); + } + }; + }; + + // Note hprintln! requires semihosting. If hprintln! (thus also match section below) are + // removed then this example works on battery power with no computer attached. + // (tested only on blackpill with stm32f411 ) + + // The first transmission often return false and prints "TX not complete", but works after that. + // If this continually returns "TX not complete" then the radio should probably be reset, + // but should avoid panic_reset after first transmission. + + match lora.check_transmit() { + Ok(b) => { + if !b { + hprintln!("TX not complete").unwrap(); + // if multible times then panic!("should reset in release mode."); + } + } + Err(_err) => { + hprintln!("Error returned from lora.check_transmit().").unwrap(); + panic!("should reset in release mode."); + } + }; + + buffer.clear(); + buf2.clear(); + good = false; + match lora.try_delay_ms(5000u32) { + Ok(b) => b, // b is () + Err(_err) => { + hprintln!("Error returned from lora.try_delay_ms().").unwrap(); + panic!("should reset in release mode."); + } + }; + }; + }; + } +} diff --git a/examples/lora_spi_receive.rs b/examples/lora_spi_receive.rs new file mode 100644 index 0000000..81c482c --- /dev/null +++ b/examples/lora_spi_receive.rs @@ -0,0 +1,654 @@ +//! Receive message with LoRa using crate radio_sx127x (on SPI). +//! See example lora_spi_send for more details. +//! See the MCU device setup() sections for details on pin connections. + +// Using sck, miso, mosi, cs, reset and D00, D01. Not yet using D02, D03 +// See setup() sections below for pins. + +//https://www.rfwireless-world.com/Tutorials/LoRa-channels-list.html +// channels are as follows +// 'CH_00_900': 903.08, 'CH_01_900': 905.24, 'CH_02_900': 907.40, +// 'CH_03_900': 909.56, 'CH_04_900': 911.72, 'CH_05_900': 913.88, +// 'CH_06_900': 916.04, 'CH_07_900': 918.20, 'CH_08_900': 920.36, +// 'CH_09_900': 922.52, 'CH_10_900': 924.68, 'CH_11_900': 926.84, 'CH_12_900': 915, +// +// 'CH_10_868': 865.20, 'CH_11_868': 865.50, 'CH_12_868': 865.80, +// 'CH_13_868': 866.10, 'CH_14_868': 866.40, 'CH_15_868': 866.70, +// 'CH_16_868': 867 , 'CH_17_868': 868 , + +// See FREQUENCY below to set the channel. + +#![no_std] +#![no_main] + +#[cfg(debug_assertions)] +extern crate panic_semihosting; + +#[cfg(not(debug_assertions))] +extern crate panic_halt; + +use core::convert::Infallible; + +// use nb::block; +use cortex_m_rt::entry; +use cortex_m_semihosting::*; + +use embedded_hal::blocking::delay::DelayMs; + +use embedded_hal_compat::eh1_0::blocking::delay::DelayMs as _; +use embedded_hal_compat::IntoCompat; + +// MODE needs the old version as it is passed to the device hal crates +//use embedded_hal::{spi::{Mode, Phase, Polarity}, }; +use old_e_h::spi::{Mode, Phase, Polarity}; + +//use asm_delay::{ AsmDelay, bitrate, }; + +//use cortex_m::asm; //for breakpoint + +use radio_sx127x::Error as sx127xError; // Error name conflict with hals +use radio_sx127x::{ + device::lora::{ + Bandwidth, CodingRate, FrequencyHopping, LoRaChannel, LoRaConfig, PayloadCrc, + PayloadLength, SpreadingFactor, + }, + device::{Channel, Modem, PaConfig, PaSelect, PacketInfo}, + prelude::*, // prelude has Sx127x, +}; + +// trait needs to be in scope to find methods start_transmit and check_transmit. +use radio::Receive; + +// lora and radio parameters + +pub const MODE: Mode = Mode { + // SPI mode for radio + phase: Phase::CaptureOnSecondTransition, + polarity: Polarity::IdleHigh, +}; + +const FREQUENCY: u32 = 907_400_000; // frequency in hertz ch_12: 915_000_000, ch_2: 907_400_000 + +const CONFIG_CH: LoRaChannel = LoRaChannel { + freq: FREQUENCY as u32, // frequency in hertz + bw: Bandwidth::Bw125kHz, + sf: SpreadingFactor::Sf7, + cr: CodingRate::Cr4_8, +}; + +const CONFIG_LORA: LoRaConfig = LoRaConfig { + preamble_len: 0x8, + symbol_timeout: 0x64, + payload_len: PayloadLength::Variable, + payload_crc: PayloadCrc::Enabled, + frequency_hop: FrequencyHopping::Disabled, + invert_iq: false, +}; + +const CONFIG_PA: PaConfig = PaConfig { + output: PaSelect::Boost, + power: 10, +}; + +//let CONFIG_RADIO = Config::default() ; + +const CONFIG_RADIO: radio_sx127x::device::Config = radio_sx127x::device::Config { + modem: Modem::LoRa(CONFIG_LORA), + channel: Channel::LoRa(CONFIG_CH), + pa_config: CONFIG_PA, + xtal_freq: 32000000, // CHECK + timeout_ms: 100, +}; + +// setup() does all hal/MCU specific setup and returns generic hal device for use in main code. + +#[cfg(feature = "stm32f0xx")] // eg stm32f030xc +use stm32f0xx_hal::{ + delay::Delay, + pac::Peripherals, + prelude::*, + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32f0xx")] +fn setup( +) -> impl DelayMs + Receive> +{ + let cp = cortex_m::Peripherals::take().unwrap(); + let mut p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.configure().freeze(&mut p.FLASH); + + let gpioa = p.GPIOA.split(&mut rcc); + let gpiob = p.GPIOB.split(&mut rcc); + + let (sck, miso, mosi, _rst, pa1, pb8, pb9, pa0) = cortex_m::interrupt::free(move |cs| { + ( + gpioa.pa5.into_alternate_af0(cs), // sck on PA5 + gpioa.pa6.into_alternate_af0(cs), // miso on PA6 + gpioa.pa7.into_alternate_af0(cs), // mosi on PA7 + //gpioa.pa1.into_push_pull_output(cs), // cs on PA1 + gpiob.pb1.into_push_pull_output(cs), // reset on PB1 + gpioa.pa1.into_push_pull_output(cs), // CsPin on PA1 + gpiob.pb8.into_floating_input(cs), // BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input(cs), // ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output(cs), // ResetPin on PA0 + ) + }); + + let spi = Spi::spi1(p.SPI1, (sck, miso, mosi), MODE, 8.mhz(), &mut rcc); + + let delay = Delay::new(cp.SYST, &rcc); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), + pa1.compat(), + pb8.compat(), + pb9.compat(), + pa0.compat(), + delay.compat(), + &CONFIG_RADIO, + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32f1xx")] // eg blue pill stm32f103 +use stm32f1xx_hal::{ + delay::Delay, + pac::Peripherals, + prelude::*, + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32f1xx")] +fn setup( +) -> impl DelayMs + Receive> +{ + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + let clocks = rcc + .cfgr + .sysclk(64.mhz()) + .pclk1(32.mhz()) + .freeze(&mut p.FLASH.constrain().acr); + + let mut afio = p.AFIO.constrain(&mut rcc.apb2); + let mut gpioa = p.GPIOA.split(&mut rcc.apb2); + let mut gpiob = p.GPIOB.split(&mut rcc.apb2); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_alternate_push_pull(&mut gpioa.crl), // sck on PA5 + gpioa.pa6.into_floating_input(&mut gpioa.crl), // miso on PA6 + gpioa.pa7.into_alternate_push_pull(&mut gpioa.crl), // mosi on PA7 + ), + &mut afio.mapr, + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output(&mut gpioa.crl).compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input(&mut gpiob.crh).compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input(&mut gpiob.crh).compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output(&mut gpioa.crl).compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32f3xx")] // eg Discovery-stm32f303 +use stm32f3xx_hal::{ + delay::Delay, + prelude::*, + spi::{Error, Spi}, + stm32::Peripherals, +}; + +#[cfg(feature = "stm32f3xx")] +fn setup( +) -> impl DelayMs + Receive> +{ + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + let clocks = rcc + .cfgr + .sysclk(64.mhz()) + .pclk1(32.mhz()) + .freeze(&mut p.FLASH.constrain().acr); + + let mut gpioa = p.GPIOA.split(&mut rcc.ahb); + let mut gpiob = p.GPIOB.split(&mut rcc.ahb); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 + gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 + gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 + ), + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa + .pa1 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //CsPin on PA1 + gpiob + .pb8 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //BusyPin DIO0 on PB8 + gpiob + .pb9 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //ReadyPin DIO1 on PB9 + gpioa + .pa0 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +// eg Nucleo-64 stm32f411, blackpill stm32f411, blackpill stm32f401 +#[cfg(feature = "stm32f4xx")] +use stm32f4xx_hal::{ + delay::Delay, + prelude::*, + spi::{Error, Spi}, + stm32::Peripherals, + time::MegaHertz, +}; + +#[cfg(feature = "stm32f4xx")] +fn setup( +) -> impl DelayMs + Receive> +{ + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let rcc = p.RCC.constrain(); + let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); + + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_alternate_af5(), // sck on PA5 + gpioa.pa6.into_alternate_af5(), // miso on PA6 + gpioa.pa7.into_alternate_af5(), // mosi on PA7 + ), + MODE, + MegaHertz(8).into(), + clocks, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DI00 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DI01 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + //DIO0 triggers RxDone/TxDone status. + //DIO1 triggers RxTimeout and other errors status. + //D02, D03 ? + + //lora.lora_configure( config_lora, &config_ch ).unwrap(); # not yet pub, to change something + + lora +} + +#[cfg(feature = "stm32f7xx")] +use stm32f7xx_hal::{ + delay::Delay, + device::Peripherals, // note non-standard device vs pac + prelude::*, + spi::{ClockDivider, Error, Spi}, +}; + +#[cfg(feature = "stm32f7xx")] +fn setup( +) -> impl DelayMs + Receive> +{ + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let sck = gpioa.pa5.into_alternate_af5(); // sck on PA5 + let miso = gpioa.pa6.into_alternate_af5(); // miso on PA6 + let mosi = gpioa.pa7.into_alternate_af5(); // mosi on PA7 + + // somewhere 8.mhz needs to be set in spi + + let spi = Spi::new(p.SPI1, (sck, miso, mosi)).enable::(&mut rcc, ClockDivider::DIV32, MODE); + + let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32h7xx")] +use stm32h7xx_hal::{delay::Delay, pac::Peripherals, prelude::*, spi::Error}; + +#[cfg(feature = "stm32h7xx")] +fn setup() -> impl DelayMs + + Receive> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let pwr = p.PWR.constrain(); + let vos = pwr.freeze(); + let rcc = p.RCC.constrain(); + let ccdr = rcc.sys_ck(160.mhz()).freeze(vos, &p.SYSCFG); + let clocks = ccdr.clocks; + + let gpioa = p.GPIOA.split(ccdr.peripheral.GPIOA); + let gpiob = p.GPIOB.split(ccdr.peripheral.GPIOB); + + // following github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/spi.rs + let spi = p.SPI1.spi( + ( + gpioa.pa5.into_alternate_af5(), // sck on PA5 + gpioa.pa6.into_alternate_af5(), // miso on PA6 + gpioa.pa7.into_alternate_af5(), // mosi on PA7 + ), + MODE, + 8.mhz(), + ccdr.peripheral.SPI1, + &clocks, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32l0xx")] +use stm32l0xx_hal::{ + pac::Peripherals, + prelude::*, + rcc, // for ::Config but note name conflict with serial + spi::Error, +}; + +#[cfg(feature = "stm32l0xx")] +use void; + +#[cfg(feature = "stm32l0xx")] +fn setup( +) -> impl DelayMs + Receive> +{ + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.freeze(rcc::Config::hsi16()); + let gpioa = p.GPIOA.split(&mut rcc); + let gpiob = p.GPIOB.split(&mut rcc); + + // following github.com/stm32-rs/stm32l0xx-hal/blob/master/examples/spi.rs + let spi = p.SPI1.spi( + ( + gpioa.pa5, // sck on PA5 + gpioa.pa6, // miso on PA6 + gpioa.pa7, // mosi on PA7 + ), + MODE, + 8.mhz(), + &mut rcc, + ); + + let delay = cp.SYST.delay(rcc.clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32l1xx")] // eg Discovery kit stm32l100 and Heltec lora_node STM32L151CCU6 +use stm32l1xx_hal::{ + prelude::*, + rcc, // for ::Config but note name conflict with serial + spi::Error, + stm32::Peripherals, +}; + +#[cfg(feature = "stm32l1xx")] +fn setup( +) -> impl DelayMs + Receive> +{ + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.freeze(rcc::Config::hsi()); + + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let spi = p.SPI1.spi( + ( + gpioa.pa5, // sck on PA5 in board on Heltec + gpioa.pa6, // miso on PA6 in board on Heltec + gpioa.pa7, // mosi on PA7 in board on Heltec + ), + MODE, + 8.mhz(), + &mut rcc, + ); + + let delay = cp.SYST.delay(rcc.clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa4.into_push_pull_output().compat(), //CsPin on PA4 in board on Heltec + gpiob.pb11.into_floating_input().compat(), //BusyPin DIO0 on PB11 in board on Heltec + gpiob.pb10.into_floating_input().compat(), //ReadyPin DIO1 on PB10 in board on Heltec + gpioa.pa3.into_push_pull_output().compat(), //ResetPin on PA3 in board on Heltec + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32l4xx")] +use stm32l4xx_hal::{ + delay::Delay, + pac::Peripherals, + prelude::*, + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32l4xx")] +fn setup( +) -> impl DelayMs + Receive> +{ + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut flash = p.FLASH.constrain(); + let mut rcc = p.RCC.constrain(); + let mut pwr = p.PWR.constrain(&mut rcc.apb1r1); + let clocks = rcc + .cfgr + .sysclk(80.mhz()) + .pclk1(80.mhz()) + .pclk2(80.mhz()) + .freeze(&mut flash.acr, &mut pwr); + + let mut gpioa = p.GPIOA.split(&mut rcc.ahb2); + let mut gpiob = p.GPIOB.split(&mut rcc.ahb2); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 + gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 + gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 + ), + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa + .pa1 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //CsPin on PA1 + gpiob + .pb8 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //BusyPin DIO0 on PB8 + gpiob + .pb9 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //ReadyPin DIO1 on PB9 + gpioa + .pa0 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +// End of hal/MCU specific setup. Following should be generic code. + +fn to_str(x: &[u8]) -> &str { + match core::str::from_utf8(x) { + Ok(str) => &str, + Err(_error) => "problem converting u8 to str ", + } +} + +#[entry] +fn main() -> ! { + let mut lora = setup(); //delay is available in lora.delay_ms() + + lora.start_receive().unwrap(); // should handle error + + let mut buff = [0u8; 1024]; + let mut n: usize; + let mut info = PacketInfo::default(); + + loop { + let poll = lora.check_receive(false); + // false (the restart option) specifies whether transient timeout or CRC errors should be + // internally handled (returning Ok(false) or passed back to the caller as errors. + + match poll { + Ok(v) if v => { + n = lora.get_received(&mut info, &mut buff).unwrap(); + //hprintln!("RX complete ({:?}, length: {})", info, n).unwrap(); + //hprintln!("{:?}", &buff[..n]).unwrap(); + // for some reason the next prints twice? + hprintln!("{}", to_str(&buff[..n])).unwrap() + } + + Ok(_v) => (), // hprint!(".").unwrap(), // print "." if nothing received + + Err(err) => hprintln!("poll error {:?} ", err).unwrap(), + }; + + match lora.try_delay_ms(100u32) { + Ok(b) => b, // b is () + Err(_err) => { + hprintln!("Error returned from lora.try_delay_ms().").unwrap(); + panic!("should reset in release mode."); + } + }; + } +} diff --git a/examples/lora_spi_send.rs b/examples/lora_spi_send.rs new file mode 100644 index 0000000..ec0cdd5 --- /dev/null +++ b/examples/lora_spi_send.rs @@ -0,0 +1,709 @@ +//! Transmit a simple message with LoRa using crate radio_sx127x (on SPI). +//! See the MCU device setup() sections for details on pin connections. +//! +//! The largest part of this file is the setup() functions used for each hal. +//! These make the application code common. +//! +//! In the following +//! - replace xxx with the example name lora_spi_send, lora_spi_receive, or lora_spi_gps. +//! - set TARGET, HAL, and MCU from a line in the table below (linux syntax). +//! - no-default-features is because some default-features require std. +//! +//! The examples can be compiled with: +//! cargo build --no-default-features --target $TARGET --features=$HAL,$MCU --example xxx +//! +//! Before running, check FREQUENCY below to be sure you have a channel setting appropriate for +//! your country, hardware and any testing sender/receiver on the other end of the communication. +//! +//! To link, loaded and run using gdb and openocd (with INTERFACE and PROC set as below): +//! openocd -f interface/$INTERFACE.cfg -f target/$PROC.cfg +//! and in another window (with TARGET, HAL, and MCU set as below): +//! cargo run --no-default-features --target $TARGET --features $HAL,$MCU --example xxx [ --release ] +//! +//! If --release is omitted then some MCUs do not have sufficient memory and loading results in +//! '.rodata will not fit in region FLASH ' +//! Even with sufficient memory the code without --release is slower and may result in errors. +//! +//! +//! cargo run environment variables openocd test board and processor +//! _____________________________________________________________ _____________ ___________________________ +//! export HAL=stm32f0xx MCU=stm32f042 TARGET=thumbv6m-none-eabi PROC=stm32f0x # none-stm32f042 Cortex-M0 +//! export HAL=stm32f0xx MCU=stm32f030xc TARGET=thumbv6m-none-eabi PROC=stm32f0x # none-stm32f030 Cortex-M0 +//! export HAL=stm32f1xx MCU=stm32f103 TARGET=thumbv7m-none-eabi PROC=stm32f1x # bluepill Cortex-M3 +//! export HAL=stm32f1xx MCU=stm32f100 TARGET=thumbv7m-none-eabi PROC=stm32f1x # none-stm32f100 Cortex-M3 +//! export HAL=stm32f1xx MCU=stm32f101 TARGET=thumbv7m-none-eabi PROC=stm32f1x # none-stm32f101 Cortex-M3 +//! export HAL=stm32f3xx MCU=stm32f303xc TARGET=thumbv7em-none-eabihf PROC=stm32f3x # discovery-stm32f303 Cortex-M3 +//! export HAL=stm32f4xx MCU=stm32f401 TARGET=thumbv7em-none-eabihf PROC=stm32f4x # blackpill-stm32f401 Cortex-M4 +//! export HAL=stm32f4xx MCU=stm32f411 TARGET=thumbv7em-none-eabihf PROC=stm32f4x # blackpill-stm32f411 Cortex-M4 +//! export HAL=stm32f4xx MCU=stm32f411 TARGET=thumbv7em-none-eabihf PROC=stm32f4x # nucleo-64 Cortex-M4 +//! export HAL=stm32f7xx MCU=stm32f722 TARGET=thumbv7em-none-eabihf PROC=stm32f7x # none-stm32f722 Cortex-M7 +//! export HAL=stm32h7xx MCU=stm32h742 TARGET=thumbv7em-none-eabihf PROC= # none-stm32h742 Cortex-M7 +//! export HAL=stm32l0xx MCU=stm32l0x2 TARGET=thumbv6m-none-eabi PROC=stm32l0 # none-stm32l0x2 Cortex-M0 +//! export HAL=stm32l1xx MCU=stm32l100 TARGET=thumbv7m-none-eabi PROC=stm32l1 # discovery-stm32l100 Cortex-M3 +//! export HAL=stm32l1xx MCU=stm32l151 TARGET=thumbv7m-none-eabi PROC=stm32l1 # heltec-lora-node151 Cortex-M3 +//! export HAL=stm32l4xx MCU=stm32l4x2 TARGET=thumbv7em-none-eabi PROC=stm32l4x # none-stm32l4x1 Cortex-M4 +//! +//! Depending on the MCU connection to the computer, in the openocd command use +//! export INTERFACE=stlink-v2 +//! export INTERFACE=stlink-v2-1 + +//! A version of this example is reported at https://pdgilbert.github.io/eg_stm_hal/. +//! The results reported there use current git versions of the MCU device hals, +//! whereas the example here uses release versions of the MCU device hals. + +//https://www.rfwireless-world.com/Tutorials/LoRa-channels-list.html +// channels are as follows +// 'CH_00_900': 903.08, 'CH_01_900': 905.24, 'CH_02_900': 907.40, +// 'CH_03_900': 909.56, 'CH_04_900': 911.72, 'CH_05_900': 913.88, +// 'CH_06_900': 916.04, 'CH_07_900': 918.20, 'CH_08_900': 920.36, +// 'CH_09_900': 922.52, 'CH_10_900': 924.68, 'CH_11_900': 926.84, 'CH_12_900': 915, +// +// 'CH_10_868': 865.20, 'CH_11_868': 865.50, 'CH_12_868': 865.80, +// 'CH_13_868': 866.10, 'CH_14_868': 866.40, 'CH_15_868': 866.70, +// 'CH_16_868': 867 , 'CH_17_868': 868 , + +// See FREQUENCY below to set the channel. + + + +#![no_std] +#![no_main] + +#[cfg(debug_assertions)] +extern crate panic_semihosting; + +#[cfg(not(debug_assertions))] +extern crate panic_halt; + +use core::convert::Infallible; + +// use nb::block; +use cortex_m_rt::entry; +use cortex_m_semihosting::*; + +use embedded_hal::blocking::delay::DelayMs; + +// The embedded_hal_compat crate is to smooth the transition for hal crates that are +// not yet based on embedded_hal 1.0.0-alpha while rust-radio-sx127x is. +// When passing the older hal crate objects to the newer rust-radio-sx127x methods +// the objects are appended with .compat(). + +use embedded_hal_compat::eh1_0::blocking::delay::DelayMs as _; +use embedded_hal_compat::IntoCompat; + +// MODE needs the old version as it is passed to the device hal crates +//use embedded_hal::{spi::{Mode, Phase, Polarity}, }; +use old_e_h::spi::{Mode, Phase, Polarity}; + +//use asm_delay::{ AsmDelay, bitrate, }; + +//use cortex_m::asm; //for breakpoint + +use radio_sx127x::Error as sx127xError; // Error name conflict with hals +use radio_sx127x::{ + device::lora::{ + Bandwidth, CodingRate, FrequencyHopping, LoRaChannel, LoRaConfig, PayloadCrc, + PayloadLength, SpreadingFactor, + }, + device::{Channel, Modem, PaConfig, PaSelect}, + prelude::*, // prelude has Sx127x, +}; + +//use radio::{Receive, Transmit}; +use radio::Transmit; // trait needs to be in scope to find methods start_transmit and check_transmit. + +// lora and radio parameters + +pub const MODE: Mode = Mode { + // SPI mode for radio + phase: Phase::CaptureOnSecondTransition, + polarity: Polarity::IdleHigh, +}; + +const FREQUENCY: u32 = 907_400_000; // frequency in hertz ch_12: 915_000_000, ch_2: 907_400_000 + +const CONFIG_CH: LoRaChannel = LoRaChannel { + freq: FREQUENCY as u32, // frequency in hertz + bw: Bandwidth::Bw125kHz, + sf: SpreadingFactor::Sf7, + cr: CodingRate::Cr4_8, +}; + +const CONFIG_LORA: LoRaConfig = LoRaConfig { + preamble_len: 0x8, + symbol_timeout: 0x64, + payload_len: PayloadLength::Variable, + payload_crc: PayloadCrc::Enabled, + frequency_hop: FrequencyHopping::Disabled, + invert_iq: false, +}; + +const CONFIG_PA: PaConfig = PaConfig { + output: PaSelect::Boost, + power: 10, +}; + +//let CONFIG_RADIO = Config::default() ; + +const CONFIG_RADIO: radio_sx127x::device::Config = radio_sx127x::device::Config { + modem: Modem::LoRa(CONFIG_LORA), + channel: Channel::LoRa(CONFIG_CH), + pa_config: CONFIG_PA, + xtal_freq: 32000000, // CHECK + timeout_ms: 100, +}; + +// setup() does all hal/MCU specific setup and returns generic object for use in main code. + +#[cfg(feature = "stm32f0xx")] // eg stm32f030xc +use stm32f0xx_hal::{ + delay::Delay, + pac::Peripherals, + prelude::*, + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32f0xx")] +fn setup() -> impl DelayMs + Transmit> { + // Infallible, Infallible reflect the error type on the spi and gpio traits. + + let cp = cortex_m::Peripherals::take().unwrap(); + let mut p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.configure().freeze(&mut p.FLASH); + + let gpioa = p.GPIOA.split(&mut rcc); + let gpiob = p.GPIOB.split(&mut rcc); + + let (sck, miso, mosi, _rst, pa1, pb8, pb9, pa0) = cortex_m::interrupt::free(move |cs| { + ( + gpioa.pa5.into_alternate_af0(cs), // sck on PA5 + gpioa.pa6.into_alternate_af0(cs), // miso on PA6 + gpioa.pa7.into_alternate_af0(cs), // mosi on PA7 + //gpioa.pa1.into_push_pull_output(cs), // cs on PA1 + gpiob.pb1.into_push_pull_output(cs), // reset on PB1 + gpioa.pa1.into_push_pull_output(cs), // CsPin on PA1 + gpiob.pb8.into_floating_input(cs), // BusyPin on PB8 DIO0 + gpiob.pb9.into_floating_input(cs), // ReadyPin on PB9 DIO1 + gpioa.pa0.into_push_pull_output(cs), // ResetPin on PA0 + ) + }); + + let spi = Spi::spi1(p.SPI1, (sck, miso, mosi), MODE, 8.mhz(), &mut rcc); + + let delay = Delay::new(cp.SYST, &rcc); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), + pa1.compat(), + pb8.compat(), + pb9.compat(), + pa0.compat(), + delay.compat(), + &CONFIG_RADIO, + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32f1xx")] // eg blue pill stm32f103 +use stm32f1xx_hal::{ + delay::Delay, + pac::Peripherals, + prelude::*, + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32f1xx")] +fn setup() -> impl DelayMs + Transmit> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + let clocks = rcc + .cfgr + .sysclk(64.mhz()) + .pclk1(32.mhz()) + .freeze(&mut p.FLASH.constrain().acr); + + let mut afio = p.AFIO.constrain(&mut rcc.apb2); + let mut gpioa = p.GPIOA.split(&mut rcc.apb2); + let mut gpiob = p.GPIOB.split(&mut rcc.apb2); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_alternate_push_pull(&mut gpioa.crl), // sck on PA5 + gpioa.pa6.into_floating_input(&mut gpioa.crl), // miso on PA6 + gpioa.pa7.into_alternate_push_pull(&mut gpioa.crl), // mosi on PA7 + ), + &mut afio.mapr, + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output(&mut gpioa.crl).compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input(&mut gpiob.crh).compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input(&mut gpiob.crh).compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output(&mut gpioa.crl).compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32f3xx")] // eg Discovery-stm32f303 +use stm32f3xx_hal::{ + delay::Delay, + prelude::*, + spi::{Error, Spi}, + stm32::Peripherals, +}; + +#[cfg(feature = "stm32f3xx")] +fn setup() -> impl DelayMs + Transmit> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + let clocks = rcc + .cfgr + .sysclk(64.mhz()) + .pclk1(32.mhz()) + .freeze(&mut p.FLASH.constrain().acr); + + let mut gpioa = p.GPIOA.split(&mut rcc.ahb); + let mut gpiob = p.GPIOB.split(&mut rcc.ahb); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 + gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 + gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 + ), + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa + .pa1 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //CsPin on PA1 + gpiob + .pb8 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //BusyPin DIO0 on PB8 + gpiob + .pb9 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //ReadyPin DIO1 on PB9 + gpioa + .pa0 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32f4xx")] +// eg Nucleo-64 stm32f411, blackpill stm32f411, blackpill stm32f401 +use stm32f4xx_hal::{ + delay::Delay, + prelude::*, + spi::{Error, Spi}, + stm32::Peripherals, + time::MegaHertz, +}; + +#[cfg(feature = "stm32f4xx")] +fn setup() -> impl DelayMs + Transmit> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let rcc = p.RCC.constrain(); + let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); + + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_alternate_af5(), // sck on PA5 + gpioa.pa6.into_alternate_af5(), // miso on PA6 + gpioa.pa7.into_alternate_af5(), // mosi on PA7 + ), + MODE, + MegaHertz(8).into(), + clocks, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + // open_drain_output is really input and output. BusyPin is just input, but I think this should work + // gpiob.pb8.into_alternate_open_drain(&mut gpiob.crh), + // however, gives trait bound ... InputPin` is not satisfied + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DI00 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DI01 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + //DIO0 triggers RxDone/TxDone status. + //DIO1 triggers RxTimeout and other errors status. + //D02, D03 ? + + //lora.lora_configure( config_lora, &config_ch ).unwrap(); # not yet pub, to change something + + lora +} + +#[cfg(feature = "stm32f7xx")] +use stm32f7xx_hal::{ + delay::Delay, + device::Peripherals, // note non-standard device vs pac + prelude::*, + spi::{ClockDivider, Error, Spi}, +}; + +#[cfg(feature = "stm32f7xx")] +fn setup() -> impl DelayMs + Transmit> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + + let mut rcc = p.RCC.constrain(); + + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let sck = gpioa.pa5.into_alternate_af5(); // sck on PA5 + let miso = gpioa.pa6.into_alternate_af5(); // miso on PA6 + let mosi = gpioa.pa7.into_alternate_af5(); // mosi on PA7 + + // somewhere 8.mhz needs to be set in spi + + let spi = Spi::new(p.SPI1, (sck, miso, mosi)).enable::(&mut rcc, ClockDivider::DIV32, MODE); + + let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32h7xx")] +use stm32h7xx_hal::{delay::Delay, pac::Peripherals, prelude::*, spi::Error, Never}; + +#[cfg(feature = "stm32h7xx")] +fn setup() -> impl DelayMs + Transmit> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let pwr = p.PWR.constrain(); + let vos = pwr.freeze(); + let rcc = p.RCC.constrain(); + let ccdr = rcc.sys_ck(160.mhz()).freeze(vos, &p.SYSCFG); + let clocks = ccdr.clocks; + + let gpioa = p.GPIOA.split(ccdr.peripheral.GPIOA); + let gpiob = p.GPIOB.split(ccdr.peripheral.GPIOB); + + // following github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/spi.rs + let spi = p.SPI1.spi( + ( + gpioa.pa5.into_alternate_af5(), // sck on PA5 + gpioa.pa6.into_alternate_af5(), // miso on PA6 + gpioa.pa7.into_alternate_af5(), // mosi on PA7 + ), + MODE, + 8.mhz(), + ccdr.peripheral.SPI1, + &clocks, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32l0xx")] +use stm32l0xx_hal::{ + pac::Peripherals, + prelude::*, + rcc, // for ::Config but note name conflict with serial + spi::Error, +}; + +#[cfg(feature = "stm32l0xx")] +use void; + +#[cfg(feature = "stm32l0xx")] +fn setup() -> impl DelayMs + Transmit> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.freeze(rcc::Config::hsi16()); + let gpioa = p.GPIOA.split(&mut rcc); + let gpiob = p.GPIOB.split(&mut rcc); + + // following github.com/stm32-rs/stm32l0xx-hal/blob/master/examples/spi.rs + let spi = p.SPI1.spi( + ( + gpioa.pa5, // sck on PA5 + gpioa.pa6, // miso on PA6 + gpioa.pa7, // mosi on PA7 + ), + MODE, + 8.mhz(), + &mut rcc, + ); + + let delay = cp.SYST.delay(rcc.clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 + gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 + gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 + gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32l1xx")] // eg Discovery kit stm32l100 and Heltec lora_node STM32L151CCU6 +use stm32l1xx_hal::{ + prelude::*, + rcc, // for ::Config but note name conflict with serial + spi::Error, + stm32::Peripherals, +}; + +#[cfg(feature = "stm32l1xx")] +fn setup() -> impl DelayMs + Transmit> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut rcc = p.RCC.freeze(rcc::Config::hsi()); + + let gpioa = p.GPIOA.split(); + let gpiob = p.GPIOB.split(); + + let spi = p.SPI1.spi( + ( + gpioa.pa5, // sck on PA5 in board on Heltec + gpioa.pa6, // miso on PA6 in board on Heltec + gpioa.pa7, // mosi on PA7 in board on Heltec + ), + MODE, + 8.mhz(), + &mut rcc, + ); + + let delay = cp.SYST.delay(rcc.clocks); + + // Create lora radio instance + + // Heltec lora_node STM32L151CCU6 + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa.pa4.into_push_pull_output().compat(), //CsPin on PA4 in board on Heltec + gpiob.pb11.into_floating_input().compat(), //BusyPin DIO0 on PB11 in board on Heltec + gpiob.pb10.into_floating_input().compat(), //ReadyPin DIO1 on PB10 in board on Heltec + gpioa.pa3.into_push_pull_output().compat(), //ResetPin on PA3 in board on Heltec + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +#[cfg(feature = "stm32l4xx")] +use stm32l4xx_hal::{ + delay::Delay, + pac::Peripherals, + prelude::*, + spi::{Error, Spi}, +}; + +#[cfg(feature = "stm32l4xx")] +fn setup() -> impl DelayMs + Transmit> { + let cp = cortex_m::Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); + let mut flash = p.FLASH.constrain(); + let mut rcc = p.RCC.constrain(); + let mut pwr = p.PWR.constrain(&mut rcc.apb1r1); + let clocks = rcc + .cfgr + .sysclk(80.mhz()) + .pclk1(80.mhz()) + .pclk2(80.mhz()) + .freeze(&mut flash.acr, &mut pwr); + + let mut gpioa = p.GPIOA.split(&mut rcc.ahb2); + let mut gpiob = p.GPIOB.split(&mut rcc.ahb2); + + let spi = Spi::spi1( + p.SPI1, + ( + gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 + gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 + gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 + ), + MODE, + 8.mhz(), + clocks, + &mut rcc.apb2, + ); + + let delay = Delay::new(cp.SYST, clocks); + + // Create lora radio instance + + let lora = Sx127x::spi( + spi.compat(), //Spi + gpioa + .pa1 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //CsPin on PA1 + gpiob + .pb8 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //BusyPin DIO0 on PB8 + gpiob + .pb9 + .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) + .compat(), //ReadyPin DIO1 on PB9 + gpioa + .pa0 + .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) + .compat(), //ResetPin on PA0 + delay.compat(), //Delay + &CONFIG_RADIO, //&Config + ) + .unwrap(); // should handle error + + lora +} + +// End of hal/MCU specific setup. Following should be generic code. + +#[entry] +fn main() -> ! { + let mut lora = setup(); //delay is available in lora + + // print out configuration (for debugging) + + // let v = lora.lora_get_config(); + // hprintln!("configuration {}", v).unwrap(); + + // hprintln!("chammel {}", lora.get_chammel()).unwrap(); + + //hprintln!("mode {}", lora.get_mode()).unwrap(); + //hprintln!("mode {}", lora.read_register(Register::RegOpMode.addr())).unwrap(); + //hprintln!("bandwidth {:?}", lora.get_signal_bandwidth()).unwrap(); + //hprintln!("coding_rate {:?}", lora.get_coding_rate_4()).unwrap(); + //hprintln!("spreading_factor {:?}", lora.get_spreading_factor()).unwrap(); + //hprintln!("spreading_factor {:?}", + //hprintln!("invert_iq {:?}", lora.get_invert_iq()).unwrap(); + //hprintln!("tx_power {:?}", lora.get_tx_power()).unwrap(); + + // transmit something + + //let buffer = &[0xaa, 0xbb, 0xcc]; + + let message = b"Hello, LoRa!"; + + //let mut buffer = [0;100]; //Nov 2020 limit data.len() < 255 in radio_sx127x .start_transmit + //for (i,c) in message.chars().enumerate() { + // buffer[i] = c as u8; + // } + + loop { + lora.start_transmit(message).unwrap(); // should handle error + + match lora.check_transmit() { + Ok(b) => { + if b { + hprintln!("TX complete").unwrap() + } else { + hprintln!("TX not complete").unwrap() + } + } + + Err(_err) => { + hprintln!("Error in lora.check_transmit(). Should return True or False.").unwrap() + } + }; + + match lora.try_delay_ms(5000u32) { + Ok(b) => b, // b is () + Err(_err) => { + hprintln!("Error returned from lora.try_delay_ms().").unwrap(); + panic!("should reset in release mode."); + } + }; + } +} diff --git a/examples/memoryMaps/GD32VF103C8/memory.x b/examples/memoryMaps/GD32VF103C8/memory.x new file mode 100644 index 0000000..d90d86e --- /dev/null +++ b/examples/memoryMaps/GD32VF103C8/memory.x @@ -0,0 +1,13 @@ +/* GD32VF103C8 */ +MEMORY +{ + FLASH : ORIGIN = 0x08000000, LENGTH = 64k + RAM : ORIGIN = 0x20000000, LENGTH = 20k +} + +REGION_ALIAS("REGION_TEXT", FLASH); +REGION_ALIAS("REGION_RODATA", FLASH); +REGION_ALIAS("REGION_DATA", RAM); +REGION_ALIAS("REGION_BSS", RAM); +REGION_ALIAS("REGION_HEAP", RAM); +REGION_ALIAS("REGION_STACK", RAM); diff --git a/examples/memoryMaps/GD32VF103CB/memory.xA b/examples/memoryMaps/GD32VF103CB/memory.xA new file mode 100644 index 0000000..74b09ab --- /dev/null +++ b/examples/memoryMaps/GD32VF103CB/memory.xA @@ -0,0 +1,13 @@ +/* GD32VF103CB */ +MEMORY +{ + FLASH : ORIGIN = 0x08000000, LENGTH = 128k + RAM : ORIGIN = 0x20000000, LENGTH = 32k +} + +REGION_ALIAS("REGION_TEXT", FLASH); +REGION_ALIAS("REGION_RODATA", FLASH); +REGION_ALIAS("REGION_DATA", RAM); +REGION_ALIAS("REGION_BSS", RAM); +REGION_ALIAS("REGION_HEAP", RAM); +REGION_ALIAS("REGION_STACK", RAM); diff --git a/examples/memoryMaps/GD32VF103_EXTRA/memory.x b/examples/memoryMaps/GD32VF103_EXTRA/memory.x new file mode 100644 index 0000000..ee91ca8 --- /dev/null +++ b/examples/memoryMaps/GD32VF103_EXTRA/memory.x @@ -0,0 +1,27 @@ +MEMORY +{ + /* 87*4=348 (0x15C) */ + VECTORS (RX): ORIGIN = 0x08000000, LENGTH = 0x015C + MAIN_FLASH (RX): ORIGIN = 0x0800015C, LENGTH = 64K - 348 + SRAM (RW): ORIGIN = 0x20000000, LENGTH = 20K +} + +REGION_ALIAS("REGION_TEXT", MAIN_FLASH); +REGION_ALIAS("REGION_RODATA", MAIN_FLASH); +REGION_ALIAS("REGION_DATA", SRAM); +REGION_ALIAS("REGION_BSS", SRAM); +REGION_ALIAS("REGION_HEAP", SRAM); +REGION_ALIAS("REGION_STACK", SRAM); + +ENTRY(_gd32vf103_vectors) +EXTERN(_gd32vf103_vectors) +EXTERN(_gd32vf103_trap_entry) +EXTERN(_gd32vf103_irq_entry) + +SECTIONS +{ + .vectors : + { + KEEP(*(.vectors)); + } > VECTORS +} diff --git a/examples/memoryMaps/LM3S6965/memory.x b/examples/memoryMaps/LM3S6965/memory.x new file mode 100644 index 0000000..b271f22 --- /dev/null +++ b/examples/memoryMaps/LM3S6965/memory.x @@ -0,0 +1,34 @@ +MEMORY +{ + /* NOTE 1 K = 1 KiBi = 1024 bytes */ + /* TODO Adjust these memory regions to match your device memory layout */ + /* These values correspond to the LM3S6965, one of the few devices QEMU can emulate */ + FLASH : ORIGIN = 0x00000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 64K +} + +/* This is where the call stack will be allocated. */ +/* The stack is of the full descending type. */ +/* You may want to use this variable to locate the call stack and static + variables in different memory regions. Below is shown the default value */ +/* _stack_start = ORIGIN(RAM) + LENGTH(RAM); */ + +/* You can use this symbol to customize the location of the .text section */ +/* If omitted the .text section will be placed right after the .vector_table + section */ +/* This is required only on microcontrollers that store some configuration right + after the vector table */ +/* _stext = ORIGIN(FLASH) + 0x400; */ + +/* Example of putting non-initialized variables into custom RAM locations. */ +/* This assumes you have defined a region RAM2 above, and in the Rust + sources added the attribute `#[link_section = ".ram2bss"]` to the data + you want to place there. */ +/* Note that the section will not be zero-initialized by the runtime! */ +/* SECTIONS { + .ram2bss (NOLOAD) : ALIGN(4) { + *(.ram2bss); + . = ALIGN(4); + } > RAM2 + } INSERT AFTER .bss; +*/ diff --git a/examples/memoryMaps/STM32F030XC/memory.x b/examples/memoryMaps/STM32F030XC/memory.x new file mode 100644 index 0000000..4b487c1 --- /dev/null +++ b/examples/memoryMaps/STM32F030XC/memory.x @@ -0,0 +1,8 @@ +MEMORY +{ + /* Define memory regions for STM32F030 */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 16K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 4K +} +/* see https://github.com/stm32-rs/stm32f0xx-hal/memory.x */ +_stack_start = ORIGIN(RAM) + LENGTH(RAM); diff --git a/examples/memoryMaps/STM32F042/memory.x b/examples/memoryMaps/STM32F042/memory.x new file mode 100644 index 0000000..51b2492 --- /dev/null +++ b/examples/memoryMaps/STM32F042/memory.x @@ -0,0 +1,11 @@ +MEMORY +{ + /* NOTE K = KiBi = 1024 bytes */ + FLASH : ORIGIN = 0x08000000, LENGTH = 32K + RAM : ORIGIN = 0x20000000, LENGTH = 6K +} + +/* This is where the call stack will be allocated. */ +/* The stack is of the full descending type. */ +/* NOTE Do NOT modify `_stack_start` unless you know what you are doing */ +_stack_start = ORIGIN(RAM) + LENGTH(RAM); diff --git a/examples/memoryMaps/STM32F100/memory.x b/examples/memoryMaps/STM32F100/memory.x new file mode 100644 index 0000000..4556f77 --- /dev/null +++ b/examples/memoryMaps/STM32F100/memory.x @@ -0,0 +1,6 @@ +MEMORY +{ + /* Define memory regions for STM32F103C8T6 */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} diff --git a/examples/memoryMaps/STM32F101/memory.x b/examples/memoryMaps/STM32F101/memory.x new file mode 100644 index 0000000..4556f77 --- /dev/null +++ b/examples/memoryMaps/STM32F101/memory.x @@ -0,0 +1,6 @@ +MEMORY +{ + /* Define memory regions for STM32F103C8T6 */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} diff --git a/examples/memoryMaps/STM32F103/memory.x b/examples/memoryMaps/STM32F103/memory.x new file mode 100644 index 0000000..4556f77 --- /dev/null +++ b/examples/memoryMaps/STM32F103/memory.x @@ -0,0 +1,6 @@ +MEMORY +{ + /* Define memory regions for STM32F103C8T6 */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} diff --git a/examples/memoryMaps/STM32F303XC/memory.x b/examples/memoryMaps/STM32F303XC/memory.x new file mode 100644 index 0000000..7eb5be8 --- /dev/null +++ b/examples/memoryMaps/STM32F303XC/memory.x @@ -0,0 +1,6 @@ +MEMORY +{ + /* Define memory regions for STM32F303VCT6 */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 40K +} diff --git a/examples/memoryMaps/STM32F401/memory.x b/examples/memoryMaps/STM32F401/memory.x new file mode 100644 index 0000000..41cfd26 --- /dev/null +++ b/examples/memoryMaps/STM32F401/memory.x @@ -0,0 +1,6 @@ +MEMORY +{ + /* Define memory regions. STM32F401CC */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} diff --git a/examples/memoryMaps/STM32F411/memory.x b/examples/memoryMaps/STM32F411/memory.x new file mode 100644 index 0000000..3c1e02b --- /dev/null +++ b/examples/memoryMaps/STM32F411/memory.x @@ -0,0 +1,6 @@ +MEMORY +{ + /* Define memory regions. STM32F411RE */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K +} diff --git a/examples/memoryMaps/STM32F722/memory.x b/examples/memoryMaps/STM32F722/memory.x new file mode 100644 index 0000000..912c8ec --- /dev/null +++ b/examples/memoryMaps/STM32F722/memory.x @@ -0,0 +1,9 @@ +/* STM32F722 */ +MEMORY +{ + FLASH : ORIGIN = 0x08000000, LENGTH = 512K + RAM : ORIGIN = 0x20000000, LENGTH = 176K + 16K +} + +/* Do NOT modify */ +_stack_start = ORIGIN(RAM) + LENGTH(RAM); diff --git a/examples/memoryMaps/STM32H742/memory.x b/examples/memoryMaps/STM32H742/memory.x new file mode 100644 index 0000000..0d6ff2f --- /dev/null +++ b/examples/memoryMaps/STM32H742/memory.x @@ -0,0 +1,10 @@ +MEMORY +{ + /* see https://github.com/stm32-rs/stm32h7xx-hal/blob/master/memory.x + for much better information + */ + + FLASH : ORIGIN = 0x08000000, LENGTH = 2M + RAM : ORIGIN = 0x20000000, LENGTH = 128K + +} diff --git a/examples/memoryMaps/STM32L0X2/memory.x b/examples/memoryMaps/STM32L0X2/memory.x new file mode 100644 index 0000000..2e04e72 --- /dev/null +++ b/examples/memoryMaps/STM32L0X2/memory.x @@ -0,0 +1,5 @@ +MEMORY +{ /* see https://github.com/stm32-rs/stm32l0xx-hal/blob/master/ */ + FLASH : ORIGIN = 0x08000000, LENGTH = 16K + RAM : ORIGIN = 0x20000000, LENGTH = 2K +} diff --git a/examples/memoryMaps/STM32L100/memory.x b/examples/memoryMaps/STM32L100/memory.x new file mode 100644 index 0000000..e4e6f6f --- /dev/null +++ b/examples/memoryMaps/STM32L100/memory.x @@ -0,0 +1,6 @@ +MEMORY +{ + /* Define memory regions. STM32L100RCT6 */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 16K +} diff --git a/examples/memoryMaps/STM32L151/memory.x b/examples/memoryMaps/STM32L151/memory.x new file mode 100644 index 0000000..f187798 --- /dev/null +++ b/examples/memoryMaps/STM32L151/memory.x @@ -0,0 +1,7 @@ +MEMORY +{ + /* Define memory regions. STM32L151CCU6 */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 32K +} + diff --git a/examples/memoryMaps/STM32L4X2/memory.x b/examples/memoryMaps/STM32L4X2/memory.x new file mode 100644 index 0000000..0c4c312 --- /dev/null +++ b/examples/memoryMaps/STM32L4X2/memory.x @@ -0,0 +1,6 @@ +MEMORY +{ + /* see https://github.com/stm32-rs/stm32l4xx-hal/blob/master/memory.x */ + FLASH : ORIGIN = 0x8000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 64K +} diff --git a/openocd.gdb b/openocd.gdb new file mode 100644 index 0000000..7795319 --- /dev/null +++ b/openocd.gdb @@ -0,0 +1,40 @@ +target extended-remote :3333 + +# print demangled symbols +set print asm-demangle on + +# set backtrace limit to not have infinite backtrace loops +set backtrace limit 32 + +# detect unhandled exceptions, hard faults and panics +break DefaultHandler +break HardFault +break rust_begin_unwind +# # run the next few lines so the panic message is printed immediately +# # the number needs to be adjusted for your panic handler +# commands $bpnum +# next 4 +# end + +# *try* to stop at the user entry point (it might be gone due to inlining) +break main + +monitor arm semihosting enable + +# # send captured ITM to the file itm.fifo +# # (the microcontroller SWO pin must be connected to the programmer SWO pin) +# # 8000000 must match the core clock frequency +# monitor tpiu config internal itm.txt uart off 8000000 + +# # OR: make the microcontroller SWO pin output compatible with UART (8N1) +# # 8000000 must match the core clock frequency +# # 2000000 is the frequency of the SWO pin +# monitor tpiu config external uart off 8000000 2000000 + +# # enable ITM port 0 +# monitor itm port 0 on + +load + +# start the process but immediately halt the processor +stepi From fabd2df821edb5a59e33f36bf1d27a0e8f2e7fb0 Mon Sep 17 00:00:00 2001 From: Paul Gilbert Date: Tue, 16 Mar 2021 16:46:45 -0400 Subject: [PATCH 2/6] bumped version for stm32h7xx-hal and stm32l0xx-hal as suggested by dependabot. (Could not get merge of dependabot pull request to work because of habitual CI error.) --- Cargo.toml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 0af5ead..6d0db2e 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -66,8 +66,8 @@ stm32f1xx-hal = {version = "^0.7.0", optional = true} stm32f3xx-hal = {version = "^0.6.1", optional = true} stm32f4xx-hal = {version = "^0.8.3", optional = true} stm32f7xx-hal = {version = "^0.2.0", optional = true} -stm32h7xx-hal = {version = "^0.8.0", optional = true} -stm32l0xx-hal = {version = "^0.6.2", optional = true} +stm32h7xx-hal = {version = "^0.9.0", optional = true} +stm32l0xx-hal = {version = "^0.7.0", optional = true} stm32l1xx-hal = {version = "^0.1.0", optional = true, default-features = false} stm32l4xx-hal = {version = "^0.6.0", optional = true} From 0af5f8507449e5e6d79d03b549cac2234db22f80 Mon Sep 17 00:00:00 2001 From: Paul Gilbert Date: Mon, 22 Mar 2021 14:42:27 -0400 Subject: [PATCH 3/6] added compat feature to include/omit embedded-hal-compat. --- .github/workflows/rust.yml | 8 ++++---- Cargo.lock | 17 +++++++++-------- Cargo.toml | 3 ++- examples/lora_spi_gps.rs | 1 - examples/lora_spi_receive.rs | 1 - examples/lora_spi_send.rs | 11 +++++------ 6 files changed, 20 insertions(+), 21 deletions(-) diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index 75f9ac2..a8bc780 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -185,24 +185,24 @@ jobs: # uses: actions-rs/cargo@v1 # with: # command: build - # args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.mcu }} + # args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.mcu }},compat - name: Build example lora_spi_send uses: actions-rs/cargo@v1 with: command: build - args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }} --example lora_spi_send + args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }},compat --example lora_spi_send use-cross: true - name: Build example lora_spi_receive uses: actions-rs/cargo@v1 with: command: build - args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }} --example lora_spi_receive + args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }},compat --example lora_spi_receive use-cross: true - name: Build example lora_spi_gps uses: actions-rs/cargo@v1 with: command: build - args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }} --example lora_spi_gps + args: --no-default-features --release --target ${{ matrix.trg }} --features ${{ matrix.hal }},${{ matrix.mcu }},compat --example lora_spi_gps use-cross: true # probably want release on master, but not on forks and branches diff --git a/Cargo.lock b/Cargo.lock index 6e0c6ee..b30e189 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1125,26 +1125,27 @@ dependencies = [ [[package]] name = "stm32h7" -version = "0.12.1" +version = "0.13.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7571f17d1ed7d67957d0004de6c52bd1ef5e736ed5ddc2bcecf001512269f77c" +checksum = "8b672c837e0ee8158ecc7fce0f9a948dd0693a9c588338e728d14b73307a0b7d" dependencies = [ "bare-metal 0.2.5", - "cortex-m 0.6.7", + "cortex-m 0.7.2", "cortex-m-rt", "vcell", ] [[package]] name = "stm32h7xx-hal" -version = "0.8.0" +version = "0.9.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2df47cc6248aa85e5d5762f8755448270fd406b0a155557671de46cb5aef4546" +checksum = "67034b80041bc33a48df1c1c435b6ae3bb18c35e42aa7e702ce8363b96793398" dependencies = [ "bare-metal 1.0.0", "cast", - "cortex-m 0.6.7", + "cortex-m 0.7.2", "cortex-m-rt", + "embedded-dma", "embedded-hal 0.2.4", "nb 1.0.0", "paste", @@ -1166,9 +1167,9 @@ dependencies = [ [[package]] name = "stm32l0xx-hal" -version = "0.6.2" +version = "0.7.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cb3d290213676eebb026c57d93d76e878ba554f3781693bb132891aedae83a8e" +checksum = "92751ef18889ca54d819aef3c19f2b2cf475dcc0699a41908919c161be3574b7" dependencies = [ "as-slice", "cast", diff --git a/Cargo.toml b/Cargo.toml index 6d0db2e..a541777 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -13,6 +13,7 @@ default = [ "util", "serde" ] # features for examples examples = [] +compat = ["embedded-hal-compat"] stm32f0xx = [] stm32f1xx = [] @@ -44,7 +45,7 @@ stm32l4x2 = ["stm32l4xx-hal/stm32l4x2", "stm32l4xx-hal/rt", "examples"] [dependencies] #embedded-hal-compat = "0.1.3" -embedded-hal-compat = { git = "https://github.com/ryankurte/embedded-hal-compat.git", branch = "main"} +embedded-hal-compat = { git = "https://github.com/ryankurte/embedded-hal-compat.git", branch = "main", optional = true} libc = "0.2" log = { version = "0.4" } bitflags = "1.0" diff --git a/examples/lora_spi_gps.rs b/examples/lora_spi_gps.rs index f63962a..25575f8 100644 --- a/examples/lora_spi_gps.rs +++ b/examples/lora_spi_gps.rs @@ -35,7 +35,6 @@ use heapless::{consts, Vec}; use embedded_hal::blocking::delay::DelayMs; -use embedded_hal_compat::eh1_0::blocking::delay::DelayMs as _; use embedded_hal_compat::IntoCompat; // MODE needs the old version as it is passed to the device hal crates diff --git a/examples/lora_spi_receive.rs b/examples/lora_spi_receive.rs index 81c482c..f78166a 100644 --- a/examples/lora_spi_receive.rs +++ b/examples/lora_spi_receive.rs @@ -35,7 +35,6 @@ use cortex_m_semihosting::*; use embedded_hal::blocking::delay::DelayMs; -use embedded_hal_compat::eh1_0::blocking::delay::DelayMs as _; use embedded_hal_compat::IntoCompat; // MODE needs the old version as it is passed to the device hal crates diff --git a/examples/lora_spi_send.rs b/examples/lora_spi_send.rs index ec0cdd5..b61faad 100644 --- a/examples/lora_spi_send.rs +++ b/examples/lora_spi_send.rs @@ -10,7 +10,7 @@ //! - no-default-features is because some default-features require std. //! //! The examples can be compiled with: -//! cargo build --no-default-features --target $TARGET --features=$HAL,$MCU --example xxx +//! cargo build --no-default-features --target $TARGET --features=$HAL,$MCU,compat --example xxx [ --release ] //! //! Before running, check FREQUENCY below to be sure you have a channel setting appropriate for //! your country, hardware and any testing sender/receiver on the other end of the communication. @@ -18,7 +18,7 @@ //! To link, loaded and run using gdb and openocd (with INTERFACE and PROC set as below): //! openocd -f interface/$INTERFACE.cfg -f target/$PROC.cfg //! and in another window (with TARGET, HAL, and MCU set as below): -//! cargo run --no-default-features --target $TARGET --features $HAL,$MCU --example xxx [ --release ] +//! cargo run --no-default-features --target $TARGET --features $HAL,$MCU,compat --example xxx [ --release ] //! //! If --release is omitted then some MCUs do not have sufficient memory and loading results in //! '.rodata will not fit in region FLASH ' @@ -88,7 +88,6 @@ use embedded_hal::blocking::delay::DelayMs; // When passing the older hal crate objects to the newer rust-radio-sx127x methods // the objects are appended with .compat(). -use embedded_hal_compat::eh1_0::blocking::delay::DelayMs as _; use embedded_hal_compat::IntoCompat; // MODE needs the old version as it is passed to the device hal crates @@ -211,15 +210,15 @@ fn setup() -> impl DelayMs + Transmit impl DelayMs + Transmit> { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); + let cp = CorePeripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); let mut rcc = p.RCC.constrain(); let clocks = rcc From ca69a91c23a07775e0df2e528ec5f6fcc819eda3 Mon Sep 17 00:00:00 2001 From: Paul Gilbert Date: Mon, 22 Mar 2021 15:35:42 -0400 Subject: [PATCH 4/6] removed example setup for devices other than bluepill and blackpill stm32f411. --- Cargo.lock | 318 ++-------------------- Cargo.toml | 31 +-- examples/lora_spi_gps.rs | 507 ----------------------------------- examples/lora_spi_receive.rs | 386 -------------------------- examples/lora_spi_send.rs | 401 +-------------------------- 5 files changed, 30 insertions(+), 1613 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index b30e189..05b53e0 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -21,12 +21,6 @@ version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "aae1277d39aeec15cb388266ecc24b11c80469deae6067e17a1a7aa9e5c1f234" -[[package]] -name = "aligned" -version = "0.2.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d39da9b88ae1a81c03c9c082b8db83f1d0e93914126041962af61034ab44c4a5" - [[package]] name = "aligned" version = "0.3.4" @@ -97,12 +91,6 @@ dependencies = [ "rustc_version", ] -[[package]] -name = "bare-metal" -version = "1.0.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f8fe8f5a8a398345e52358e18ff07cc17a568fbca5c6f73873d3a62056309603" - [[package]] name = "bitfield" version = "0.13.2" @@ -117,9 +105,9 @@ checksum = "cf1de2fe8c75bc145a2f577add951f8134889b4795d47466a54a5c846d691693" [[package]] name = "byteorder" -version = "1.4.2" +version = "1.4.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ae44d1a3d5a19df61dd0c8beb138458ac2a53a7ac09eba97d55592540004306b" +checksum = "14c189c53d098945499cdfa7ecc63567cf3886b3332b312a5b4585d8d3a6a610" [[package]] name = "cast" @@ -176,26 +164,14 @@ dependencies = [ "vec_map", ] -[[package]] -name = "cortex-m" -version = "0.5.11" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "59971a5cf4dacacaf738dd9d8660875118fce790f800f661893eb20894c1d622" -dependencies = [ - "aligned 0.2.0", - "bare-metal 0.2.5", - "cortex-m 0.6.7", - "volatile-register", -] - [[package]] name = "cortex-m" version = "0.6.7" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9075300b07c6a56263b9b582c214d0ff037b00d45ec9fde1cc711490c56f1bb9" dependencies = [ - "aligned 0.3.4", - "bare-metal 0.2.5", + "aligned", + "bare-metal", "bitfield", "cortex-m 0.7.2", "volatile-register", @@ -207,7 +183,7 @@ version = "0.7.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "643a210c1bdc23d0db511e2a576082f4ff4dcae9d0c37f50b431b8f8439d6d6b" dependencies = [ - "bare-metal 0.2.5", + "bare-metal", "bitfield", "embedded-hal 0.2.4", "volatile-register", @@ -503,15 +479,15 @@ checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646" [[package]] name = "libc" -version = "0.2.88" +version = "0.2.90" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "03b07a082330a35e43f63177cc01689da34fbffa0105e1246cf0311472cac73a" +checksum = "ba4aede83fc3617411dc6993bc8c70919750c1c257c6ca6a502aed6e0e2394ae" [[package]] name = "libflate" -version = "1.0.3" +version = "1.0.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "389de7875e06476365974da3e7ff85d55f1972188ccd9f6020dd7c8156e17914" +checksum = "158ae2ca09a761eaf6050894f5a6f013f2773dafe24f67bfa73a7504580e2916" dependencies = [ "adler32", "crc32fast", @@ -575,12 +551,6 @@ dependencies = [ "cfg-if 1.0.0", ] -[[package]] -name = "micromath" -version = "1.1.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "be00a244d4394124986da477e8b2814dcb7995ab238817d9037bc336c4b0b843" - [[package]] name = "miniz_oxide" version = "0.4.4" @@ -660,12 +630,6 @@ dependencies = [ "cortex-m-semihosting", ] -[[package]] -name = "paste" -version = "1.0.4" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c5d65c4d95931acda4498f675e332fcbdc9a06705cd07086c510e9b6009cd1c1" - [[package]] name = "pkg-config" version = "0.3.19" @@ -763,15 +727,8 @@ dependencies = [ "radio", "serde", "simplelog 0.8.0", - "stm32f0xx-hal", "stm32f1xx-hal", - "stm32f3xx-hal", "stm32f4xx-hal", - "stm32f7xx-hal", - "stm32h7xx-hal", - "stm32l0xx-hal", - "stm32l1xx-hal", - "stm32l4xx-hal", "structopt", "void", ] @@ -837,15 +794,6 @@ version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "cabe4fa914dec5870285fa7f71f602645da47c486e68486d2b4ceb4a343e90ac" -[[package]] -name = "rtcc" -version = "0.2.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1048f7217bcd4bd977c01288e4973a69cf9195681f8b0b3a45d92ea21148f4a8" -dependencies = [ - "chrono", -] - [[package]] name = "rusb" version = "0.6.5" @@ -966,51 +914,13 @@ version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3" -[[package]] -name = "stm32-usbd" -version = "0.5.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "70d13eca735cae37df697f599777b000cc0ee924df8452f2b4bfaa6798ab0338" -dependencies = [ - "cortex-m 0.6.7", - "usb-device", - "vcell", -] - -[[package]] -name = "stm32f0" -version = "0.11.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9673b9c3ecdf8ea1133492f3070515d64f51e98439710eae062552fc80b94a6c" -dependencies = [ - "bare-metal 0.2.5", - "cortex-m 0.6.7", - "cortex-m-rt", - "vcell", -] - -[[package]] -name = "stm32f0xx-hal" -version = "0.17.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a01836951a5eb4d322f31c63a30dcfcaec383f88d6d89cadb90311c00e564a3b" -dependencies = [ - "bare-metal 0.2.5", - "cast", - "cortex-m 0.6.7", - "embedded-hal 0.2.4", - "nb 0.1.3", - "stm32f0", - "void", -] - [[package]] name = "stm32f1" version = "0.11.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "849b1e8d9bcfd792c9d9178cf86165d299a661c26e35d9322ae9382d3f3fe460" dependencies = [ - "bare-metal 0.2.5", + "bare-metal", "cortex-m 0.6.7", "cortex-m-rt", "vcell", @@ -1032,45 +942,13 @@ dependencies = [ "void", ] -[[package]] -name = "stm32f3" -version = "0.12.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "636387c2c5af11075c8ed3ef203c01460204be3a479397c2380622cbd61a673f" -dependencies = [ - "bare-metal 0.2.5", - "cortex-m 0.6.7", - "cortex-m-rt", - "vcell", -] - -[[package]] -name = "stm32f3xx-hal" -version = "0.6.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a96e54d3ba219c0d7d68e79fc72afd784972727e32c32bcae0178f2c132b1375" -dependencies = [ - "bare-metal 0.2.5", - "cfg-if 1.0.0", - "cortex-m 0.6.7", - "cortex-m-rt", - "embedded-dma", - "embedded-hal 0.2.4", - "nb 0.1.3", - "paste", - "rtcc", - "stm32-usbd", - "stm32f3", - "void", -] - [[package]] name = "stm32f4" version = "0.11.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "11460b4de3a84f072e2cf6e76306c64d27f405a0e83bace0a726f555ddf4bf33" dependencies = [ - "bare-metal 0.2.5", + "bare-metal", "cortex-m 0.6.7", "cortex-m-rt", "vcell", @@ -1082,7 +960,7 @@ version = "0.8.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "b3a2f044469d1e3aff2cd02bee8b2724f3d5d91f3175e5d1ec99770320d16192" dependencies = [ - "bare-metal 0.2.5", + "bare-metal", "cast", "cortex-m 0.6.7", "cortex-m-rt", @@ -1093,151 +971,6 @@ dependencies = [ "void", ] -[[package]] -name = "stm32f7" -version = "0.11.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e8e6dbd8bf0965421c0c76c09e05683e71243216bf4d87984c7f95ed53caa28c" -dependencies = [ - "bare-metal 0.2.5", - "cortex-m 0.6.7", - "cortex-m-rt", - "vcell", -] - -[[package]] -name = "stm32f7xx-hal" -version = "0.2.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3146d2ffde605a5187a72419cda448a34daf057b27a178280b17f8a480501dc6" -dependencies = [ - "as-slice", - "bare-metal 0.2.5", - "cast", - "cortex-m 0.6.7", - "cortex-m-rt", - "embedded-hal 0.2.4", - "micromath", - "nb 0.1.3", - "stm32f7", - "void", -] - -[[package]] -name = "stm32h7" -version = "0.13.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8b672c837e0ee8158ecc7fce0f9a948dd0693a9c588338e728d14b73307a0b7d" -dependencies = [ - "bare-metal 0.2.5", - "cortex-m 0.7.2", - "cortex-m-rt", - "vcell", -] - -[[package]] -name = "stm32h7xx-hal" -version = "0.9.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "67034b80041bc33a48df1c1c435b6ae3bb18c35e42aa7e702ce8363b96793398" -dependencies = [ - "bare-metal 1.0.0", - "cast", - "cortex-m 0.7.2", - "cortex-m-rt", - "embedded-dma", - "embedded-hal 0.2.4", - "nb 1.0.0", - "paste", - "stm32h7", - "void", -] - -[[package]] -name = "stm32l0" -version = "0.10.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8386ff55bd099b3c6c7ea16bb68296cbe6025981f96ed69b222b6e6633ca6148" -dependencies = [ - "bare-metal 0.2.5", - "cortex-m 0.6.7", - "cortex-m-rt", - "vcell", -] - -[[package]] -name = "stm32l0xx-hal" -version = "0.7.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "92751ef18889ca54d819aef3c19f2b2cf475dcc0699a41908919c161be3574b7" -dependencies = [ - "as-slice", - "cast", - "cortex-m 0.6.7", - "cortex-m-rt", - "cortex-m-semihosting", - "embedded-hal 0.2.4", - "nb 0.1.3", - "stm32l0", - "void", -] - -[[package]] -name = "stm32l1" -version = "0.5.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "edda4346740d0f01082c353dca33b320e84f9fb51765fdcac7a624017c5a8ff4" -dependencies = [ - "bare-metal 0.2.5", - "cortex-m 0.5.11", - "cortex-m-rt", - "vcell", -] - -[[package]] -name = "stm32l1xx-hal" -version = "0.1.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4dc5ad008615fe51a3f7752468f83d1d1d5d80e1b32520be690bf4fad64e7aa4" -dependencies = [ - "bare-metal 0.2.5", - "cast", - "cortex-m 0.5.11", - "embedded-hal 0.2.4", - "nb 0.1.3", - "stm32l1", - "void", -] - -[[package]] -name = "stm32l4" -version = "0.12.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a9abc2787195d7055b342be5a7934d74099fd7e92b81c0771002b3b35ccfc85b" -dependencies = [ - "bare-metal 0.2.5", - "cortex-m 0.6.7", - "cortex-m-rt", - "vcell", -] - -[[package]] -name = "stm32l4xx-hal" -version = "0.6.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3fc8fef7443befd04ba8714ccb9475d86639794492e2b2dcbfbe675bbae8fafa" -dependencies = [ - "as-slice", - "cast", - "cortex-m 0.6.7", - "embedded-hal 0.2.4", - "generic-array 0.13.3", - "nb 0.1.3", - "stable_deref_trait", - "stm32l4", - "void", -] - [[package]] name = "strsim" version = "0.8.0" @@ -1270,9 +1003,9 @@ dependencies = [ [[package]] name = "syn" -version = "1.0.62" +version = "1.0.64" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "123a78a3596b24fee53a6464ce52d8ecbf62241e6294c7e7fe12086cd161f512" +checksum = "3fd9d1e9976102a03c542daa2eff1b43f9d72306342f3f8b3ed5fb8908195d6f" dependencies = [ "proc-macro2", "quote", @@ -1340,12 +1073,11 @@ dependencies = [ [[package]] name = "time" -version = "0.1.44" +version = "0.1.43" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6db9e6914ab8b1ae1c260a4ae7a49b6c5611b40328a735b21862567685e73255" +checksum = "ca8a50ef2360fbd1eeb0ecd46795a87a19024eb4b53c5dc916ca1fd95fe62438" dependencies = [ "libc", - "wasi", "winapi", ] @@ -1360,9 +1092,9 @@ dependencies = [ [[package]] name = "typenum" -version = "1.12.0" +version = "1.13.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "373c8a200f9e67a0c95e62a4f52fbf80c23b4381c05a17845531982fa99e6b33" +checksum = "879f6906492a7cd215bfa4cf595b600146ccfac0c79bcbd1f3000162af5e8b06" [[package]] name = "unicode-segmentation" @@ -1382,12 +1114,6 @@ version = "0.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "f7fe0bb3479651439c9112f72b6c505038574c9fbb575ed1bf3b797fa39dd564" -[[package]] -name = "usb-device" -version = "0.2.7" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "849eed9b4dc61a1f17ba1d7a5078ceb095b9410caa38a506eb281ed5eff12fbd" - [[package]] name = "vcell" version = "0.1.3" @@ -1408,9 +1134,9 @@ checksum = "f1bddf1187be692e79c5ffeab891132dfb0f236ed36a43c7ed39f1165ee20191" [[package]] name = "version_check" -version = "0.9.2" +version = "0.9.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b5a972e5669d67ba988ce3dc826706fb0a8b01471c088cb0b6110b805cc36aed" +checksum = "5fecdca9a5291cc2b8dcf7dc02453fee791a280f3743cb0905f8822ae463b3fe" [[package]] name = "void" @@ -1429,9 +1155,9 @@ dependencies = [ [[package]] name = "wasi" -version = "0.10.0+wasi-snapshot-preview1" +version = "0.10.2+wasi-snapshot-preview1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1a143597ca7c7793eff794def352d41792a93c481eb1042423ff7ff72ba2c31f" +checksum = "fd6fbd9a79829dd1ad0cc20627bf1ed606756a7f77edff7b66b7064f9cb327c6" [[package]] name = "winapi" diff --git a/Cargo.toml b/Cargo.toml index a541777..0c57b70 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -15,33 +15,11 @@ default = [ "util", "serde" ] examples = [] compat = ["embedded-hal-compat"] -stm32f0xx = [] stm32f1xx = [] -stm32f3xx = [] stm32f4xx = [] -stm32f7xx = [] -stm32h7xx = [] -stm32l0xx = [] -stm32l1xx = [] -stm32l4xx = [] - -stm32f042 = ["stm32f0xx-hal/stm32f042", "stm32f0xx-hal/rt", "examples"] -stm32f030xc = ["stm32f0xx-hal/stm32f030xc", "stm32f0xx-hal/rt", "examples"] -stm32f100 = ["stm32f1xx-hal/stm32f100", "stm32f1xx-hal/rt", "examples"] -stm32f101 = ["stm32f1xx-hal/stm32f101", "stm32f1xx-hal/rt", "examples"] + stm32f103 = ["stm32f1xx-hal/stm32f103", "stm32f1xx-hal/rt", "examples"] -stm32f303xc = ["stm32f3xx-hal/stm32f303xc", "stm32f3xx-hal/rt", "examples"] -stm32f401 = ["stm32f4xx-hal/stm32f401", "stm32f4xx-hal/rt", "examples"] -stm32f405 = ["stm32f4xx-hal/stm32f405", "stm32f4xx-hal/rt", "examples"] stm32f411 = ["stm32f4xx-hal/stm32f411", "stm32f4xx-hal/rt", "examples"] -stm32f722 = ["stm32f7xx-hal/stm32f722", "stm32f7xx-hal/rt", "examples"] -stm32h742 = ["stm32h7xx-hal/stm32h742", "stm32h7xx-hal/rt", "examples"] -stm32l0x2 = ["stm32l0xx-hal/stm32l0x2", "stm32l0xx-hal/rt", "examples", "stm32l0xx-hal/mcu-STM32L072KZTx"] -stm32l0x1 = ["stm32l0xx-hal/stm32l0x1", "stm32l0xx-hal/rt", "examples", "stm32l0xx-hal/mcu-STM32L071KBTx"] -stm32l100 = ["stm32l1xx-hal/stm32l100", "stm32l1xx-hal/rt", "examples"] -stm32l151 = ["stm32l1xx-hal/stm32l151", "stm32l1xx-hal/rt", "examples"] -stm32l4x1 = ["stm32l4xx-hal/stm32l4x1", "stm32l4xx-hal/rt", "examples"] -stm32l4x2 = ["stm32l4xx-hal/stm32l4x2", "stm32l4xx-hal/rt", "examples"] [dependencies] #embedded-hal-compat = "0.1.3" @@ -62,15 +40,8 @@ radio = { version = "0.8.1" } # Next could be dev-dependencies since they are only for examples, but # dev-dependencies do not allow optional (as of cargo 1.44.1). -stm32f0xx-hal = {version = "^0.17.1",optional = true} stm32f1xx-hal = {version = "^0.7.0", optional = true} -stm32f3xx-hal = {version = "^0.6.1", optional = true} stm32f4xx-hal = {version = "^0.8.3", optional = true} -stm32f7xx-hal = {version = "^0.2.0", optional = true} -stm32h7xx-hal = {version = "^0.9.0", optional = true} -stm32l0xx-hal = {version = "^0.7.0", optional = true} -stm32l1xx-hal = {version = "^0.1.0", optional = true, default-features = false} -stm32l4xx-hal = {version = "^0.6.0", optional = true} embedded-hal = {version = "1.0.0-alpha.4" } old-e-h = {version = "0.2.4", package = "embedded-hal" } diff --git a/examples/lora_spi_gps.rs b/examples/lora_spi_gps.rs index 25575f8..dd5e78d 100644 --- a/examples/lora_spi_gps.rs +++ b/examples/lora_spi_gps.rs @@ -101,72 +101,6 @@ const CONFIG_RADIO: radio_sx127x::device::Config = radio_sx127x::device::Config // setup() does all hal/MCU specific setup and returns generic hal device for use in main code. -#[cfg(feature = "stm32f0xx")] // eg stm32f030xc -use stm32f0xx_hal::{ - delay::Delay, - pac::Peripherals, - pac::USART2, - prelude::*, - serial::{Rx, Serial, Tx}, - spi::{Error, Spi}, -}; - -#[cfg(feature = "stm32f0xx")] -fn setup() -> ( - Tx, - Rx, - impl DelayMs + Transmit>, -) { - let cp = cortex_m::Peripherals::take().unwrap(); - let mut p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.configure().freeze(&mut p.FLASH); - - let gpioa = p.GPIOA.split(&mut rcc); - let gpiob = p.GPIOB.split(&mut rcc); - - // stm32f030xc builds with gpiob..into_alternate_af4(cs) USART3 on tx pb10, rx pb11 - // but stm32f042 only has 2 usarts. - // Both have gpioa..into_alternate_af1(cs) USART2 with tx on pa2 and rx pa3 - - let (tx, rx, sck, miso, mosi, _rst, pa1, pb8, pb9, pa0) = - cortex_m::interrupt::free(move |cs| { - ( - gpioa.pa2.into_alternate_af1(cs), //tx pa2 for GPS - gpioa.pa3.into_alternate_af1(cs), //rx pa3 for GPS - gpioa.pa5.into_alternate_af0(cs), // sck on PA5 - gpioa.pa6.into_alternate_af0(cs), // miso on PA6 - gpioa.pa7.into_alternate_af0(cs), // mosi on PA7 - //gpioa.pa1.into_push_pull_output(cs), // cs on PA1 - gpiob.pb1.into_push_pull_output(cs), // reset on PB1 - gpioa.pa1.into_push_pull_output(cs), // CsPin on PA1 - gpiob.pb8.into_floating_input(cs), // BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input(cs), // ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output(cs), // ResetPin on PA0 - ) - }); - - let (tx, rx) = Serial::usart2(p.USART2, (tx, rx), 9600.bps(), &mut rcc).split(); - - let spi = Spi::spi1(p.SPI1, (sck, miso, mosi), MODE, 8.mhz(), &mut rcc); - - let delay = Delay::new(cp.SYST, &rcc); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), - pa1.compat(), - pb8.compat(), - pb9.compat(), - pa0.compat(), - delay.compat(), - &CONFIG_RADIO, - ) - .unwrap(); // should handle error - - (tx, rx, lora) -} - #[cfg(feature = "stm32f1xx")] // eg blue pill stm32f103 use stm32f1xx_hal::{ delay::Delay, @@ -242,90 +176,6 @@ fn setup() -> ( (tx, rx, lora) } -#[cfg(feature = "stm32f3xx")] // eg Discovery-stm32f303 -use stm32f3xx_hal::{ - delay::Delay, - prelude::*, - serial::{Rx, Serial, Tx}, - spi::{Error, Spi}, - stm32::Peripherals, - stm32::USART2, -}; - -#[cfg(feature = "stm32f3xx")] -fn setup() -> ( - Tx, - Rx, - impl DelayMs + Transmit>, -) { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - - let mut rcc = p.RCC.constrain(); - let clocks = rcc - .cfgr - .sysclk(64.mhz()) - .pclk1(32.mhz()) - .freeze(&mut p.FLASH.constrain().acr); - - let mut gpioa = p.GPIOA.split(&mut rcc.ahb); - let mut gpiob = p.GPIOB.split(&mut rcc.ahb); - - let (tx, rx) = Serial::usart2( - p.USART2, - ( - gpioa.pa2.into_af7(&mut gpioa.moder, &mut gpioa.afrl), //tx pa2 for GPS rx - gpioa.pa3.into_af7(&mut gpioa.moder, &mut gpioa.afrl), - ), //rx pa3 for GPS tx - 9600.bps(), // 115_200.bps(), - clocks, - &mut rcc.apb1, - ) - .split(); - - let spi = Spi::spi1( - p.SPI1, - ( - gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 - gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 - gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 - ), - MODE, - 8.mhz(), - clocks, - &mut rcc.apb2, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa - .pa1 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //CsPin on PA1 - gpiob - .pb8 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //BusyPin DIO0 on PB8 - gpiob - .pb9 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //ReadyPin DIO1 on PB9 - gpioa - .pa0 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - (tx, rx, lora) -} - #[cfg(feature = "stm32f4xx")] // eg Nucleo-64 stm32f411, blackpill stm32f411, blackpill stm32f401 use stm32f4xx_hal::{ @@ -405,363 +255,6 @@ fn setup() -> ( (tx, rx, lora) } -#[cfg(feature = "stm32f7xx")] -use stm32f7xx_hal::{ - delay::Delay, - device::Peripherals, // note non-standard device vs pac - device::USART2, // note non-standard device vs pac - prelude::*, - serial::{Config, Oversampling, Rx, Serial, Tx}, - spi::{ClockDivider, Error, Spi}, -}; - -#[cfg(feature = "stm32f7xx")] -fn setup() -> ( - Tx, - Rx, - impl DelayMs + Transmit>, -) { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - - let mut rcc = p.RCC.constrain(); - let gpioa = p.GPIOA.split(); - let gpiob = p.GPIOB.split(); - - let sck = gpioa.pa5.into_alternate_af5(); // sck on PA5 - let miso = gpioa.pa6.into_alternate_af5(); // miso on PA6 - let mosi = gpioa.pa7.into_alternate_af5(); // mosi on PA7 - - // somewhere 8.mhz needs to be set in spi - - let spi = Spi::new(p.SPI1, (sck, miso, mosi)).enable::(&mut rcc, ClockDivider::DIV32, MODE); - - // Relative to other hal setups, Serial::new is after spi::new because clocks partially consumes rcc. - - let clocks = rcc.cfgr.sysclk(216.mhz()).freeze(); - //let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); - - let (tx, rx) = Serial::new( - p.USART2, - ( - gpioa.pa2.into_alternate_af7(), //tx pa2 for GPS - gpioa.pa3.into_alternate_af7(), - ), //rx pa3 for GPS - clocks, - Config { - baud_rate: 9600.bps(), - oversampling: Oversampling::By16, - }, - ) - .split(); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - (tx, rx, lora) -} - -#[cfg(feature = "stm32h7xx")] -use stm32h7xx_hal::{ - delay::Delay, - pac::Peripherals, - pac::USART2, - prelude::*, - serial::{Rx, Tx}, - spi::Error, -}; - -#[cfg(feature = "stm32h7xx")] -fn setup() -> ( - Tx, - Rx, - impl DelayMs + Transmit>, -) { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let pwr = p.PWR.constrain(); - let vos = pwr.freeze(); - let rcc = p.RCC.constrain(); - let ccdr = rcc.sys_ck(160.mhz()).freeze(vos, &p.SYSCFG); - let clocks = ccdr.clocks; - - let gpioa = p.GPIOA.split(ccdr.peripheral.GPIOA); - let gpiob = p.GPIOB.split(ccdr.peripheral.GPIOB); - - let (tx, rx) = p - .USART2 - .serial( - ( - gpioa.pa2.into_alternate_af7(), //tx pa2 for GPS rx - gpioa.pa3.into_alternate_af7(), - ), //rx pa3 for GPS tx - 9600.bps(), - ccdr.peripheral.USART2, - &clocks, - ) - .unwrap() - .split(); - - // following github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/spi.rs - let spi = p.SPI1.spi( - ( - gpioa.pa5.into_alternate_af5(), // sck on PA5 - gpioa.pa6.into_alternate_af5(), // miso on PA6 - gpioa.pa7.into_alternate_af5(), // mosi on PA7 - ), - MODE, - 8.mhz(), - ccdr.peripheral.SPI1, - &clocks, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - (tx, rx, lora) -} - -#[cfg(feature = "stm32l0xx")] -use stm32l0xx_hal::{ - pac::Peripherals, - pac::USART2, - prelude::*, - rcc, // for ::Config but note name conflict with serial - serial::{Config, Rx, Serial2Ext, Tx}, - spi::Error, -}; - -#[cfg(feature = "stm32l0xx")] -use void; - -#[cfg(feature = "stm32l0xx")] -fn setup() -> ( - Tx, - Rx, - impl DelayMs + Transmit>, -) { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.freeze(rcc::Config::hsi16()); - let gpioa = p.GPIOA.split(&mut rcc); - let gpiob = p.GPIOB.split(&mut rcc); - - let (tx, rx) = p - .USART2 - .usart( - gpioa.pa2, //tx pa2 for GPS - gpioa.pa3, //rx pa3 for GPS - Config::default().baudrate(9600.bps()), - &mut rcc, - ) - .unwrap() - .split(); - - // following github.com/stm32-rs/stm32l0xx-hal/blob/master/examples/spi.rs - let spi = p.SPI1.spi( - ( - gpioa.pa5, // sck on PA5 - gpioa.pa6, // miso on PA6 - gpioa.pa7, // mosi on PA7 - ), - MODE, - 8.mhz(), - &mut rcc, - ); - - let delay = cp.SYST.delay(rcc.clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - (tx, rx, lora) -} - -#[cfg(feature = "stm32l1xx")] // eg Discovery kit stm32l100 and Heltec lora_node STM32L151CCU6 -use stm32l1xx_hal::{ - prelude::*, - rcc, // for ::Config but note name conflict with serial - serial::{Config, Rx, SerialExt, Tx}, - spi::Error, - stm32::Peripherals, - stm32::USART1, -}; - -#[cfg(feature = "stm32l1xx")] -fn setup() -> ( - Tx, - Rx, - impl DelayMs + Transmit>, -) { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.freeze(rcc::Config::hsi()); - - let gpioa = p.GPIOA.split(); - let gpiob = p.GPIOB.split(); - - let (tx, rx) = p - .USART1 - .usart( - ( - gpioa.pa9, //tx pa9 for GPS rx - gpioa.pa10, - ), //rx pa10 for GPS tx - Config::default().baudrate(9600.bps()), - &mut rcc, - ) - .unwrap() - .split(); - - let spi = p.SPI1.spi( - ( - gpioa.pa5, // sck on PA5 in board on Heltec - gpioa.pa6, // miso on PA6 in board on Heltec - gpioa.pa7, // mosi on PA7 in board on Heltec - ), - MODE, - 8.mhz(), - &mut rcc, - ); - - let delay = cp.SYST.delay(rcc.clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa4.into_push_pull_output().compat(), //CsPin on PA4 in board on Heltec - gpiob.pb11.into_floating_input().compat(), //BusyPin DIO0 on PB11 in board on Heltec - gpiob.pb10.into_floating_input().compat(), //ReadyPin DIO1 on PB10 in board on Heltec - gpioa.pa3.into_push_pull_output().compat(), //ResetPin on PA3 in board on Heltec - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - (tx, rx, lora) -} - -#[cfg(feature = "stm32l4xx")] -use stm32l4xx_hal::{ - delay::Delay, - pac::Peripherals, - pac::USART2, - prelude::*, - serial::{Config, Rx, Serial, Tx}, - spi::{Error, Spi}, -}; - -#[cfg(feature = "stm32l4xx")] -fn setup() -> ( - Tx, - Rx, - impl DelayMs + Transmit>, -) { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut flash = p.FLASH.constrain(); - let mut rcc = p.RCC.constrain(); - let mut pwr = p.PWR.constrain(&mut rcc.apb1r1); - let clocks = rcc - .cfgr - .sysclk(80.mhz()) - .pclk1(80.mhz()) - .pclk2(80.mhz()) - .freeze(&mut flash.acr, &mut pwr); - - let mut gpioa = p.GPIOA.split(&mut rcc.ahb2); - let mut gpiob = p.GPIOB.split(&mut rcc.ahb2); - - let (tx, rx) = Serial::usart2( - p.USART2, - ( - gpioa.pa2.into_af7(&mut gpioa.moder, &mut gpioa.afrl), //tx pa2 for GPS - gpioa.pa3.into_af7(&mut gpioa.moder, &mut gpioa.afrl), - ), //rx pa3 for GPS - Config::default().baudrate(9600.bps()), - clocks, - &mut rcc.apb1r1, - ) - .split(); - - let spi = Spi::spi1( - p.SPI1, - ( - gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 - gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 - gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 - ), - MODE, - 8.mhz(), - clocks, - &mut rcc.apb2, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa - .pa1 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //CsPin on PA1 - gpiob - .pb8 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //BusyPin DIO0 on PB8 - gpiob - .pb9 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //ReadyPin DIO1 on PB9 - gpioa - .pa0 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - (tx, rx, lora) -} - // End of hal/MCU specific setup. Following should be generic code. #[entry] diff --git a/examples/lora_spi_receive.rs b/examples/lora_spi_receive.rs index f78166a..dba3350 100644 --- a/examples/lora_spi_receive.rs +++ b/examples/lora_spi_receive.rs @@ -101,59 +101,6 @@ const CONFIG_RADIO: radio_sx127x::device::Config = radio_sx127x::device::Config // setup() does all hal/MCU specific setup and returns generic hal device for use in main code. -#[cfg(feature = "stm32f0xx")] // eg stm32f030xc -use stm32f0xx_hal::{ - delay::Delay, - pac::Peripherals, - prelude::*, - spi::{Error, Spi}, -}; - -#[cfg(feature = "stm32f0xx")] -fn setup( -) -> impl DelayMs + Receive> -{ - let cp = cortex_m::Peripherals::take().unwrap(); - let mut p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.configure().freeze(&mut p.FLASH); - - let gpioa = p.GPIOA.split(&mut rcc); - let gpiob = p.GPIOB.split(&mut rcc); - - let (sck, miso, mosi, _rst, pa1, pb8, pb9, pa0) = cortex_m::interrupt::free(move |cs| { - ( - gpioa.pa5.into_alternate_af0(cs), // sck on PA5 - gpioa.pa6.into_alternate_af0(cs), // miso on PA6 - gpioa.pa7.into_alternate_af0(cs), // mosi on PA7 - //gpioa.pa1.into_push_pull_output(cs), // cs on PA1 - gpiob.pb1.into_push_pull_output(cs), // reset on PB1 - gpioa.pa1.into_push_pull_output(cs), // CsPin on PA1 - gpiob.pb8.into_floating_input(cs), // BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input(cs), // ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output(cs), // ResetPin on PA0 - ) - }); - - let spi = Spi::spi1(p.SPI1, (sck, miso, mosi), MODE, 8.mhz(), &mut rcc); - - let delay = Delay::new(cp.SYST, &rcc); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), - pa1.compat(), - pb8.compat(), - pb9.compat(), - pa0.compat(), - delay.compat(), - &CONFIG_RADIO, - ) - .unwrap(); // should handle error - - lora -} - #[cfg(feature = "stm32f1xx")] // eg blue pill stm32f103 use stm32f1xx_hal::{ delay::Delay, @@ -212,74 +159,6 @@ fn setup( lora } -#[cfg(feature = "stm32f3xx")] // eg Discovery-stm32f303 -use stm32f3xx_hal::{ - delay::Delay, - prelude::*, - spi::{Error, Spi}, - stm32::Peripherals, -}; - -#[cfg(feature = "stm32f3xx")] -fn setup( -) -> impl DelayMs + Receive> -{ - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - - let mut rcc = p.RCC.constrain(); - let clocks = rcc - .cfgr - .sysclk(64.mhz()) - .pclk1(32.mhz()) - .freeze(&mut p.FLASH.constrain().acr); - - let mut gpioa = p.GPIOA.split(&mut rcc.ahb); - let mut gpiob = p.GPIOB.split(&mut rcc.ahb); - - let spi = Spi::spi1( - p.SPI1, - ( - gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 - gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 - gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 - ), - MODE, - 8.mhz(), - clocks, - &mut rcc.apb2, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa - .pa1 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //CsPin on PA1 - gpiob - .pb8 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //BusyPin DIO0 on PB8 - gpiob - .pb9 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //ReadyPin DIO1 on PB9 - gpioa - .pa0 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - // eg Nucleo-64 stm32f411, blackpill stm32f411, blackpill stm32f401 #[cfg(feature = "stm32f4xx")] use stm32f4xx_hal::{ @@ -339,271 +218,6 @@ fn setup( lora } -#[cfg(feature = "stm32f7xx")] -use stm32f7xx_hal::{ - delay::Delay, - device::Peripherals, // note non-standard device vs pac - prelude::*, - spi::{ClockDivider, Error, Spi}, -}; - -#[cfg(feature = "stm32f7xx")] -fn setup( -) -> impl DelayMs + Receive> -{ - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - - let mut rcc = p.RCC.constrain(); - - let gpioa = p.GPIOA.split(); - let gpiob = p.GPIOB.split(); - - let sck = gpioa.pa5.into_alternate_af5(); // sck on PA5 - let miso = gpioa.pa6.into_alternate_af5(); // miso on PA6 - let mosi = gpioa.pa7.into_alternate_af5(); // mosi on PA7 - - // somewhere 8.mhz needs to be set in spi - - let spi = Spi::new(p.SPI1, (sck, miso, mosi)).enable::(&mut rcc, ClockDivider::DIV32, MODE); - - let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - -#[cfg(feature = "stm32h7xx")] -use stm32h7xx_hal::{delay::Delay, pac::Peripherals, prelude::*, spi::Error}; - -#[cfg(feature = "stm32h7xx")] -fn setup() -> impl DelayMs - + Receive> { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let pwr = p.PWR.constrain(); - let vos = pwr.freeze(); - let rcc = p.RCC.constrain(); - let ccdr = rcc.sys_ck(160.mhz()).freeze(vos, &p.SYSCFG); - let clocks = ccdr.clocks; - - let gpioa = p.GPIOA.split(ccdr.peripheral.GPIOA); - let gpiob = p.GPIOB.split(ccdr.peripheral.GPIOB); - - // following github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/spi.rs - let spi = p.SPI1.spi( - ( - gpioa.pa5.into_alternate_af5(), // sck on PA5 - gpioa.pa6.into_alternate_af5(), // miso on PA6 - gpioa.pa7.into_alternate_af5(), // mosi on PA7 - ), - MODE, - 8.mhz(), - ccdr.peripheral.SPI1, - &clocks, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - -#[cfg(feature = "stm32l0xx")] -use stm32l0xx_hal::{ - pac::Peripherals, - prelude::*, - rcc, // for ::Config but note name conflict with serial - spi::Error, -}; - -#[cfg(feature = "stm32l0xx")] -use void; - -#[cfg(feature = "stm32l0xx")] -fn setup( -) -> impl DelayMs + Receive> -{ - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.freeze(rcc::Config::hsi16()); - let gpioa = p.GPIOA.split(&mut rcc); - let gpiob = p.GPIOB.split(&mut rcc); - - // following github.com/stm32-rs/stm32l0xx-hal/blob/master/examples/spi.rs - let spi = p.SPI1.spi( - ( - gpioa.pa5, // sck on PA5 - gpioa.pa6, // miso on PA6 - gpioa.pa7, // mosi on PA7 - ), - MODE, - 8.mhz(), - &mut rcc, - ); - - let delay = cp.SYST.delay(rcc.clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - -#[cfg(feature = "stm32l1xx")] // eg Discovery kit stm32l100 and Heltec lora_node STM32L151CCU6 -use stm32l1xx_hal::{ - prelude::*, - rcc, // for ::Config but note name conflict with serial - spi::Error, - stm32::Peripherals, -}; - -#[cfg(feature = "stm32l1xx")] -fn setup( -) -> impl DelayMs + Receive> -{ - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.freeze(rcc::Config::hsi()); - - let gpioa = p.GPIOA.split(); - let gpiob = p.GPIOB.split(); - - let spi = p.SPI1.spi( - ( - gpioa.pa5, // sck on PA5 in board on Heltec - gpioa.pa6, // miso on PA6 in board on Heltec - gpioa.pa7, // mosi on PA7 in board on Heltec - ), - MODE, - 8.mhz(), - &mut rcc, - ); - - let delay = cp.SYST.delay(rcc.clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa4.into_push_pull_output().compat(), //CsPin on PA4 in board on Heltec - gpiob.pb11.into_floating_input().compat(), //BusyPin DIO0 on PB11 in board on Heltec - gpiob.pb10.into_floating_input().compat(), //ReadyPin DIO1 on PB10 in board on Heltec - gpioa.pa3.into_push_pull_output().compat(), //ResetPin on PA3 in board on Heltec - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - -#[cfg(feature = "stm32l4xx")] -use stm32l4xx_hal::{ - delay::Delay, - pac::Peripherals, - prelude::*, - spi::{Error, Spi}, -}; - -#[cfg(feature = "stm32l4xx")] -fn setup( -) -> impl DelayMs + Receive> -{ - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut flash = p.FLASH.constrain(); - let mut rcc = p.RCC.constrain(); - let mut pwr = p.PWR.constrain(&mut rcc.apb1r1); - let clocks = rcc - .cfgr - .sysclk(80.mhz()) - .pclk1(80.mhz()) - .pclk2(80.mhz()) - .freeze(&mut flash.acr, &mut pwr); - - let mut gpioa = p.GPIOA.split(&mut rcc.ahb2); - let mut gpiob = p.GPIOB.split(&mut rcc.ahb2); - - let spi = Spi::spi1( - p.SPI1, - ( - gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 - gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 - gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 - ), - MODE, - 8.mhz(), - clocks, - &mut rcc.apb2, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa - .pa1 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //CsPin on PA1 - gpiob - .pb8 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //BusyPin DIO0 on PB8 - gpiob - .pb9 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //ReadyPin DIO1 on PB9 - gpioa - .pa0 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - // End of hal/MCU specific setup. Following should be generic code. fn to_str(x: &[u8]) -> &str { diff --git a/examples/lora_spi_send.rs b/examples/lora_spi_send.rs index b61faad..12a2f33 100644 --- a/examples/lora_spi_send.rs +++ b/examples/lora_spi_send.rs @@ -27,27 +27,18 @@ //! //! cargo run environment variables openocd test board and processor //! _____________________________________________________________ _____________ ___________________________ -//! export HAL=stm32f0xx MCU=stm32f042 TARGET=thumbv6m-none-eabi PROC=stm32f0x # none-stm32f042 Cortex-M0 -//! export HAL=stm32f0xx MCU=stm32f030xc TARGET=thumbv6m-none-eabi PROC=stm32f0x # none-stm32f030 Cortex-M0 //! export HAL=stm32f1xx MCU=stm32f103 TARGET=thumbv7m-none-eabi PROC=stm32f1x # bluepill Cortex-M3 -//! export HAL=stm32f1xx MCU=stm32f100 TARGET=thumbv7m-none-eabi PROC=stm32f1x # none-stm32f100 Cortex-M3 -//! export HAL=stm32f1xx MCU=stm32f101 TARGET=thumbv7m-none-eabi PROC=stm32f1x # none-stm32f101 Cortex-M3 -//! export HAL=stm32f3xx MCU=stm32f303xc TARGET=thumbv7em-none-eabihf PROC=stm32f3x # discovery-stm32f303 Cortex-M3 -//! export HAL=stm32f4xx MCU=stm32f401 TARGET=thumbv7em-none-eabihf PROC=stm32f4x # blackpill-stm32f401 Cortex-M4 //! export HAL=stm32f4xx MCU=stm32f411 TARGET=thumbv7em-none-eabihf PROC=stm32f4x # blackpill-stm32f411 Cortex-M4 -//! export HAL=stm32f4xx MCU=stm32f411 TARGET=thumbv7em-none-eabihf PROC=stm32f4x # nucleo-64 Cortex-M4 -//! export HAL=stm32f7xx MCU=stm32f722 TARGET=thumbv7em-none-eabihf PROC=stm32f7x # none-stm32f722 Cortex-M7 -//! export HAL=stm32h7xx MCU=stm32h742 TARGET=thumbv7em-none-eabihf PROC= # none-stm32h742 Cortex-M7 -//! export HAL=stm32l0xx MCU=stm32l0x2 TARGET=thumbv6m-none-eabi PROC=stm32l0 # none-stm32l0x2 Cortex-M0 -//! export HAL=stm32l1xx MCU=stm32l100 TARGET=thumbv7m-none-eabi PROC=stm32l1 # discovery-stm32l100 Cortex-M3 -//! export HAL=stm32l1xx MCU=stm32l151 TARGET=thumbv7m-none-eabi PROC=stm32l1 # heltec-lora-node151 Cortex-M3 -//! export HAL=stm32l4xx MCU=stm32l4x2 TARGET=thumbv7em-none-eabi PROC=stm32l4x # none-stm32l4x1 Cortex-M4 //! //! Depending on the MCU connection to the computer, in the openocd command use //! export INTERFACE=stlink-v2 //! export INTERFACE=stlink-v2-1 - -//! A version of this example is reported at https://pdgilbert.github.io/eg_stm_hal/. +//! +//! Instruction and test results for HALs stm32f0xx, stm32f1xx, stm32f3xx, stm32f4xx, stm32f7xx, +//! stm32h7xx, stm32l0xx, stm32l1xx, and stm32l4xx are reported for fork branch all-devices-examples at +//! https://github.com/pdgilbert/rust-radio-sx127x/actions +//! +//! A version of this example is also reported at https://pdgilbert.github.io/eg_stm_hal/. //! The results reported there use current git versions of the MCU device hals, //! whereas the example here uses release versions of the MCU device hals. @@ -64,8 +55,6 @@ // See FREQUENCY below to set the channel. - - #![no_std] #![no_main] @@ -154,59 +143,6 @@ const CONFIG_RADIO: radio_sx127x::device::Config = radio_sx127x::device::Config // setup() does all hal/MCU specific setup and returns generic object for use in main code. -#[cfg(feature = "stm32f0xx")] // eg stm32f030xc -use stm32f0xx_hal::{ - delay::Delay, - pac::Peripherals, - prelude::*, - spi::{Error, Spi}, -}; - -#[cfg(feature = "stm32f0xx")] -fn setup() -> impl DelayMs + Transmit> { - // Infallible, Infallible reflect the error type on the spi and gpio traits. - - let cp = cortex_m::Peripherals::take().unwrap(); - let mut p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.configure().freeze(&mut p.FLASH); - - let gpioa = p.GPIOA.split(&mut rcc); - let gpiob = p.GPIOB.split(&mut rcc); - - let (sck, miso, mosi, _rst, pa1, pb8, pb9, pa0) = cortex_m::interrupt::free(move |cs| { - ( - gpioa.pa5.into_alternate_af0(cs), // sck on PA5 - gpioa.pa6.into_alternate_af0(cs), // miso on PA6 - gpioa.pa7.into_alternate_af0(cs), // mosi on PA7 - //gpioa.pa1.into_push_pull_output(cs), // cs on PA1 - gpiob.pb1.into_push_pull_output(cs), // reset on PB1 - gpioa.pa1.into_push_pull_output(cs), // CsPin on PA1 - gpiob.pb8.into_floating_input(cs), // BusyPin on PB8 DIO0 - gpiob.pb9.into_floating_input(cs), // ReadyPin on PB9 DIO1 - gpioa.pa0.into_push_pull_output(cs), // ResetPin on PA0 - ) - }); - - let spi = Spi::spi1(p.SPI1, (sck, miso, mosi), MODE, 8.mhz(), &mut rcc); - - let delay = Delay::new(cp.SYST, &rcc); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), - pa1.compat(), - pb8.compat(), - pb9.compat(), - pa0.compat(), - delay.compat(), - &CONFIG_RADIO, - ) - .unwrap(); // should handle error - - lora -} - #[cfg(feature = "stm32f1xx")] // eg blue pill stm32f103 use stm32f1xx_hal::{ delay::Delay, @@ -218,7 +154,7 @@ use stm32f1xx_hal::{ #[cfg(feature = "stm32f1xx")] fn setup() -> impl DelayMs + Transmit> { let cp = CorePeripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); + let p = Peripherals::take().unwrap(); let mut rcc = p.RCC.constrain(); let clocks = rcc @@ -263,72 +199,6 @@ fn setup() -> impl DelayMs + Transmit impl DelayMs + Transmit> { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - - let mut rcc = p.RCC.constrain(); - let clocks = rcc - .cfgr - .sysclk(64.mhz()) - .pclk1(32.mhz()) - .freeze(&mut p.FLASH.constrain().acr); - - let mut gpioa = p.GPIOA.split(&mut rcc.ahb); - let mut gpiob = p.GPIOB.split(&mut rcc.ahb); - - let spi = Spi::spi1( - p.SPI1, - ( - gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 - gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 - gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 - ), - MODE, - 8.mhz(), - clocks, - &mut rcc.apb2, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa - .pa1 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //CsPin on PA1 - gpiob - .pb8 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //BusyPin DIO0 on PB8 - gpiob - .pb9 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //ReadyPin DIO1 on PB9 - gpioa - .pa0 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - #[cfg(feature = "stm32f4xx")] // eg Nucleo-64 stm32f411, blackpill stm32f411, blackpill stm32f401 use stm32f4xx_hal::{ @@ -390,263 +260,6 @@ fn setup() -> impl DelayMs + Transmit impl DelayMs + Transmit> { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - - let mut rcc = p.RCC.constrain(); - - let gpioa = p.GPIOA.split(); - let gpiob = p.GPIOB.split(); - - let sck = gpioa.pa5.into_alternate_af5(); // sck on PA5 - let miso = gpioa.pa6.into_alternate_af5(); // miso on PA6 - let mosi = gpioa.pa7.into_alternate_af5(); // mosi on PA7 - - // somewhere 8.mhz needs to be set in spi - - let spi = Spi::new(p.SPI1, (sck, miso, mosi)).enable::(&mut rcc, ClockDivider::DIV32, MODE); - - let clocks = rcc.cfgr.sysclk(64.mhz()).pclk1(32.mhz()).freeze(); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - -#[cfg(feature = "stm32h7xx")] -use stm32h7xx_hal::{delay::Delay, pac::Peripherals, prelude::*, spi::Error, Never}; - -#[cfg(feature = "stm32h7xx")] -fn setup() -> impl DelayMs + Transmit> { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let pwr = p.PWR.constrain(); - let vos = pwr.freeze(); - let rcc = p.RCC.constrain(); - let ccdr = rcc.sys_ck(160.mhz()).freeze(vos, &p.SYSCFG); - let clocks = ccdr.clocks; - - let gpioa = p.GPIOA.split(ccdr.peripheral.GPIOA); - let gpiob = p.GPIOB.split(ccdr.peripheral.GPIOB); - - // following github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/spi.rs - let spi = p.SPI1.spi( - ( - gpioa.pa5.into_alternate_af5(), // sck on PA5 - gpioa.pa6.into_alternate_af5(), // miso on PA6 - gpioa.pa7.into_alternate_af5(), // mosi on PA7 - ), - MODE, - 8.mhz(), - ccdr.peripheral.SPI1, - &clocks, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - -#[cfg(feature = "stm32l0xx")] -use stm32l0xx_hal::{ - pac::Peripherals, - prelude::*, - rcc, // for ::Config but note name conflict with serial - spi::Error, -}; - -#[cfg(feature = "stm32l0xx")] -use void; - -#[cfg(feature = "stm32l0xx")] -fn setup() -> impl DelayMs + Transmit> { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.freeze(rcc::Config::hsi16()); - let gpioa = p.GPIOA.split(&mut rcc); - let gpiob = p.GPIOB.split(&mut rcc); - - // following github.com/stm32-rs/stm32l0xx-hal/blob/master/examples/spi.rs - let spi = p.SPI1.spi( - ( - gpioa.pa5, // sck on PA5 - gpioa.pa6, // miso on PA6 - gpioa.pa7, // mosi on PA7 - ), - MODE, - 8.mhz(), - &mut rcc, - ); - - let delay = cp.SYST.delay(rcc.clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa1.into_push_pull_output().compat(), //CsPin on PA1 - gpiob.pb8.into_floating_input().compat(), //BusyPin DIO0 on PB8 - gpiob.pb9.into_floating_input().compat(), //ReadyPin DIO1 on PB9 - gpioa.pa0.into_push_pull_output().compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - -#[cfg(feature = "stm32l1xx")] // eg Discovery kit stm32l100 and Heltec lora_node STM32L151CCU6 -use stm32l1xx_hal::{ - prelude::*, - rcc, // for ::Config but note name conflict with serial - spi::Error, - stm32::Peripherals, -}; - -#[cfg(feature = "stm32l1xx")] -fn setup() -> impl DelayMs + Transmit> { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut rcc = p.RCC.freeze(rcc::Config::hsi()); - - let gpioa = p.GPIOA.split(); - let gpiob = p.GPIOB.split(); - - let spi = p.SPI1.spi( - ( - gpioa.pa5, // sck on PA5 in board on Heltec - gpioa.pa6, // miso on PA6 in board on Heltec - gpioa.pa7, // mosi on PA7 in board on Heltec - ), - MODE, - 8.mhz(), - &mut rcc, - ); - - let delay = cp.SYST.delay(rcc.clocks); - - // Create lora radio instance - - // Heltec lora_node STM32L151CCU6 - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa.pa4.into_push_pull_output().compat(), //CsPin on PA4 in board on Heltec - gpiob.pb11.into_floating_input().compat(), //BusyPin DIO0 on PB11 in board on Heltec - gpiob.pb10.into_floating_input().compat(), //ReadyPin DIO1 on PB10 in board on Heltec - gpioa.pa3.into_push_pull_output().compat(), //ResetPin on PA3 in board on Heltec - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - -#[cfg(feature = "stm32l4xx")] -use stm32l4xx_hal::{ - delay::Delay, - pac::Peripherals, - prelude::*, - spi::{Error, Spi}, -}; - -#[cfg(feature = "stm32l4xx")] -fn setup() -> impl DelayMs + Transmit> { - let cp = cortex_m::Peripherals::take().unwrap(); - let p = Peripherals::take().unwrap(); - let mut flash = p.FLASH.constrain(); - let mut rcc = p.RCC.constrain(); - let mut pwr = p.PWR.constrain(&mut rcc.apb1r1); - let clocks = rcc - .cfgr - .sysclk(80.mhz()) - .pclk1(80.mhz()) - .pclk2(80.mhz()) - .freeze(&mut flash.acr, &mut pwr); - - let mut gpioa = p.GPIOA.split(&mut rcc.ahb2); - let mut gpiob = p.GPIOB.split(&mut rcc.ahb2); - - let spi = Spi::spi1( - p.SPI1, - ( - gpioa.pa5.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // sck on PA5 - gpioa.pa6.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // miso on PA6 - gpioa.pa7.into_af5(&mut gpioa.moder, &mut gpioa.afrl), // mosi on PA7 - ), - MODE, - 8.mhz(), - clocks, - &mut rcc.apb2, - ); - - let delay = Delay::new(cp.SYST, clocks); - - // Create lora radio instance - - let lora = Sx127x::spi( - spi.compat(), //Spi - gpioa - .pa1 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //CsPin on PA1 - gpiob - .pb8 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //BusyPin DIO0 on PB8 - gpiob - .pb9 - .into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr) - .compat(), //ReadyPin DIO1 on PB9 - gpioa - .pa0 - .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper) - .compat(), //ResetPin on PA0 - delay.compat(), //Delay - &CONFIG_RADIO, //&Config - ) - .unwrap(); // should handle error - - lora -} - // End of hal/MCU specific setup. Following should be generic code. #[entry] From 27d56e16bf5c0b557143c06273ac6176ed720695 Mon Sep 17 00:00:00 2001 From: Paul Gilbert Date: Mon, 22 Mar 2021 15:42:49 -0400 Subject: [PATCH 5/6] cleaned up workflow for reduced number of device crate examples. --- .github/workflows/rust.yml | 38 ++------------------------------------ 1 file changed, 2 insertions(+), 36 deletions(-) diff --git a/.github/workflows/rust.yml b/.github/workflows/rust.yml index a8bc780..e9651da 100644 --- a/.github/workflows/rust.yml +++ b/.github/workflows/rust.yml @@ -2,7 +2,7 @@ name: Rust on: push: - branches: [ master, testing-e-h_0.2.4, examples-testing ] + branches: [ master] tags: [ 'v*' ] pull_request: branches: [ master ] @@ -133,48 +133,14 @@ jobs: continue-on-error: true strategy: matrix: - mcu: [stm32f042, stm32f030xc, stm32f103, stm32f100, stm32f101, stm32f303xc, - stm32f401, stm32f411, stm32h742, stm32l0x2, stm32l100, stm32l151, stm32l4x2, ] + mcu: [stm32f103, stm32f411 ] include: - - mcu: stm32f042 - hal: "stm32f0xx" - trg: "thumbv6m-none-eabi" - - mcu: stm32f030xc - hal: "stm32f0xx" - trg: "thumbv6m-none-eabi" - - mcu: stm32f100 - hal: "stm32f1xx" - trg: "thumbv7m-none-eabi" - - mcu: stm32f101 - hal: "stm32f1xx" - trg: "thumbv7m-none-eabi" - mcu: stm32f103 hal: "stm32f1xx" trg: "thumbv7m-none-eabi" - - mcu: stm32f303xc - hal: "stm32f3xx" - trg: "thumbv7em-none-eabihf" - - mcu: stm32f401 - hal: "stm32f4xx" - trg: "thumbv7em-none-eabihf" - mcu: stm32f411 hal: "stm32f4xx" trg: "thumbv7em-none-eabihf" - - mcu: stm32h742 - hal: "stm32h7xx" - trg: "thumbv7em-none-eabihf" - - mcu: stm32l0x2 - hal: "stm32l0xx" - trg: "thumbv6m-none-eabi" - - mcu: stm32l100 - hal: "stm32l1xx" - trg: "thumbv7m-none-eabi" - - mcu: stm32l151 - hal: "stm32l1xx" - trg: "thumbv7m-none-eabi" - - mcu: stm32l4x2 - hal: "stm32l4xx" - trg: "thumbv7em-none-eabi" steps: - uses: actions/checkout@v2 - uses: actions-rs/toolchain@v1 From 212f678ca1225bad016e5e8f283d6f9fb08f8976 Mon Sep 17 00:00:00 2001 From: Paul Gilbert Date: Wed, 26 May 2021 15:08:09 -0400 Subject: [PATCH 6/6] update to heapless 0.7.0 used in example lora_spi_gps. --- examples/lora_spi_gps.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/lora_spi_gps.rs b/examples/lora_spi_gps.rs index dd5e78d..488bfef 100644 --- a/examples/lora_spi_gps.rs +++ b/examples/lora_spi_gps.rs @@ -31,7 +31,7 @@ use cortex_m_rt::entry; use cortex_m_semihosting::*; use nb::block; -use heapless::{consts, Vec}; +use heapless; use embedded_hal::blocking::delay::DelayMs; @@ -262,8 +262,8 @@ fn main() -> ! { let (mut _tx_gps, mut rx_gps, mut lora) = setup(); // GPS, lora (delay is available in lora) // byte buffer Nov 2020 limit data.len() < 255 in radio_sx127x .start_transmit - let mut buffer: Vec = Vec::new(); - let mut buf2: Vec = Vec::new(); + let mut buffer: heapless::Vec = heapless::Vec::new(); + let mut buf2: heapless::Vec = heapless::Vec::new(); //hprintln!("buffer at {} of {}", buffer.len(), buffer.capacity()).unwrap(); //0 of 80 //hprintln!("buf2 at {} of {}", buf2.len(), buf2.capacity()).unwrap(); //0 of 80