diff --git a/CHANGELOG.md b/CHANGELOG.md index e07ebc2d..318e4ed4 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +### Changed + +- Use new `asm!` instead of `llvm_asm!` + ## [v0.7.0] - 2020-07-29 ### Added diff --git a/src/asm.rs b/src/asm.rs index 79058cc0..3dca8ead 100644 --- a/src/asm.rs +++ b/src/asm.rs @@ -7,7 +7,7 @@ macro_rules! instruction { pub unsafe fn $fnname() { match () { #[cfg(all(riscv, feature = "inline-asm"))] - () => llvm_asm!($asm :::: "volatile"), + () => asm!($asm), #[cfg(all(riscv, not(feature = "inline-asm")))] () => { @@ -58,7 +58,7 @@ instruction!( pub unsafe fn sfence_vma(asid: usize, addr: usize) { match () { #[cfg(all(riscv, feature = "inline-asm"))] - () => llvm_asm!("sfence.vma $0, $1" :: "r"(asid), "r"(addr) :: "volatile"), + () => asm!("sfence.vma {0}, {1}", in(reg) asid, in(reg) addr), #[cfg(all(riscv, not(feature = "inline-asm")))] () => { diff --git a/src/lib.rs b/src/lib.rs index 3e748bcf..769c1cbf 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -14,7 +14,7 @@ //! - Wrappers around assembly instructions like `WFI`. #![no_std] -#![cfg_attr(feature = "inline-asm", feature(llvm_asm))] +#![cfg_attr(feature = "inline-asm", feature(asm))] extern crate bare_metal; extern crate bit_field; diff --git a/src/register/macros.rs b/src/register/macros.rs index e5bbeed1..368e18b8 100644 --- a/src/register/macros.rs +++ b/src/register/macros.rs @@ -7,7 +7,7 @@ macro_rules! read_csr { #[cfg(all(riscv, feature = "inline-asm"))] () => { let r: usize; - llvm_asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile"); + asm!("csrrs {0}, {1}, x0", out(reg) r, const $csr_number); r } @@ -36,7 +36,7 @@ macro_rules! read_csr_rv32 { #[cfg(all(riscv32, feature = "inline-asm"))] () => { let r: usize; - llvm_asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile"); + asm!("csrrs {0}, {1}, x0", out(reg) r, const $csr_number); r } @@ -102,7 +102,7 @@ macro_rules! write_csr { unsafe fn _write(bits: usize) { match () { #[cfg(all(riscv, feature = "inline-asm"))] - () => llvm_asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), + () => asm!("csrrw x0, {1}, {0}", in(reg) bits, const $csr_number), #[cfg(all(riscv, not(feature = "inline-asm")))] () => { @@ -128,7 +128,7 @@ macro_rules! write_csr_rv32 { unsafe fn _write(bits: usize) { match () { #[cfg(all(riscv32, feature = "inline-asm"))] - () => llvm_asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), + () => asm!("csrrw x0, {1}, {0}", in(reg) bits, const $csr_number), #[cfg(all(riscv32, not(feature = "inline-asm")))] () => { @@ -178,7 +178,7 @@ macro_rules! set { unsafe fn _set(bits: usize) { match () { #[cfg(all(riscv, feature = "inline-asm"))] - () => llvm_asm!("csrrs x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), + () => asm!("csrrs x0, {1}, {0}", in(reg) bits, const $csr_number), #[cfg(all(riscv, not(feature = "inline-asm")))] () => { @@ -204,7 +204,7 @@ macro_rules! clear { unsafe fn _clear(bits: usize) { match () { #[cfg(all(riscv, feature = "inline-asm"))] - () => llvm_asm!("csrrc x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), + () => asm!("csrrc x0, {1}, {0}", in(reg) bits, const $csr_number), #[cfg(all(riscv, not(feature = "inline-asm")))] () => {