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Add missing inline(always) and change more initialised->initialized
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2 files changed

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src/peripheral/cpuid.rs

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@@ -131,6 +131,7 @@ impl CPUID {
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/// caches that are controlled by the processor.
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///
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/// This is the `IminLine` field of the CTR register.
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#[inline(always)]
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pub fn cache_iminline() -> u32 {
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const CTR_IMINLINE_POS: u32 = 0;
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const CTR_IMINLINE_MASK: u32 = 0xF << CTR_IMINLINE_POS;

src/peripheral/scb.rs

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@@ -531,9 +531,9 @@ impl SCB {
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///
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/// After invalidating, the next read of invalidated data will be from main memory. This may
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/// cause recent writes to be lost, potentially including writes that initialized objects.
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/// Therefore, this method may cause uninitialised memory or invalid values to be read,
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/// Therefore, this method may cause uninitialized memory or invalid values to be read,
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/// resulting in undefined behaviour. You must ensure that main memory contains valid and
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/// initialised values before invalidating.
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/// initialized values before invalidating.
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///
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/// `addr` **must** be aligned to the size of the cache lines, and `size` **must** be a
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/// multiple of the cache line size, otherwise this function will invalidate other memory,
@@ -598,10 +598,10 @@ impl SCB {
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/// # Safety
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///
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/// After invalidating, `obj` will be read from main memory on next access. This may cause
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/// recent writes to `obj` to be lost, potentially including the write that initialised it.
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/// Therefore, this method may cause uninitialised memory or invalid values to be read,
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/// recent writes to `obj` to be lost, potentially including the write that initialized it.
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/// Therefore, this method may cause uninitialized memory or invalid values to be read,
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/// resulting in undefined behaviour. You must ensure that main memory contains a valid and
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/// initialised value for T before invalidating `obj`.
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/// initialized value for T before invalidating `obj`.
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///
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/// `obj` **must** be aligned to the size of the cache lines, and its size **must** be a
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/// multiple of the cache line size, otherwise this function will invalidate other memory,
@@ -636,10 +636,10 @@ impl SCB {
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/// # Safety
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///
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/// After invalidating, `slice` will be read from main memory on next access. This may cause
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/// recent writes to `slice` to be lost, potentially including the write that initialised it.
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/// Therefore, this method may cause uninitialised memory or invalid values to be read,
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/// recent writes to `slice` to be lost, potentially including the write that initialized it.
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/// Therefore, this method may cause uninitialized memory or invalid values to be read,
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/// resulting in undefined behaviour. You must ensure that main memory contains valid and
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/// initialised values for T before invalidating `slice`.
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/// initialized values for T before invalidating `slice`.
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///
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/// `slice` **must** be aligned to the size of the cache lines, and its size **must** be a
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/// multiple of the cache line size, otherwise this function will invalidate other memory,

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