v0.1.2

Author: japaric

CHANGELOG.md

@@ -7,6 +7,12 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+## [v0.1.2] - 2017-04-22
+
+### Changed
+
+- Unclutter the `reset_handler` function for a better debugging experience.
+
 ## [v0.1.1] - 2017-04-15
 
 ### Changed
@@ -17,5 +23,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 Initial release
 
-[Unreleased]: https://github.com/japaric/cortex-m-rt/compare/v0.1.1...HEAD
+[Unreleased]: https://github.com/japaric/cortex-m-rt/compare/v0.1.2...HEAD
+[v0.1.2]: https://github.com/japaric/cortex-m-rt/compare/v0.1.1...v0.1.2
 [v0.1.1]: https://github.com/japaric/cortex-m-rt/compare/v0.1.0...v0.1.1

Cargo.toml

@@ -6,7 +6,7 @@ keywords = ["arm", "cortex-m", "runtime", "startup"]
 license = "MIT OR Apache-2.0"
 name = "cortex-m-rt"
 repository = "https://github.com/japaric/cortex-m-rt"
-version = "0.1.1"
+version = "0.1.2"
 
 [dependencies]
 r0 = "0.2.1"

src/lib.rs

@@ -163,34 +163,35 @@ mod lang_items;
 #[cfg(feature = "exceptions")]
 use cortex_m::exception;
 
+extern "C" {
+    // NOTE `rustc` forces this signature on us. See `src/lang_items.rs`
+    fn main(argc: isize, argv: *const *const u8) -> isize;
+
+    // Boundaries of the .bss section
+    static mut _ebss: u32;
+    static mut _sbss: u32;
+
+    // Boundaries of the .data section
+    static mut _edata: u32;
+    static mut _sdata: u32;
+
+    // Initial values of the .data section (stored in Flash)
+    static _sidata: u32;
+}
+
 /// The reset handler
 ///
 /// This is the entry point of all programs
 unsafe extern "C" fn reset_handler() -> ! {
-    extern "C" {
-        static mut _ebss: u32;
-        static mut _sbss: u32;
-
-        static mut _edata: u32;
-        static mut _sdata: u32;
-
-        static _sidata: u32;
-    }
-
     ::r0::zero_bss(&mut _sbss, &mut _ebss);
     ::r0::init_data(&mut _sdata, &mut _edata, &_sidata);
 
-    // NOTE `rustc` forces this signature on us. See `src/lang_items.rs`
-    extern "C" {
-        fn main(argc: isize, argv: *const *const u8) -> isize;
-    }
-
-    // Neither `argc` or `argv` make sense in bare metal contexts so we just
+    // Neither `argc` or `argv` make sense in bare metal context so we just
     // stub them
     main(0, ::core::ptr::null());
 
-    // If `main` returns, then we go into "reactive" mode and attend interrupts
-    // as they occur.
+    // If `main` returns, then we go into "reactive" mode and simply attend
+    // interrupts as they occur.
     loop {
         #[cfg(target_arch = "arm")]
         asm!("wfi" :::: "volatile");