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drop linker-flavor, port more examples
1 parent 0e2ec97 commit 8e79d05

12 files changed

+246
-154
lines changed

.cargo/config

+8-20
Original file line numberDiff line numberDiff line change
@@ -1,39 +1,27 @@
11
[target.thumbv6m-none-eabi]
22
runner = 'arm-none-eabi-gdb'
33
rustflags = [
4-
"-C", "link-arg=-Tlink.x",
5-
"-C", "linker=lld",
6-
"-Z", "linker-flavor=ld.lld",
7-
# "-C", "linker=arm-none-eabi-ld",
8-
# "-Z", "linker-flavor=ld",
4+
"-C", "link-arg=-Wl,-Tlink.x",
5+
"-C", "link-arg=-nostartfiles",
96
]
107

118
[target.thumbv7m-none-eabi]
129
runner = 'arm-none-eabi-gdb'
1310
rustflags = [
14-
"-C", "link-arg=-Tlink.x",
15-
"-C", "linker=lld",
16-
"-Z", "linker-flavor=ld.lld",
17-
# "-C", "linker=arm-none-eabi-ld",
18-
# "-Z", "linker-flavor=ld",
11+
"-C", "link-arg=-Wl,-Tlink.x",
12+
"-C", "link-arg=-nostartfiles",
1913
]
2014

2115
[target.thumbv7em-none-eabi]
2216
runner = 'arm-none-eabi-gdb'
2317
rustflags = [
24-
"-C", "link-arg=-Tlink.x",
25-
"-C", "linker=lld",
26-
"-Z", "linker-flavor=ld.lld",
27-
# "-C", "linker=arm-none-eabi-ld",
28-
# "-Z", "linker-flavor=ld",
18+
"-C", "link-arg=-Wl,-Tlink.x",
19+
"-C", "link-arg=-nostartfiles",
2920
]
3021

3122
[target.thumbv7em-none-eabihf]
3223
runner = 'arm-none-eabi-gdb'
3324
rustflags = [
34-
"-C", "link-arg=-Tlink.x",
35-
"-C", "linker=lld",
36-
"-Z", "linker-flavor=ld.lld",
37-
# "-C", "linker=arm-none-eabi-ld",
38-
# "-Z", "linker-flavor=ld",
25+
"-C", "link-arg=-Wl,-Tlink.x",
26+
"-C", "link-arg=-nostartfiles",
3927
]

.gitignore

+1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
**/*.rs.bk
2+
.#*
23
.gdb_history
34
Cargo.lock
45
target/

Cargo.toml

+9-4
Original file line numberDiff line numberDiff line change
@@ -9,15 +9,20 @@ repository = "https://github.com/japaric/cortex-m-quickstart"
99
version = "0.2.7"
1010

1111
[dependencies]
12-
# cortex-m = "0.4.0"
13-
# cortex-m-rt = "0.4.0"
12+
# cortex-m-rt = "0.5.0"
1413
cortex-m-rt = { git = "https://github.com/japaric/cortex-m-rt", branch = "stable" }
15-
# panic-loop = { path = "../panic-loop" }
1614
panic-abort = "0.1.1"
17-
# panic-semihosting = "0.1.0"
15+
# panic-semihosting = "0.1.1"
16+
panic-semihosting = { git = "https://github.com/japaric/panic-semihosting", branch = "stable" }
1817
# Uncomment for the allocator example.
1918
#alloc-cortex-m = "0.3.3"
2019

20+
[dependencies.cortex-m]
21+
branch = "stable"
22+
default-features = false
23+
git = "https://github.com/japaric/cortex-m"
24+
# version = "0.4.4"
25+
2126
[dependencies.cortex-m-semihosting]
2227
default-features = false
2328
version = "0.2.1"

ci/script.sh

+2-1
Original file line numberDiff line numberDiff line change
@@ -17,8 +17,9 @@ EOF
1717

1818
local examples=(
1919
crash
20+
exception
2021
hello
21-
override-exception-handler
22+
minimal
2223
panic
2324
)
2425
for ex in "${examples[@]}"; do

examples/crash.rs

+69-43
Original file line numberDiff line numberDiff line change
@@ -8,78 +8,104 @@
88
//! debugger using these commands:
99
//!
1010
//! ``` text
11+
//! (gdb) continue
12+
//! Program received signal SIGTRAP, Trace/breakpoint trap.
13+
//! __bkpt () at asm/bkpt.s:3
14+
//! 3 bkpt
15+
//!
16+
//! (gdb) finish
17+
//! Run till exit from #0 __bkpt () at asm/bkpt.s:3
18+
//! Note: automatically using hardware breakpoints for read-only addresses.
19+
//! crash::hf (_ef=0x20004fa0) at examples/crash.rs:102
20+
//! 99 asm::bkpt();
21+
//!
1122
//! (gdb) # Exception frame = program state during the crash
12-
//! (gdb) print/x *ef
13-
//! $1 = cortex_m::exception::ExceptionFrame {
14-
//! r0 = 0x2fffffff,
15-
//! r1 = 0x2fffffff,
16-
//! r2 = 0x0,
17-
//! r3 = 0x0,
18-
//! r12 = 0x0,
19-
//! lr = 0x8000481,
20-
//! pc = 0x8000460,
21-
//! xpsr = 0x61000000,
23+
//! (gdb) print/x *_ef
24+
//! $1 = cortex_m_rt::ExceptionFrame {
25+
//! r0: 0x2fffffff,
26+
//! r1: 0x2fffffff,
27+
//! r2: 0x80006b0,
28+
//! r3: 0x80006b0,
29+
//! r12: 0x20000000,
30+
//! lr: 0x800040f,
31+
//! pc: 0x800066a,
32+
//! xpsr: 0x61000000
2233
//! }
2334
//!
2435
//! (gdb) # Where did we come from?
2536
//! (gdb) backtrace
26-
//! #0 cortex_m_rt::default_handler (ef=0x20004f54) at (..)
27-
//! #1 <signal handler called>
28-
//! #2 0x08000460 in core::ptr::read_volatile<u32> (src=0x2fffffff) at (..)
29-
//! #3 0x08000480 in crash::main () at examples/crash.rs:68
37+
//! #0 crash::hf (_ef=0x20004fa0) at examples/crash.rs:102
38+
//! #1 0x080004ac in UserHardFault (ef=0x20004fa0) at <exception macros>:9
39+
//! #2 <signal handler called>
40+
//! #3 0x0800066a in core::ptr::read_volatile (src=0x2fffffff) at /checkout/src/libcore/ptr.rs:452
41+
//! #4 0x0800040e in crash::main () at examples/crash.rs:85
42+
//! #5 0x08000456 in main () at <main macros>:3
3043
//!
3144
//! (gdb) # Nail down the location of the crash
32-
//! (gdb) disassemble/m ef.pc
33-
//! Dump of assembler code for function core::ptr::read_volatile<u32>:
34-
//! 408 pub unsafe fn read_volatile<T>(src: *const T) -> T {
35-
//! 0x08000454 <+0>: sub sp, #20
36-
//! 0x08000456 <+2>: mov r1, r0
37-
//! 0x08000458 <+4>: str r0, [sp, #8]
38-
//! 0x0800045a <+6>: ldr r0, [sp, #8]
39-
//! 0x0800045c <+8>: str r0, [sp, #12]
45+
//! (gdb) disassemble/m _ef.pc
46+
//! Dump of assembler code for function core::ptr::read_volatile:
47+
//! 451 pub unsafe fn read_volatile<T>(src: *const T) -> T {}
48+
//! 0x08000662 <+0>: sub sp, #16
49+
//! 0x08000664 <+2>: mov r1, r0
50+
//! 0x08000666 <+4>: str r0, [sp, #8]
4051
//!
41-
//! 409 intrinsics::volatile_load(src)
42-
//! 0x0800045e <+10>: ldr r0, [sp, #12]
43-
//! 0x08000460 <+12>: ldr r0, [r0, #0]
44-
//! 0x08000462 <+14>: str r0, [sp, #16]
45-
//! 0x08000464 <+16>: ldr r0, [sp, #16]
46-
//! 0x08000466 <+18>: str r1, [sp, #4]
47-
//! 0x08000468 <+20>: str r0, [sp, #0]
48-
//! 0x0800046a <+22>: b.n 0x800046c <core::ptr::read_volatile<u32>+24>
52+
//! 452 intrinsics::volatile_load(src)
53+
//! 0x08000668 <+6>: ldr r0, [sp, #8]
54+
//! 0x0800066a <+8>: ldr r0, [r0, #0]
55+
//! 0x0800066c <+10>: str r0, [sp, #12]
56+
//! 0x0800066e <+12>: ldr r0, [sp, #12]
57+
//! 0x08000670 <+14>: str r1, [sp, #4]
58+
//! 0x08000672 <+16>: str r0, [sp, #0]
59+
//! 0x08000674 <+18>: b.n 0x8000676 <core::ptr::read_volatile+20>
4960
//!
50-
//! 410 }
51-
//! 0x0800046c <+24>: ldr r0, [sp, #0]
52-
//! 0x0800046e <+26>: add sp, #20
53-
//! 0x08000470 <+28>: bx lr
61+
//! 453 }
62+
//! 0x08000676 <+20>: ldr r0, [sp, #0]
63+
//! 0x08000678 <+22>: add sp, #16
64+
//! 0x0800067a <+24>: bx lr
5465
//!
5566
//! End of assembler dump.
5667
//! ```
5768
//!
5869
//! ---
5970
60-
#![feature(used)]
71+
#![no_main]
6172
#![no_std]
6273

6374
extern crate cortex_m;
64-
extern crate cortex_m_rt;
75+
#[macro_use]
76+
extern crate cortex_m_rt as rt;
6577
extern crate panic_abort; // panicking behavior
6678

6779
use core::ptr;
6880

6981
use cortex_m::asm;
82+
use rt::ExceptionFrame;
83+
84+
main!(main);
7085

71-
fn main() {
72-
// Read an invalid memory address
86+
#[inline(always)]
87+
fn main() -> ! {
7388
unsafe {
7489
ptr::read_volatile(0x2FFF_FFFF as *const u32);
7590
}
91+
92+
loop {}
93+
}
94+
95+
exception!(DefaultHandler, dh);
96+
97+
#[inline(always)]
98+
fn dh(_nr: u8) {
99+
asm::bkpt();
76100
}
77101

78-
// As we are not using interrupts, we just register a dummy catch all handler
79-
#[link_section = ".vector_table.interrupts"]
80-
#[used]
81-
static INTERRUPTS: [extern "C" fn(); 240] = [default_handler; 240];
102+
exception!(HardFault, hf);
82103

83-
extern "C" fn default_handler() {
104+
#[inline(always)]
105+
fn hf(_ef: &ExceptionFrame) -> ! {
84106
asm::bkpt();
107+
108+
loop {}
85109
}
110+
111+
interrupts!(DefaultHandler);

examples/exception.rs

+69
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,69 @@
1+
//! Overriding an exception handler
2+
//!
3+
//! You can override an exception handler using the [`exception!`][1] macro.
4+
//!
5+
//! [1]: https://docs.rs/cortex-m-rt/0.5.0/cortex_m_rt/macro.exception.html
6+
//!
7+
//! ---
8+
9+
#![deny(unsafe_code)]
10+
#![no_main]
11+
#![no_std]
12+
13+
extern crate cortex_m;
14+
#[macro_use]
15+
extern crate cortex_m_rt as rt;
16+
extern crate cortex_m_semihosting as sh;
17+
extern crate panic_abort;
18+
19+
use core::fmt::Write;
20+
21+
use cortex_m::peripheral::syst::SystClkSource;
22+
use cortex_m::{asm, Peripherals};
23+
use rt::ExceptionFrame;
24+
use sh::hio::{self, HStdout};
25+
26+
main!(main);
27+
28+
fn main() -> ! {
29+
let p = Peripherals::take().unwrap();
30+
let mut syst = p.SYST;
31+
32+
syst.set_clock_source(SystClkSource::Core);
33+
syst.set_reload(8_000_000); // 1s
34+
syst.enable_counter();
35+
syst.enable_interrupt();
36+
37+
loop {}
38+
}
39+
40+
// try commenting out this line: you'll end in `deh` instead of in `sys_tick`
41+
exception!(SysTick, sys_tick, state: Option<HStdout> = None);
42+
43+
fn sys_tick(state: &mut Option<HStdout>) {
44+
if state.is_none() {
45+
*state = Some(hio::hstdout().unwrap());
46+
}
47+
48+
if let Some(hstdout) = state.as_mut() {
49+
hstdout.write_str(".").unwrap();
50+
}
51+
}
52+
53+
exception!(DefaultHandler, deh);
54+
55+
#[inline(always)]
56+
fn deh(_nr: u8) {
57+
asm::bkpt();
58+
}
59+
60+
exception!(HardFault, hf);
61+
62+
#[inline(always)]
63+
fn hf(_ef: &ExceptionFrame) -> ! {
64+
asm::bkpt();
65+
66+
loop {}
67+
}
68+
69+
interrupts!(DefaultHandler);

examples/hello.rs

+15-3
Original file line numberDiff line numberDiff line change
@@ -2,17 +2,19 @@
22
//!
33
//! ---
44
5-
#![feature(asm)]
65
#![no_main]
76
#![no_std]
87

8+
extern crate cortex_m;
99
#[macro_use]
10-
extern crate cortex_m_rt;
10+
extern crate cortex_m_rt as rt;
1111
extern crate cortex_m_semihosting as sh;
1212
extern crate panic_abort; // panicking behavior
1313

1414
use core::fmt::Write;
1515

16+
use cortex_m::asm;
17+
use rt::ExceptionFrame;
1618
use sh::hio;
1719

1820
main!(main);
@@ -26,7 +28,17 @@ fn main() -> ! {
2628

2729
exception!(DefaultHandler, dh);
2830

29-
fn dh(_nr: u8) -> ! {
31+
#[inline(always)]
32+
fn dh(_nr: u8) {
33+
asm::bkpt();
34+
}
35+
36+
exception!(HardFault, hf);
37+
38+
#[inline(always)]
39+
fn hf(_ef: &ExceptionFrame) -> ! {
40+
asm::bkpt();
41+
3042
loop {}
3143
}
3244

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