Fixed bitfield typo in SPI cr2 register for py32f002b

gpgreen · creatoy · commit 7056d6bf21c2 · 2024-11-22T11:10:49.000+08:00
diff --git a/devices/common_patches/spi_f002b.yaml b/devices/common_patches/spi_f002b.yaml
@@ -0,0 +1,6 @@
+# Rename DDF field in CR1 to DFF to match datasheet
+CR1:
+  _modify:
+    DDF:
+      name: DFF
+      description: desc DFF
diff --git a/devices/py32f002b.yaml b/devices/py32f002b.yaml
@@ -3,6 +3,7 @@ _svd: ../svd/py32f002b.svd
 "SPI*":
   _include:
     - common_patches/spi_dr8.yaml
+    - common_patches/spi_f002b.yaml
 
 "USART*":
   _include:
