fix: update HCI interface to propagate Fifo Depth parameter. Fixes combinational loop when iDMA reads and writes to and from TCDM with 2 backends; bumb lock versions

Signed-off-by: Daniel Keller <daniel.kellermartinez@csem.ch>

Author: DanielKellerM

Bender.lock

@@ -122,7 +122,7 @@ packages:
     dependencies:
     - common_cells
   hci:
-    revision: 5421524afca701e45a83d0f1ec47568c019e021a
+    revision: 0faa4f3cdfc87ead4a10e5c307c00aa6c4504d0d
     version: null
     source:
       Git: https://github.com/pulp-platform/hci.git
@@ -198,7 +198,7 @@ packages:
     dependencies:
     - common_cells
   neureka:
-    revision: ff7090eb3738a5192af0f4e1499e4ed44a3041e5
+    revision: 5ff2b6bc0a04de07eb2549a599655fb6d7f99c58
     version: null
     source:
       Git: https://github.com/pulp-platform/neureka.git

rtl/cluster_interconnect_wrap.sv

@@ -92,7 +92,8 @@ module cluster_interconnect_wrap
         .UW(HCI_HWPE_SIZE.UW),
         .IW(HCI_HWPE_SIZE.IW),
         .EW(HCI_HWPE_SIZE.EW),
-        .EHW(HCI_HWPE_SIZE.EHW)
+        .EHW(HCI_HWPE_SIZE.EHW),
+        .FD(HCI_HWPE_SIZE.FD)
       )
       s_hwpe_intc [0:N_HCI_HWPE_PORTS-1] (
         .clk(clk_i)
@@ -105,7 +106,8 @@ module cluster_interconnect_wrap
         .UW(HCI_HWPE_SIZE.UW),
         .IW(HCI_HWPE_SIZE.IW),
         .EW(HCI_HWPE_SIZE.EW),
-        .EHW(HCI_CORE_SIZE.EHW)
+        .EHW(HCI_CORE_SIZE.EHW),
+        .FD(HCI_DMA_SIZE.FD)
       )
       s_dma_intc [0:N_HCI_DMA_PORTS-1] (
         .clk(clk_i)
@@ -144,7 +146,6 @@ module cluster_interconnect_wrap
           .N_MEM  ( NB_TCDM_BANKS            ),
           .IW     ( TCDM_ID_WIDTH            ),
           .TS_BIT ( TEST_SET_BIT             ),
-          .EXPFIFO ( 2                      ),
           .FILTER_WRITE_R_VALID ( HCI_FILTER_WRITE_R_VALID ),
           //For an explanation of these macros refer to https://github.com/pulp-platform/hci/blob/v2.1.1/rtl/common/hci_helpers.svh
           .`HCI_SIZE_PARAM(cores) ( HCI_CORE_SIZE ),
@@ -178,7 +179,6 @@ module cluster_interconnect_wrap
           .N_MEM  ( NB_TCDM_BANKS            ),
           .IW     ( TCDM_ID_WIDTH            ),
           .TS_BIT ( TEST_SET_BIT             ),
-          .EXPFIFO ( 0                      ),
           .`HCI_SIZE_PARAM(cores) ( HCI_CORE_SIZE ),
           .`HCI_SIZE_PARAM(mems)  ( HCI_MEM_SIZE  ),
           .`HCI_SIZE_PARAM(hwpe)  ( HCI_HWPE_SIZE )

rtl/pulp_cluster.sv

@@ -383,7 +383,8 @@ localparam hci_package::hci_size_parameter_t HciCoreSizeParam = '{
   UW:  DEFAULT_UW,
   IW:  DEFAULT_IW,
   EW:  DEFAULT_EW,
-  EHW: DEFAULT_EHW
+  EHW: DEFAULT_EHW,
+  FD:  0
 };
 localparam hci_package::hci_size_parameter_t HciHwpeSizeParam = '{
   DW:  Cfg.HwpeNumPorts * DataWidth,
@@ -392,7 +393,8 @@ localparam hci_package::hci_size_parameter_t HciHwpeSizeParam = '{
   UW:  DEFAULT_UW,
   IW:  DEFAULT_IW,
   EW:  (Cfg.ECCInterco) ? HWPEParityWidth : DEFAULT_EW,
-  EHW: DEFAULT_EHW
+  EHW: DEFAULT_EHW,
+  FD:  2
 };
 localparam hci_package::hci_size_parameter_t HciDmaSizeParam = '{
   DW:  DMA_HCI_DATA_WIDTH,
@@ -401,14 +403,16 @@ localparam hci_package::hci_size_parameter_t HciDmaSizeParam = '{
   UW:  DEFAULT_UW,
   IW:  DEFAULT_IW,
   EW:  DEFAULT_EW,
-  EHW: DEFAULT_EHW
+  EHW: DEFAULT_EHW,
+  FD:  0
 };
 
 /* logarithmic and peripheral interconnect interfaces */
 // ext -> log interconnect
 hci_core_intf #(
   .DW ( HciCoreSizeParam.DW ),
-  .AW ( HciCoreSizeParam.AW )
+  .AW ( HciCoreSizeParam.AW ),
+  .FD ( HciCoreSizeParam.FD )
 ) s_hci_ext[0:`NB_EXT-1] (
   .clk ( clk_i )
 );
@@ -422,7 +426,8 @@ XBAR_PERIPH_BUS s_hwpe_cfg_bus();
 // DMA -> (optionally) size converter
 hci_core_intf #(
   .DW ( HciDmaSizeParam.DW ),
-  .AW ( HciDmaSizeParam.AW )
+  .AW ( HciDmaSizeParam.AW ),
+  .FD ( HciDmaSizeParam.FD )
 ) s_hci_dma[0:Cfg.DmaNumPlugs-1] (
   .clk ( clk_i )
 );
@@ -438,13 +443,15 @@ hci_core_intf #(
   .DW   ( HciHwpeSizeParam.DW  ),
   .AW   ( HciHwpeSizeParam.AW  ),
   .EW   ( HciHwpeSizeParam.EW  ),
-  .EHW  ( HciHwpeSizeParam.EHW )
+  .EHW  ( HciHwpeSizeParam.EHW ),
+  .FD   ( HciHwpeSizeParam.FD  )
 ) s_hci_hwpe [0:0] (
   .clk ( clk_i )
 );
 hci_core_intf #(
   .DW ( HciCoreSizeParam.DW ),
-  .AW ( HciCoreSizeParam.AW )
+  .AW ( HciCoreSizeParam.AW ),
+  .FD ( HciCoreSizeParam.FD )
 ) s_hci_core [0:Cfg.NumCores-1] (
   .clk ( clk_i )
 );
@@ -472,7 +479,8 @@ XBAR_TCDM_BUS s_debug_bus[Cfg.NumCores-1:0]();
 // FIXME: iDMA
 hci_core_intf #(
   .DW ( HciCoreSizeParam.DW ),
-  .AW ( HciCoreSizeParam.AW )
+  .AW ( HciCoreSizeParam.AW ),
+  .FD ( HciCoreSizeParam.FD )
 ) s_core_dmactrl_bus [0:Cfg.NumCores-1] (
   .clk ( clk_i )
 );
@@ -518,7 +526,8 @@ localparam hci_package::hci_size_parameter_t HciMemSizeParam = '{
   UW:  DEFAULT_UW,
   IW:  TCDM_ID_WIDTH,
   EW:  (Cfg.ECCInterco) ? ParityWidth+MetaParityWidth : DEFAULT_EW,
-  EHW: DEFAULT_EHW
+  EHW: DEFAULT_EHW,
+  FD:  0
 };
 
 // log interconnect -> TCDM memory banks (SRAM)
@@ -787,7 +796,6 @@ cluster_interconnect_wrap #(
   .HCI_HWPE_SIZE          ( HciHwpeSizeParam                ),
   .HCI_DMA_SIZE           ( HciDmaSizeParam                 ),
   .HCI_MEM_SIZE           ( HciMemSizeParam                 )
-
 ) cluster_interconnect_wrap_i (
   .clk_i              ( clk_i                                     ),
   .rst_ni             ( rst_ni                                    ),