40
40
41
41
// Instruction descriptors
42
42
43
- #define INSTR_ANDN 0x00000000
44
- #define INSTR_BEXTR 0x10000000
45
- #define INSTR_BLSI 0x20000000
46
- #define INSTR_BLSMSK 0x30000000
47
- #define INSTR_BLSR 0x40000000
48
- #define INSTR_LZCNT 0x50000000
49
- #define INSTR_POPCNT 0x60000000
50
- #define INSTR_TZCNT 0x70000000
51
- #define INSTR_DEBUG 0xFFFFFFFE
52
- #define INSTR_UNKNOWN 0xFFFFFFFF
43
+ #define INSTR_VVVV_USED 0x0001
44
+ #define INSTR_16BIT 0x0002
45
+ #define INSTR_SRC1_VVVV 0x0010
46
+ #define INSTR_SRC1_RM 0x0020
47
+ #define INSTR_SRC2_VVVV 0x0100
48
+ #define INSTR_SRC2_RM 0x0200
49
+ #define INSTR_DEST_VVVV 0x1000
50
+ #define INSTR_DEST_REG 0x2000
51
+
52
+
53
+ #define INSTR_ANDN (0x00000000 | INSTR_VVVV_USED | INSTR_SRC1_VVVV | INSTR_SRC2_RM | INSTR_DEST_REG)
54
+ #define INSTR_BEXTR (0x10000000 | INSTR_VVVV_USED | INSTR_SRC1_RM | INSTR_SRC2_VVVV | INSTR_DEST_REG)
55
+ #define INSTR_BLSI (0x20000000 | INSTR_VVVV_USED | INSTR_SRC1_RM | INSTR_DEST_VVVV)
56
+ #define INSTR_BLSMSK (0x30000000 | INSTR_VVVV_USED | INSTR_SRC1_RM | INSTR_DEST_VVVV)
57
+ #define INSTR_BLSR (0x40000000 | INSTR_VVVV_USED | INSTR_SRC1_RM | INSTR_DEST_VVVV)
58
+ #define INSTR_LZCNT (0x50000000 | INSTR_16BIT | INSTR_SRC1_RM | INSTR_DEST_REG)
59
+ #define INSTR_POPCNT (0x60000000 | INSTR_16BIT | INSTR_SRC1_RM | INSTR_DEST_REG)
60
+ #define INSTR_TZCNT (0x70000000 | INSTR_16BIT | INSTR_SRC1_RM | INSTR_DEST_REG)
61
+ #define INSTR_DEBUG (0xE0000000)
62
+ #define INSTR_UNKNOWN (0xF0000000)
0 commit comments