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Merge pull request #705 from uyjulian/eeconf_impl
Implementation of eeconf module
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‎iop/system/Makefile‎

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SUBDIRS = \
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alloc \
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dmacman \
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eeconf \
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eesync \
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eesync-nano \
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excepman \

‎iop/system/eeconf/Makefile‎

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# _____ ___ ____ ___ ____
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# ____| | ____| | | |____|
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# | ___| |____ ___| ____| | \ PS2DEV Open Source Project.
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#-----------------------------------------------------------------------
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# Copyright ps2dev - http://www.ps2dev.org
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# Licenced under Academic Free License version 2.0
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# Review ps2sdk README & LICENSE files for further details.
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IOP_INCS += \
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-I$(PS2SDKSRC)/iop/system/loadcore/include \
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-I$(PS2SDKSRC)/iop/system/sysclib/include \
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-I$(PS2SDKSRC)/iop/system/sysmem/include
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IOP_OBJS = \
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eeconf.o \
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imports.o \
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exports.o
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include $(PS2SDKSRC)/Defs.make
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include $(PS2SDKSRC)/iop/Rules.bin.make
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include $(PS2SDKSRC)/iop/Rules.make
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include $(PS2SDKSRC)/iop/Rules.release

‎iop/system/eeconf/README.md‎

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# EE Configuration Module
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This module reads configuration data needed by EE, and also sets up DVE,
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DECKARD region/video mode/MAC address information, and an unknown device.
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## Configurations
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There are multiple configurations of this library, allowing the choice of
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balancing between size, speed, and features.
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* `eeconf` -> The recommended version.
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## How to use this module in your program
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In order to use this module in your program, use `LoadModule` or \
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`LoadModuleBuffer` with no arguments.

‎iop/system/eeconf/src/eeconf.c‎

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/*
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# _____ ___ ____ ___ ____
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# ____| | ____| | | |____|
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# | ___| |____ ___| ____| | \ PS2DEV Open Source Project.
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#-----------------------------------------------------------------------
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# Copyright ps2dev - http://www.ps2dev.org
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# Licenced under Academic Free License version 2.0
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# Review ps2sdk README & LICENSE files for further details.
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*/
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#include "irx_imports.h"
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#include <dev5_mmio_hwport.h>
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#include <iop_mmio_hwport.h>
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IRX_ID("EEConfig", 1, 1);
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// Based on the module from ROM 2.20+.
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static int eeconf_config_numblocks;
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static int eeconf_writeread_scmd(char cmd, const char *sdata, int sdlen, char *rdata, int rdlen)
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{
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int rdlen_tmp;
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int i;
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char rdata_tmp[64];
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USE_DEV5_MMIO_HWPORT();
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rdlen_tmp = rdlen;
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if ( (dev5_mmio_hwport->m_dev5_reg_017 & 0x80) != 0 )
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return 0;
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while ( (dev5_mmio_hwport->m_dev5_reg_017 & 0x40) == 0 )
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;
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for ( i = 0; i < sdlen; i += 1 )
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dev5_mmio_hwport->m_dev5_reg_017 = sdata[i];
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dev5_mmio_hwport->m_dev5_reg_016 = cmd;
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while ( (dev5_mmio_hwport->m_dev5_reg_017 & 0x80) != 0 )
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;
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for ( i = 0; (dev5_mmio_hwport->m_dev5_reg_017 & 0x40) == 0; i += 1 )
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rdata_tmp[i] = dev5_mmio_hwport->m_dev5_reg_018;
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if ( rdlen_tmp > i )
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rdlen_tmp = i;
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for ( i = 0; i < rdlen_tmp; i += 1 )
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rdata[i] = rdata_tmp[i];
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return 1;
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}
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static int eeconf_open_config(int block, int mode, int NumBlocks, char *status)
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{
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int wdata;
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wdata = (u8)mode | ((u8)block << 8) | ((u8)NumBlocks << 16);
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eeconf_config_numblocks = NumBlocks;
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return eeconf_writeread_scmd(64, (const char *)&wdata, 3, status, 1);
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}
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static int eeconf_close_config(char *status)
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{
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int result;
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result = eeconf_writeread_scmd(67, 0, 0, status, 1);
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eeconf_config_numblocks = 0;
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return result;
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}
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static int read_config_process(u32 *arg1, char *status)
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{
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int result;
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char rdata[16];
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result = eeconf_writeread_scmd(65, 0, 0, rdata, 16);
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*status = (u8)(rdata[14] + rdata[13] + rdata[12] + rdata[11] + rdata[10] + rdata[9] + rdata[8] + rdata[7] + rdata[6]
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+ rdata[5] + rdata[4] + rdata[3] + rdata[2] + rdata[0] + rdata[1])
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!= (u8)rdata[15];
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arg1[0] = *(u32 *)&rdata[0];
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arg1[1] = *(u32 *)&rdata[4];
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arg1[2] = *(u32 *)&rdata[8];
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*((u8 *)arg1 + 12) = rdata[12];
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*((u8 *)arg1 + 13) = rdata[13];
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*((u8 *)arg1 + 14) = rdata[14];
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return result;
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}
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static int eeconf_read_config(void *buffer, char *status)
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{
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int i;
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for ( i = 0; i < eeconf_config_numblocks; i += 1 )
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if ( !read_config_process((u32 *)((char *)buffer + (15 * i)), status) || *status )
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break;
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return i;
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}
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static int write_config_process(char *inval, char *status)
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{
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char wdata[16];
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*status = 0;
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*(u32 *)&wdata[0] = *(u32 *)inval;
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*(u32 *)&wdata[4] = *((u32 *)inval + 1);
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*(u32 *)&wdata[8] = *((u32 *)inval + 2);
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wdata[12] = inval[12];
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wdata[13] = inval[13];
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wdata[14] = inval[14];
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wdata[15] = inval[14] + inval[13] + inval[12] + inval[11] + inval[10] + inval[9] + inval[8] + inval[7] + inval[6]
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+ inval[5] + inval[4] + inval[3] + inval[2] + inval[0] + inval[1];
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return eeconf_writeread_scmd(66, wdata, 16, status, 1);
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}
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static int eeconf_write_config(const void *buffer, char *status)
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{
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int i;
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for ( i = 0; i < eeconf_config_numblocks; i += 1 )
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if ( !write_config_process((char *)buffer + (15 * i), status) || *status )
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break;
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return i;
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}
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static void eeconf_ieee1394_reset()
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{
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USE_IOP_MMIO_HWPORT();
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iop_mmio_hwport->ieee1394.PHYAccess = 0x417F0000;
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while ( !(iop_mmio_hwport->ieee1394.NodeID & 1) )
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;
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iop_mmio_hwport->ieee1394.ubufReceiveClear = -1;
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iop_mmio_hwport->ieee1394.intr0 = -1;
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iop_mmio_hwport->ieee1394.intr1 = -1;
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iop_mmio_hwport->ieee1394.intr2 = -1;
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}
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static int eeconf_ieee1394_available()
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{
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USE_IOP_MMIO_HWPORT();
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return (iop_mmio_hwport->ieee1394.UnknownRegister7C & 0xF0000000) == 0x10000000;
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}
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static int eeconf_ee_ssbus_available()
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{
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USE_IOP_MMIO_HWPORT();
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return iop_mmio_hwport->iop_sbus_ctrl[0] & 0x80000000;
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}
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static void eeconf_dve_magic()
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{
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USE_IOP_MMIO_HWPORT();
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if ( (unsigned int)(iop_mmio_hwport->exp2_r2[4612]) - 96 < 2 )
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{
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iop_mmio_hwport->exp2_r2[4632] = 0;
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return;
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}
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if ( (iop_mmio_hwport->dev9c[14] & 0xF0) != '0' )
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{
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*(vu16 *)&iop_mmio_hwport->dev9c[16] = 0;
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*(vu16 *)&iop_mmio_hwport->dev9c[18] = 0;
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return;
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}
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*((vu16 *)0xB600000A) = 0;
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}
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static void eeconf_handle_mac_address()
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{
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char rdata[16];
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int i;
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for ( i = 0; i < 100; i += 1 )
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if ( eeconf_writeread_scmd(55, 0, 0, rdata, 9) )
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break;
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if ( i >= 100 || (rdata[0] & 0x80) != 0 )
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memset(rdata, 255, sizeof(rdata));
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*((vu32 *)0xFFFE0188) = ((u8)rdata[4] << 24) | ((u8)rdata[3] << 16) | ((u8)rdata[2] << 8) | (u8)rdata[1];
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*((vu32 *)0xFFFE018C) = ((u8)rdata[8] << 24) | ((u8)rdata[7] << 16) | ((u8)rdata[6] << 8) | (u8)rdata[5];
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}
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static void eeconf_handle_region_param()
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{
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char rdata[16];
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int i;
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for ( i = 0; i < 100; i += 1 )
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if ( eeconf_writeread_scmd(54, 0, 0, rdata, 15) )
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break;
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if ( i < 100 && (rdata[0] & 0x80) == 0 )
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{
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// The following address is the byte at index 5 of ROMVER
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*((vu32 *)0xFFFE0180) = 0xBFC7FF04;
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*((vu32 *)0xFFFE0184) = (u8)rdata[3];
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// The following address is the byte at index 34 of VERSTR
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*((vu32 *)0xFFFE0180) = 0xBFC7FF52;
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*((vu32 *)0xFFFE0184) = (u8)rdata[8];
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}
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*((vu32 *)0xFFFE0180) = 0xFFFFFFFF;
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}
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static void eeconf_handle_eegs_config(const u8 *buf)
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{
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*((vu32 *)0xFFFE0190) = buf ? (buf[1] & 0xF) : 3;
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}
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int _start(int ac, char **av)
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{
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const int *p_bootmode3;
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int read_conf_succeeded;
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char *cfgblock_mem;
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int any_ps1drv_flag_set;
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int i;
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char cfgblock_tmp[16];
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char cfgstatus;
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USE_DEV5_MMIO_HWPORT();
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(void)ac;
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(void)av;
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p_bootmode3 = QueryBootMode(3);
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if ( p_bootmode3 && (p_bootmode3[1] & (1 | 2)) )
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return 1;
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Warray-bounds"
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*((void **)0x3C0) = 0;
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#pragma GCC diagnostic pop
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for ( i = 0; i < 0x30000; i += 1 )
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if ( !(dev5_mmio_hwport->m_dev5_reg_005 & 8) )
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break;
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if ( i >= 0x30000 )
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return 1;
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read_conf_succeeded = 0;
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cfgblock_mem = (char *)AllocSysMemory(1, 96, 0);
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if ( cfgblock_mem )
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{
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read_conf_succeeded = 1;
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Warray-bounds"
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*((void **)0x3C0) = cfgblock_mem;
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#pragma GCC diagnostic pop
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for ( i = 0; i < 90; i += 1 )
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cfgblock_mem[i] = 0;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_open_config(0, 0, 4, &cfgstatus) && !(cfgstatus & 9) )
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break;
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if ( i >= 0x10000 )
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read_conf_succeeded = 0;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_read_config(cfgblock_mem, &cfgstatus) && !(cfgstatus & 9) )
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break;
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if ( i >= 0x10000 )
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read_conf_succeeded = 0;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_close_config(&cfgstatus) && !(cfgstatus & 9) )
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break;
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if ( i >= 0x10000 )
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read_conf_succeeded = 0;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_open_config(1u, 0, 2, &cfgstatus) && !(cfgstatus & 9) )
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break;
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if ( i >= 0x10000 )
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read_conf_succeeded = 0;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_read_config(cfgblock_mem + 60, &cfgstatus) && !(cfgstatus & 9) )
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break;
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if ( i >= 0x10000 )
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read_conf_succeeded = 0;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_close_config(&cfgstatus) && !(cfgstatus & 9) )
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break;
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if ( i >= 0x10000 )
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read_conf_succeeded = 0;
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cfgblock_mem[15] &= ~8;
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cfgblock_mem[15] |= ((cfgblock_mem[75] & 8) != 0);
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}
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if ( !read_conf_succeeded )
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Warray-bounds"
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*((void **)0x3C0) = 0;
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#pragma GCC diagnostic pop
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// The following block is only in EECONF module in 1.60+, 1.70+, 2.20+, PS3 ps2_emu ROMs.
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if ( !*(u16 *)QueryBootMode(4) )
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{
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// The following block is only in EECONF module in 1.60+, 1.70+, 2.20+ ROMs.
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eeconf_dve_magic();
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// The following block is only in EECONF module in 2.20+ ROMs.
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if ( eeconf_ee_ssbus_available() )
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{
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eeconf_handle_region_param();
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eeconf_handle_mac_address();
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Warray-bounds"
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eeconf_handle_eegs_config((u8 *)(void **)0x3C0);
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#pragma GCC diagnostic pop
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}
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// The following block is only in EECONF module in 1.70+, 2.20+, PS3 ps2_emu ROMs.
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if ( eeconf_ieee1394_available() )
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eeconf_ieee1394_reset();
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}
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if ( !(dev5_mmio_hwport->m_dev5_reg_005 & 2) || (dev5_mmio_hwport->m_dev5_reg_005 & 4) )
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return 1;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_open_config(1u, 0, 1, &cfgstatus) && !(cfgstatus & 9) )
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break;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_read_config(cfgblock_tmp, &cfgstatus) && !(cfgstatus & 9) )
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break;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_close_config(&cfgstatus) && !(cfgstatus & 9) )
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break;
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any_ps1drv_flag_set = 0;
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for ( i = 0; i < 15; i += 1 )
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{
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if ( cfgblock_tmp[i] )
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{
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any_ps1drv_flag_set = 1;
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cfgblock_tmp[i] = 0;
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}
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}
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if ( any_ps1drv_flag_set )
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{
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_open_config(1u, 1u, 1, &cfgstatus) && !(cfgstatus & 9) )
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break;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_write_config(cfgblock_tmp, &cfgstatus) && !(cfgstatus & 9) )
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break;
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for ( i = 0; i < 0x10000; i += 1 )
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if ( eeconf_close_config(&cfgstatus) && !(cfgstatus & 9) )
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break;
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}
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return 1;
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}

‎iop/system/eeconf/src/exports.tab‎

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DECLARE_EXPORT_TABLE(eeconfig, 1, 3)
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DECLARE_EXPORT(_start)
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DECLARE_EXPORT(_retonly)
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DECLARE_EXPORT(_retonly)
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DECLARE_EXPORT(_retonly)
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DECLARE_EXPORT(_retonly)
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DECLARE_EXPORT(_retonly)
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DECLARE_EXPORT(_retonly)
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DECLARE_EXPORT(_retonly)
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END_EXPORT_TABLE
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void _retonly() {}

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