[AdcStm]: correctly configure the InterruptHandler based on the 'oneBasedIndex

[daantimmer]

The AdcStm peripheral implementation assumes there is only one instance of this class and that there is a fixed IRQ, regardless of which peripheral index is chosen.

Not only that, some devices (like the STM32G4) have a share interrupt vector for ADC1+ADC2 and ADC3+4+5