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@ucb-bar UC Berkeley Architecture Research

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    260 repositories

    • ucie

      Public
      An open-source UCIe implementation
      Scala
      •32•139•2•5•Updated Oct 29, 2026Oct 29, 2026

    • chia-tutorial

      Public
      Python
      •0•0•0•1•Updated Oct 29, 2026Oct 29, 2026

    • merlin

      Public
      MLIR-in as a compiler stack for ucb-bar
      Python
      •
      Apache License 2.0
      •7•21•1•4•Updated Oct 29, 2026Oct 29, 2026

    • atlas-mlir

      Public
      MLIR dialect for Atlas.
      Python
      •
      Apache License 2.0
      •0•1•5•4•Updated Oct 29, 2026Oct 29, 2026

    • atlas-npu

      Public
      Statically scheduled Neural Processing Unit
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •2•10•0•14•Updated Oct 29, 2026Oct 29, 2026

    • testchipip

      Public
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •93•92•19•9•Updated Oct 29, 2026Oct 29, 2026

    • ModelBlaster

      Public
      Blast your models
      Python
      •3•7•0•0•Updated Oct 28, 2026Oct 28, 2026

    • r2-sim

      Public
      Radiance 2 architecture simulator
      Rust
      •
      BSD 3-Clause "New" or "Revised" License
      •1•0•0•0•Updated Oct 28, 2026Oct 28, 2026

    • r2-vis

      Public
      Radiance 2 trace processing and visualization
      TypeScript
      •
      BSD 3-Clause "New" or "Revised" License
      •0•0•0•0•Updated Oct 28, 2026Oct 28, 2026

    • radiance-kernels

      Public
      Software kernels for the Radiance GPU
      C
      •
      Apache License 2.0
      •4•5•0•0•Updated Oct 28, 2026Oct 28, 2026

    • berkeley-softfloat-3

      Public
      SoftFloat release 3
      C
      •
      Other
      •171•363•13•5•Updated Oct 27, 2026Oct 27, 2026

    • chia

      Public
      An open framework for designing and deploying custom AI-driven HW/SW co-design flows fast
      hardware-software-co-designagentic-ai
      hardware-software-co-designagentic-ai
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •35•113•2•3•Updated Oct 27, 2026Oct 27, 2026

    • radiance

      Public
      A Heterogeneous GPU Platform for AI and Neural Graphics
      Scala
      •
      Other
      •7•71•0•0•Updated Oct 27, 2026Oct 27, 2026

    • gemmini

      Public
      Berkeley's Spatial Array Generator
      asicacceleratordnn
      asicacceleratordnn
      Scala
      •
      Other
      •304•1.5k•105•16•Updated Oct 27, 2026Oct 27, 2026

    • model2MLIR

      Public
      Any model in Torch or JAX format to MLIR frontend dialects.
      Python
      •
      MIT License
      •3•2•0•0•Updated Oct 27, 2026Oct 27, 2026

    • gemmini-mlir

      Public
      Gemmini (& Variants) MLIR dialect
      Python
      •
      Apache License 2.0
      •1•2•0•0•Updated Oct 26, 2026Oct 26, 2026

    • spec2026-workload

      Public
      Python
      •0•0•0•0•Updated Oct 25, 2026Oct 25, 2026

    • saturn-vectors

      Public
      Chisel RISC-V Vector 1.0 Implementation
      cpuchiselvectors
      cpuchiselvectorsrisc-vmicroarchitecturervv
      Assembly
      •
      BSD 3-Clause "New" or "Revised" License
      •42•159•13•6•Updated Oct 25, 2026Oct 25, 2026

    • libgemmini

      Public
      Gemmini extensions for Spike
      C++
      •
      BSD 3-Clause "New" or "Revised" License
      •18•4•1•1•Updated Oct 25, 2026Oct 25, 2026

    • MaDa

      Public
      A simple FPGA SoC generation framework with Chisel and Mill.
      fpgachiselvivado
      fpgachiselvivadomillbuild
      Verilog
      •
      MIT License
      •1•6•1•0•Updated Oct 24, 2026Oct 24, 2026

    • mx-gemmini-mlir

      Public
      MX Gemmini software contract, TorchAO adapter, and MLIR handoff
      Python
      •
      Apache License 2.0
      •0•1•0•0•Updated Oct 23, 2026Oct 23, 2026

    • lilikoi

      Public
      Fletcher Lake control and programming interface API
      Python
      •0•2•0•0•Updated Oct 23, 2026Oct 23, 2026

    • bTrack

      Public
      FPGA & Board tracker for UCB-BAR
      TypeScript
      •0•0•0•0•Updated Oct 23, 2026Oct 23, 2026

    • RoSE

      Public
      A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robotic system.
      C
      •
      BSD 3-Clause "New" or "Revised" License
      •8•49•3•0•Updated Oct 23, 2026Oct 23, 2026

    • npu-exploration

      Public
      exploring systematic npu codesign
      Python
      •
      BSD 3-Clause "New" or "Revised" License
      •0•3•0•0•Updated Oct 22, 2026Oct 22, 2026

    • MxGen

      Public
      Configurable low-precision floating-point and microscaling hardware in Chisel
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •0•13•0•0•Updated Oct 22, 2026Oct 22, 2026

    • rocket-chip

      Public
      Rocket Chip Generator
      Scala
      •
      Other
      •1.3k•1•0•0•Updated Oct 20, 2026Oct 20, 2026

    • chipyard

      Public
      An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
      boomrocketrocket-chip
      boomrocketrocket-chipchip-generatorchiselriscvrtlperipheralssocout-of-order
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •932•2.4k•155•48•Updated Oct 17, 2026Oct 17, 2026

    • shuttle

      Public
      A Rocket-based RISC-V superscalar in-order core
      Scala
      •12•42•1•0•Updated Oct 16, 2026Oct 16, 2026

    • atlas-kernels

      Public
      0•0•0•0•Updated Oct 14, 2026Oct 14, 2026
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