From c4ebf3d4668fd9c87333cb87d579a1faeafa296d Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 16:11:42 +0200 Subject: [PATCH 01/14] Create README.MD --- variants/CH32X035/CH32X033F8P/README.MD | 1 + 1 file changed, 1 insertion(+) create mode 100644 variants/CH32X035/CH32X033F8P/README.MD diff --git a/variants/CH32X035/CH32X033F8P/README.MD b/variants/CH32X035/CH32X033F8P/README.MD new file mode 100644 index 0000000..80691b6 --- /dev/null +++ b/variants/CH32X035/CH32X033F8P/README.MD @@ -0,0 +1 @@ +## CH32X033F8P6 ## From da4dce1e4f9dd2a1cfc22648780835865015d288 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 16:15:15 +0200 Subject: [PATCH 02/14] Support for Arduino logical pin numbers, PWM, ADC --- variants/CH32X035/CH32X033F8P/CMakeLists.txt | 30 +++ .../CH32X035/CH32X033F8P/PeripheralPins.c | 206 ++++++++++++++++++ variants/CH32X035/CH32X033F8P/PinNamesVar.h | 11 + .../CH32X035/CH32X033F8P/boards_entry.txt | 12 + .../CH32X033F8P/variant_CH32X033F8P.cpp | 60 +++++ .../CH32X033F8P/variant_CH32X033F8P.h | 149 +++++++++++++ 6 files changed, 468 insertions(+) create mode 100644 variants/CH32X035/CH32X033F8P/CMakeLists.txt create mode 100644 variants/CH32X035/CH32X033F8P/PeripheralPins.c create mode 100644 variants/CH32X035/CH32X033F8P/PinNamesVar.h create mode 100644 variants/CH32X035/CH32X033F8P/boards_entry.txt create mode 100644 variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.cpp create mode 100644 variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h diff --git a/variants/CH32X035/CH32X033F8P/CMakeLists.txt b/variants/CH32X035/CH32X033F8P/CMakeLists.txt new file mode 100644 index 0000000..7929c99 --- /dev/null +++ b/variants/CH32X035/CH32X033F8P/CMakeLists.txt @@ -0,0 +1,30 @@ +# v3.21 implemented semantic changes regarding $ +# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects +cmake_minimum_required(VERSION 3.21) + +add_library(variant INTERFACE) +add_library(variant_usage INTERFACE) + +target_include_directories(variant_usage INTERFACE + . +) + + +target_link_libraries(variant_usage INTERFACE + base_config +) + +target_link_libraries(variant INTERFACE variant_usage) + + + +add_library(variant_bin STATIC EXCLUDE_FROM_ALL + PeripheralPins.c + variant_CH32X033F8P.cpp +) +target_link_libraries(variant_bin PUBLIC variant_usage) + +target_link_libraries(variant INTERFACE + variant_bin +) + diff --git a/variants/CH32X035/CH32X033F8P/PeripheralPins.c b/variants/CH32X035/CH32X033F8P/PeripheralPins.c new file mode 100644 index 0000000..cb699cd --- /dev/null +++ b/variants/CH32X035/CH32X033F8P/PeripheralPins.c @@ -0,0 +1,206 @@ +/** + ******************************************************************************* + * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. + * All rights reserved. + * + * This software component is licensed by WCH under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ + +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** +#ifdef ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 0)}, // ADC1_IN0 + {PA_1, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 1)}, // ADC1_IN1 + {PA_2, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 2)}, // ADC1_IN2 + {PA_3, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 3)}, // ADC1_IN3 + {PA_4, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 4)}, // ADC1_IN4 + {PA_5, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 5)}, // ADC1_IN5 + {PA_6, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 6)}, // ADC1_IN6 +// {PA_7, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 7)}, // ADC1_IN7 + {PB_0, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 8)}, // ADC1_IN8 + {PB_1, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 9)}, // ADC1_IN9 +// {PC_0, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 10)}, // ADC1_IN8 + {PC_3, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 13)}, // ADC1_IN9 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + + + +//*** I2C *** +#ifdef I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PC_17, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_PartialRemap2_I2C1_ENABLE)}, + {PC_18, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_PartialRemap3_I2C1_ENABLE)}, + {PC_16, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_PartialRemap4_I2C1_ENABLE)}, + {PC_19, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_FullRemap_I2C1_ENABLE)}, + {NC, NP, 0} +}; +#endif + +#ifdef I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PC_16, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_PartialRemap2_I2C1_ENABLE)}, + {PC_19, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_PartialRemap3_I2C1_ENABLE)}, + {PC_17, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_PartialRemap4_I2C1_ENABLE)}, + {PC_18, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_FullRemap_I2C1_ENABLE)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** +#ifdef TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + +// {PB_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap1_TIM1_ENABLE, 1)}, // TIM1_CH1_1 +// {PB_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap1_TIM1_ENABLE, 2)}, // TIM1_CH2_1 +// {PB_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap1_TIM1_ENABLE, 3)}, // TIM1_CH3_1 +// {PC_16, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap1_TIM1_ENABLE, 4)}, // TIM1_CH4_1 +// {PA_7, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap1_TIM1_ENABLE, 1)}, // TIM1_CH1N_1 +// {PB_0, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap1_TIM1_ENABLE, 2)}, // TIM1_CH2N_1 +// {PB_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap1_TIM1_ENABLE, 3)}, // TIM1_CH3N_1 + {PB_1, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap1_TIM1_ENABLE, 3)}, // TIM1_CH3N_1 (MMOLE 241012 NOK) +// {PC_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap2_TIM2_ENABLE, 1)}, // TIM2_CH1N_2 (MMOLE 241012 NOK) + {PC_3, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_PartialRemap3_TIM1_ENABLE, 4)}, // TIM1_CH4_3 (MMOLE 241012 OK) + +// {PC_19, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM2_ENABLE, 1)}, // TIM2_CH1_6 +// {PC_14, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM2_ENABLE, 2)}, // TIM2_CH2_6 +// {PC_15, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM2_ENABLE, 3)}, // TIM2_CH3_6 +// {PC_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM2_ENABLE, 4)}, // TIM2_CH4_6 +// {PB_11, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM2_ENABLE, 1)}, // TIM2_CH1N_6 +// {PB_12, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM2_ENABLE, 2)}, // TIM2_CH2N_6 +// {PB_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM2_ENABLE, 3)}, // TIM2_CH3N_6 +// {PC_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM2_ENABLE, 3)}, // TIM2_CH1N_6 + {PA_4, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_FullRemap_TIM3_ENABLE, 2)}, // TIM3_CH2_3 (MMOLE 241012 OK) + +// {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_NONE, 1)}, // TIM2_CH2N_6 +// {PA_7, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_NONE, 2)}, // TIM3_CH2 PA7 cannot be output on CH32X033F8P6 + {PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_NONE, 1)}, // TIM2_CH1 (MMOLE 241012 OK) + {PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_NONE, 2)}, // TIM2_CH2 (MMOLE 241012 OK) + {PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_NONE, 3)}, // TIM2_CH3 (MMOLE 241012 OK) + {PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_NONE, 4)}, // TIM2_CH4 (MMOLE 241012 OK) + {PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_NONE, 1)}, // TIM3_CH1 (MMOLE 241012 OK) + {PB_7, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_NONE, 2)}, // TIM1_CH2N (MMOLE 241012 NOK) + + {NC, NP, 0} +}; +#endif + +// TODO: adjust UART pins to CH32X033F8P6: PA2/PA3 + USB? +//*** UART *** +#ifdef UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PB_10, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {PA_2, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {PB_3, USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {PB_0, USART4, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PB_11, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {PA_3, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {PB_4, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {PB_1, USART4, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PC_17, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {PA_1, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {PB_7, USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {PA_8, USART4, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PC_16, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {PA_0, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {PB_6, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {PB_15, USART4, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + + +//*** SPI *** +#ifdef SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +#ifdef SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {NC, NP, 0} +}; +#endif + +//*** NO CAN *** +#ifdef CAN_MODULE_ENABLED + +#endif + +#ifdef CAN_MODULE_ENABLED + +#endif + +//*** No ETHERNET *** + + + +//*** USB *** +#ifdef USB_MODULE_ENABLED +WEAK const PinMap PinMap_USB[] = { + {PC_16, USB, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM + {PC_17, USB, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP + {NC, NP, 0} +}; +#endif + +//*** No SD *** + + diff --git a/variants/CH32X035/CH32X033F8P/PinNamesVar.h b/variants/CH32X035/CH32X033F8P/PinNamesVar.h new file mode 100644 index 0000000..183623f --- /dev/null +++ b/variants/CH32X035/CH32X033F8P/PinNamesVar.h @@ -0,0 +1,11 @@ +/* Alternate pin name */ + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +/* USB */ +#ifdef USBCON + USB_DM = PC_16, + USB_DP = PC_17, +#endif diff --git a/variants/CH32X035/CH32X033F8P/boards_entry.txt b/variants/CH32X035/CH32X033F8P/boards_entry.txt new file mode 100644 index 0000000..df89787 --- /dev/null +++ b/variants/CH32X035/CH32X033F8P/boards_entry.txt @@ -0,0 +1,12 @@ +# This file help to add generic board entry. + + + +# CH32X033F8P +CH32X035_EVT.menu.pnum.CH32X033F8P=CH32X033F8P EVT +CH32X035_EVT.menu.pnum.CH32X033F8P.upload.maximum_size=63488 +CH32X035_EVT.menu.pnum.CH32X033F8P.upload.maximum_data_size=20480 +CH32X035_EVT.menu.pnum.CH32X033F8P.build.board=CH32X033F8P +CH32X035_EVT.menu.pnum.CH32X033F8P.build.product_line=CH32X035 +CH32X035_EVT.menu.pnum.CH32X033F8P.build.variant=CH32X035/CH32X033F8P + diff --git a/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.cpp b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.cpp new file mode 100644 index 0000000..78c5485 --- /dev/null +++ b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.cpp @@ -0,0 +1,60 @@ +/** + ******************************************************************************* + * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. + * All rights reserved. + * + * This software component is licensed by WCH under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ + +#include "pins_arduino.h" + + + + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0 A0 + PA_1, // D1 A1 + PA_2, // D2 TX2/A2 + PA_3, // D3 RX2/A3 + PA_4, // D4 CS/A4 + PA_5, // D5 SCK/A5 + PA_6, // D6 MISO/A6 + PB_0, // D7 MOSI/A8 PA7 is tied to PB0 => input only + PB_1, // D8 A9 + PB_7, // D9 RST + PC_16, // D10 USBDM tied to PC11=input only + PC_17, // D11 USBPD tied to PC10=input only + PA_9, // D12 + PA_11, // D13 SDA (not in 0-series) + PA_10, // D14 SCL (not in 0-series) + PC_3, // D15 A13 + PC_18, // D16 SWDIO + PC_19, // D17 SWCLK +}; + +// Analog (Ax) pin number array, refers to PinName in digitalPin[]? +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 (no ADC Ch3 in 0-series!) + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7=PB0, input only + 7, // A8, PB0=PA7, input only + 8, // A9, PB1 + 10, // A10, none + 11, // A11, none + 12, // A12, none + 15, // A13, PC3 +}; + + + diff --git a/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h new file mode 100644 index 0000000..41a0bd1 --- /dev/null +++ b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h @@ -0,0 +1,149 @@ +/* + ******************************************************************************* + * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. + * All rights reserved. + * + * This software component is licensed by WCH under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/* ENABLE Peripherals */ +//#define ADC_MODULE_ENABLED +//#define UART_MODULE_ENABLED +//#define SPI_MODULE_ENABLED +//#define I2C_MODULE_ENABLED +//#define TIM_MODULE_ENABLED + +/* CH32VX033F8P6 Pins */ +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA2 PIN_A2 +#define PA3 PIN_A3 +#define PA4 PIN_A4 +#define PA5 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A8 +#define PB0 PIN_A8 +#define PB1 PIN_A9 +#define PB7 9 // can be configured as RST +#define PC16 10 +#define PC17 11 +#define PA9 12 +#define PA11 13 +#define PA10 14 +#define PC3 15 // PIN_A13 +#define PC18 16 +#define PC19 17 + +// Alternate pins number TODO +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB1_ALT1 (PB1 | ALT1) +#define PC0_ALT1 (PC0 | ALT1) +#define PC3_ALT1 (PC3 | ALT1) + + + +#define NUM_DIGITAL_PINS 18 // 27 +#define NUM_ANALOG_INPUTS 14 // 14 to allow PIN_13/A13 definition for PC3 (no A10, A11, A12 on X033F8P6) +#define ADC_RESOLUTION 12 + + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PNUM_NOT_DEFINED +#endif + + + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA5 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PC17 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PC16 +#endif + +// Timer Definitions +#ifndef TIMER_TONE + #define TIMER_TONE TIM3 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM2 +#endif + + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 1 +#endif +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +// For CH32X033F8P6 serial pins RX2=PA3, TX2=PA2 +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA3 // PB11 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 // PB10 +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif + + From 5c8901bef33067281e036566aba2c5e6a1264af5 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 16:54:21 +0200 Subject: [PATCH 03/14] CH32X033F8P6 TSSOP20 variant - supported features --- variants/CH32X035/CH32X033F8P/README.md | 48 +++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 variants/CH32X035/CH32X033F8P/README.md diff --git a/variants/CH32X035/CH32X033F8P/README.md b/variants/CH32X035/CH32X033F8P/README.md new file mode 100644 index 0000000..b30ae09 --- /dev/null +++ b/variants/CH32X035/CH32X033F8P/README.md @@ -0,0 +1,48 @@ +## CH32X033F8P6 ## + +### CH32X035/X033 Main Features ### +- 48MHz RC oscillator +- 20KB SRAM +- 62KB Flash + 3328B System Flash +- 256B system config + 256B user storage +- 2x OPA, 3x CMP, 12-bit 14-chn ADC, 14-chn touch +- 3x 16-bit timer, 2x WD timer, systick +- 4x USART, I2C, SPI, USB2, USB PD, 2-wire debug + + +### TSSOP20 Pinout ### +- See [datasheet](https://www.wch.cn/downloads/CH32X035DS0_PDF.html) for more details. +``` + +------v------+ + MISO/A6 D6~ 1-+PA6 PA5+-20 D5 SCK/A5 +MOSI/A8/TX4 D7 2-+PA7=PB0 PA4+-19 D4~ CS/A4 + A9/RX4 D8 3-+PB1 PC19+-18 D17 SWCLK + RST D9 4-+PB7 PA3+-17 D3~ RX2/A3* + USBDM D10 5-+PC16=PC11 PA2+-16 D2~ TX2/A2 + USBDP D11 6-+PC17=PC10 PA1+-15 D1~ A1 + GND 7-+VSS PA0+-14 D0~ A0 + SWDIO D16 8-+PC18 PC3+-13 D15~ A13 + VCC 9-+VDD PA10+-12 D14/SCL + D12 10-+PA9 PA11+-11 D13/SDA + +-------------+ +*A3 and I2C don't work on CH32X033F8P6 0-series (lot number with the penultimate bit 5 being 0). +``` + + +### Tested features ### +- digitalWrite()/digitalRead() +- analogWrite() - 12-bit resolution, marked with ~ in pinout above. +- analogRead() - very stable 12-bit resolution +- EEPROM library - may need improvement (first test showed corrupted data written) + +### Known issues/limitations ### +- Pins PA7/PB0, PC16/PC11 and PC17/PC10 cannot be used for output +- Any signal on A0 seems to show on other ADC pins when disconnected. +- A3 and I2C don't work on CH32X033F8P6 0-series (lot number with the penultimate bit 5 being 0) + +### References ### +- [datasheet](https://www.wch.cn/downloads/CH32X035DS0_PDF.html) +- [reference manual](https://www.wch.cn/downloads/CH32X035RM_PDF.html) +- [PIOC](https://github.com/openwch/ch32x035/tree/main/EVT/EXAM/PIOC) [User manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC%20UserManual.pdf)), [Reference manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC-EN.pdf)), [Instruction set](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/CHRISC8B-EN.pdf) +- [X033/X035 ](https://github.com/openwch/ch32x035), [WCH examples](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM) +- [PIOC](https://github.com/openwch/ch32x035/tree/main/EVT/EXAM/PIOC) [User manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC%20UserManual.pdf)), [Reference manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC-EN.pdf)), [Instruction set](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/CHRISC8B-EN.pdf) From be429ba9e038872768f9497cd74e0bcf50153cd1 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 16:57:16 +0200 Subject: [PATCH 04/14] Delete variants/CH32X035/CH32X033F8P/README.MD --- variants/CH32X035/CH32X033F8P/README.MD | 1 - 1 file changed, 1 deletion(-) delete mode 100644 variants/CH32X035/CH32X033F8P/README.MD diff --git a/variants/CH32X035/CH32X033F8P/README.MD b/variants/CH32X035/CH32X033F8P/README.MD deleted file mode 100644 index 80691b6..0000000 --- a/variants/CH32X035/CH32X033F8P/README.MD +++ /dev/null @@ -1 +0,0 @@ -## CH32X033F8P6 ## From 9cf7807a99bff983265326f8804e5a72c3baa408 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 16:58:27 +0200 Subject: [PATCH 05/14] Update README.md --- variants/CH32X035/CH32X033F8P/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/CH32X035/CH32X033F8P/README.md b/variants/CH32X035/CH32X033F8P/README.md index b30ae09..366c72d 100644 --- a/variants/CH32X035/CH32X033F8P/README.md +++ b/variants/CH32X035/CH32X033F8P/README.md @@ -11,7 +11,7 @@ ### TSSOP20 Pinout ### -- See [datasheet](https://www.wch.cn/downloads/CH32X035DS0_PDF.html) for more details. +- See [datasheet](https://www.wch.cn/downloads/CH32X035DS0_PDF.html) for complete pin function list. ``` +------v------+ MISO/A6 D6~ 1-+PA6 PA5+-20 D5 SCK/A5 From b35a440c5bb0667d0b926b6a5ab7cd67ccfe2e0e Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 17:07:30 +0200 Subject: [PATCH 06/14] Added CH32X033F8P --- boards.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/boards.txt b/boards.txt index 32fbe00..0c0b02c 100644 --- a/boards.txt +++ b/boards.txt @@ -251,6 +251,23 @@ CH32X035_EVT.menu.pnum.CH32X035G8U.build.IQ_math_RV32= CH32X035_EVT.menu.pnum.CH32X035G8U.build.ch_extra_lib=-lprintf +#CH32X033F8P EVT Board +CH32X035_EVT.menu.pnum.CH32X033F8P=CH32X033F8P EVT +CH32X035_EVT.menu.pnum.CH32X033F8P.node=NODE_X033F8P +CH32X035_EVT.menu.pnum.CH32X033F8P.upload.maximum_size=63488 +CH32X035_EVT.menu.pnum.CH32X033F8P.upload.maximum_data_size=20480 +CH32X035_EVT.menu.pnum.CH32X033F8P.build.mcu=QingKe-V4C +CH32X035_EVT.menu.pnum.CH32X033F8P.build.board=CH32X033F8P +CH32X035_EVT.menu.pnum.CH32X033F8P.build.series=CH32X035 +CH32X035_EVT.menu.pnum.CH32X033F8P.build.variant=CH32X035/CH32X033F8P +CH32X035_EVT.menu.pnum.CH32X033F8P.build.chip=CH32X033F8P +CH32X035_EVT.menu.pnum.CH32X033F8P.build.march=rv32imacxw +CH32X035_EVT.menu.pnum.CH32X033F8P.build.mabi=ilp32 +CH32X035_EVT.menu.pnum.CH32X033F8P.build.math_lib_gcc=-lm +CH32X035_EVT.menu.pnum.CH32X033F8P.build.IQ_math_RV32= +CH32X035_EVT.menu.pnum.CH32X033F8P.build.ch_extra_lib=-lprintf + + # Upload menu CH32X035_EVT.menu.upload_method.swdMethod=WCH-SWD CH32X035_EVT.menu.upload_method.swdMethod.upload.protocol= From a86276893df498023a088376fc94ed3b03e0752c Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 17:11:25 +0200 Subject: [PATCH 07/14] Enable all peripherals when IDE_MENU_PERIPHERALS is not defined --- variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h index 41a0bd1..6f81350 100644 --- a/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h +++ b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h @@ -13,11 +13,13 @@ #pragma once /* ENABLE Peripherals */ -//#define ADC_MODULE_ENABLED -//#define UART_MODULE_ENABLED -//#define SPI_MODULE_ENABLED -//#define I2C_MODULE_ENABLED -//#define TIM_MODULE_ENABLED +#ifndef IDE_MENU_PERIPHERALS // defined when peripherals are enabled/disabled via the IDE menu +#define ADC_MODULE_ENABLED +#define UART_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define TIM_MODULE_ENABLED +#endif /* CH32VX033F8P6 Pins */ #define PA0 PIN_A0 From a2e42bd8d5d7ae192c1fb4329120486c470aba43 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 18:57:13 +0200 Subject: [PATCH 08/14] added note --- variants/CH32X035/CH32X033F8P/README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/variants/CH32X035/CH32X033F8P/README.md b/variants/CH32X035/CH32X033F8P/README.md index 366c72d..d1ca277 100644 --- a/variants/CH32X035/CH32X033F8P/README.md +++ b/variants/CH32X035/CH32X033F8P/README.md @@ -33,6 +33,7 @@ MOSI/A8/TX4 D7 2-+PA7=PB0 PA4+-19 D4~ CS/A4 - digitalWrite()/digitalRead() - analogWrite() - 12-bit resolution, marked with ~ in pinout above. - analogRead() - very stable 12-bit resolution +- Serial.print() - Tested 115200 bps on PA2/PA3 (as set in variant_CH32X033F8P6.h) - EEPROM library - may need improvement (first test showed corrupted data written) ### Known issues/limitations ### From 6023714eac501a93a8faf0a0fee66fbe9a01d984 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 19:08:04 +0200 Subject: [PATCH 09/14] Update notes --- variants/CH32X035/CH32X033F8P/README.md | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/variants/CH32X035/CH32X033F8P/README.md b/variants/CH32X035/CH32X033F8P/README.md index d1ca277..3075914 100644 --- a/variants/CH32X035/CH32X033F8P/README.md +++ b/variants/CH32X035/CH32X033F8P/README.md @@ -30,20 +30,19 @@ MOSI/A8/TX4 D7 2-+PA7=PB0 PA4+-19 D4~ CS/A4 ### Tested features ### -- digitalWrite()/digitalRead() -- analogWrite() - 12-bit resolution, marked with ~ in pinout above. +- digitalWrite()/digitalRead() - can use Arduino pin numbers or PAx notation. +- analogWrite() - 12-bit resolution, pins marked with ~ in pinout above. - analogRead() - very stable 12-bit resolution - Serial.print() - Tested 115200 bps on PA2/PA3 (as set in variant_CH32X033F8P6.h) -- EEPROM library - may need improvement (first test showed corrupted data written) +- EEPROM library - may need improvement (first test showed corrupted data written). ### Known issues/limitations ### -- Pins PA7/PB0, PC16/PC11 and PC17/PC10 cannot be used for output +- Pins PA7/PB0, PC16/PC11 and PC17/PC10 cannot be used for output. - Any signal on A0 seems to show on other ADC pins when disconnected. -- A3 and I2C don't work on CH32X033F8P6 0-series (lot number with the penultimate bit 5 being 0) +- A3 and I2C don't work on CH32X033F8P6 0-series (lot number with the penultimate bit 5 being 0). ### References ### - [datasheet](https://www.wch.cn/downloads/CH32X035DS0_PDF.html) - [reference manual](https://www.wch.cn/downloads/CH32X035RM_PDF.html) -- [PIOC](https://github.com/openwch/ch32x035/tree/main/EVT/EXAM/PIOC) [User manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC%20UserManual.pdf)), [Reference manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC-EN.pdf)), [Instruction set](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/CHRISC8B-EN.pdf) - [X033/X035 ](https://github.com/openwch/ch32x035), [WCH examples](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM) -- [PIOC](https://github.com/openwch/ch32x035/tree/main/EVT/EXAM/PIOC) [User manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC%20UserManual.pdf)), [Reference manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC-EN.pdf)), [Instruction set](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/CHRISC8B-EN.pdf) +- [PIOC](https://github.com/openwch/ch32x035/tree/main/EVT/EXAM/PIOC) [User manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC%20UserManual.pdf), [Reference manual](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/PIOC-EN.pdf), [Instruction set](https://github.com/openwch/ch32x035/blob/main/EVT/EXAM/PIOC/CHRISC8B-EN.pdf) From 24ac3eebf7c8a2ac7ccbc1da7c20c560d84b1cf8 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 19:12:32 +0200 Subject: [PATCH 10/14] Added more info --- variants/CH32X035/CH32X033F8P/README.md | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/variants/CH32X035/CH32X033F8P/README.md b/variants/CH32X035/CH32X033F8P/README.md index 3075914..9da4d4a 100644 --- a/variants/CH32X035/CH32X033F8P/README.md +++ b/variants/CH32X035/CH32X033F8P/README.md @@ -17,7 +17,7 @@ MISO/A6 D6~ 1-+PA6 PA5+-20 D5 SCK/A5 MOSI/A8/TX4 D7 2-+PA7=PB0 PA4+-19 D4~ CS/A4 A9/RX4 D8 3-+PB1 PC19+-18 D17 SWCLK - RST D9 4-+PB7 PA3+-17 D3~ RX2/A3* + /RST D9 4-+PB7 PA3+-17 D3~ RX2/A3* USBDM D10 5-+PC16=PC11 PA2+-16 D2~ TX2/A2 USBDP D11 6-+PC17=PC10 PA1+-15 D1~ A1 GND 7-+VSS PA0+-14 D0~ A0 @@ -39,6 +39,7 @@ MOSI/A8/TX4 D7 2-+PA7=PB0 PA4+-19 D4~ CS/A4 ### Known issues/limitations ### - Pins PA7/PB0, PC16/PC11 and PC17/PC10 cannot be used for output. - Any signal on A0 seems to show on other ADC pins when disconnected. +- Pin 9/PB7 can be configured as hardware reset /RST using WCH Link Utility. - A3 and I2C don't work on CH32X033F8P6 0-series (lot number with the penultimate bit 5 being 0). ### References ### From e3af9875daa9cb8186e39f731430989ec1893034 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 15 Oct 2024 19:17:43 +0200 Subject: [PATCH 11/14] Another Updated README.md --- variants/CH32X035/CH32X033F8P/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/CH32X035/CH32X033F8P/README.md b/variants/CH32X035/CH32X033F8P/README.md index 9da4d4a..ca22dac 100644 --- a/variants/CH32X035/CH32X033F8P/README.md +++ b/variants/CH32X035/CH32X033F8P/README.md @@ -35,11 +35,11 @@ MOSI/A8/TX4 D7 2-+PA7=PB0 PA4+-19 D4~ CS/A4 - analogRead() - very stable 12-bit resolution - Serial.print() - Tested 115200 bps on PA2/PA3 (as set in variant_CH32X033F8P6.h) - EEPROM library - may need improvement (first test showed corrupted data written). +- Pin PB7 (Arduino pin 9) can be configured as hardware reset /RST using WCH Link Utility. (See issue #123) ### Known issues/limitations ### - Pins PA7/PB0, PC16/PC11 and PC17/PC10 cannot be used for output. - Any signal on A0 seems to show on other ADC pins when disconnected. -- Pin 9/PB7 can be configured as hardware reset /RST using WCH Link Utility. - A3 and I2C don't work on CH32X033F8P6 0-series (lot number with the penultimate bit 5 being 0). ### References ### From 57113d6a337250f2515f175ea681a82dc98fa777 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Fri, 18 Oct 2024 14:53:28 +0200 Subject: [PATCH 12/14] PADC_VREF not working? --- variants/CH32X035/CH32X033F8P/README.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/variants/CH32X035/CH32X033F8P/README.md b/variants/CH32X035/CH32X033F8P/README.md index ca22dac..c15e4ab 100644 --- a/variants/CH32X035/CH32X033F8P/README.md +++ b/variants/CH32X035/CH32X033F8P/README.md @@ -32,7 +32,7 @@ MOSI/A8/TX4 D7 2-+PA7=PB0 PA4+-19 D4~ CS/A4 ### Tested features ### - digitalWrite()/digitalRead() - can use Arduino pin numbers or PAx notation. - analogWrite() - 12-bit resolution, pins marked with ~ in pinout above. -- analogRead() - very stable 12-bit resolution +- analogRead() - very stable 12-bit resolution, but issues with A3/A0/PADC_VREF - Serial.print() - Tested 115200 bps on PA2/PA3 (as set in variant_CH32X033F8P6.h) - EEPROM library - may need improvement (first test showed corrupted data written). - Pin PB7 (Arduino pin 9) can be configured as hardware reset /RST using WCH Link Utility. (See issue #123) @@ -40,7 +40,7 @@ MOSI/A8/TX4 D7 2-+PA7=PB0 PA4+-19 D4~ CS/A4 ### Known issues/limitations ### - Pins PA7/PB0, PC16/PC11 and PC17/PC10 cannot be used for output. - Any signal on A0 seems to show on other ADC pins when disconnected. -- A3 and I2C don't work on CH32X033F8P6 0-series (lot number with the penultimate bit 5 being 0). +- A3, PADC_VREF and I2C don't work on CH32X033F8P6 0-series (lot number with the penultimate bit 5 being 0). ### References ### - [datasheet](https://www.wch.cn/downloads/CH32X035DS0_PDF.html) From 5d7daeb5fdec1f494bdc52fd6deaf66649cca803 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 6 May 2025 11:16:08 +0200 Subject: [PATCH 13/14] Support for Serial1, Serial2 as single instance or both as dual instance --- .../CH32X035/CH32X033F8P/PeripheralPins.c | 16 ++-- .../CH32X033F8P/variant_CH32X033F8P.h | 80 +++++++++++++++---- 2 files changed, 73 insertions(+), 23 deletions(-) diff --git a/variants/CH32X035/CH32X033F8P/PeripheralPins.c b/variants/CH32X035/CH32X033F8P/PeripheralPins.c index cb699cd..b1096bc 100644 --- a/variants/CH32X035/CH32X033F8P/PeripheralPins.c +++ b/variants/CH32X035/CH32X033F8P/PeripheralPins.c @@ -111,8 +111,8 @@ WEAK const PinMap PinMap_TIM[] = { //*** UART *** #ifdef UART_MODULE_ENABLED WEAK const PinMap PinMap_UART_TX[] = { - {PB_10, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, - {PA_2, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {PA_10, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_PartialRemap1_USART1_ENABLE)}, // was PB_10 AFIO_NONE, now: alternative PA10 for TX1_1 + {PA_2, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, // was PA_2 {PB_3, USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {PB_0, USART4, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {NC, NP, 0} @@ -121,8 +121,8 @@ WEAK const PinMap PinMap_UART_TX[] = { #ifdef UART_MODULE_ENABLED WEAK const PinMap PinMap_UART_RX[] = { - {PB_11, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, - {PA_3, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {PA_11, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_PartialRemap1_USART1_ENABLE)}, // was PB_11 AFIO_NONE, now: alternative PA11 for RX1_1 + {PA_3, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, // was PA_3 {PB_4, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, {PB_1, USART4, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, {NC, NP, 0} @@ -131,8 +131,8 @@ WEAK const PinMap PinMap_UART_RX[] = { #ifdef UART_MODULE_ENABLED WEAK const PinMap PinMap_UART_RTS[] = { - {PC_17, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, - {PA_1, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, + {PC_17, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, // was PC_17 + {PA_1, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, // was PA_1 {PB_7, USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {PA_8, USART4, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)}, {NC, NP, 0} @@ -141,8 +141,8 @@ WEAK const PinMap PinMap_UART_RTS[] = { #ifdef UART_MODULE_ENABLED WEAK const PinMap PinMap_UART_CTS[] = { - {PC_16, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, - {PA_0, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, + {PC_16, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, // was PC_16 + {PA_0, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, // was PA_0 {PB_6, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, {PB_15, USART4, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)}, {NC, NP, 0} diff --git a/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h index 6f81350..d119a1c 100644 --- a/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h +++ b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h @@ -13,13 +13,11 @@ #pragma once /* ENABLE Peripherals */ -#ifndef IDE_MENU_PERIPHERALS // defined when peripherals are enabled/disabled via the IDE menu -#define ADC_MODULE_ENABLED -#define UART_MODULE_ENABLED -#define SPI_MODULE_ENABLED -#define I2C_MODULE_ENABLED -#define TIM_MODULE_ENABLED -#endif +//#define ADC_MODULE_ENABLED +//#define UART_MODULE_ENABLED +//#define SPI_MODULE_ENABLED +//#define I2C_MODULE_ENABLED +//#define TIM_MODULE_ENABLED /* CH32VX033F8P6 Pins */ #define PA0 PIN_A0 @@ -107,19 +105,71 @@ // UART Definitions -#ifndef SERIAL_UART_INSTANCE - #define SERIAL_UART_INSTANCE 1 +#ifndef SERIAL_UART_INSTANCES + // Define the number of UART instances that can be used. + // For CH32X033F8P6 SSOP20 the supported maximum is currently two. + // These are UART1 and UART2 on pins PA10=TX1_1, PA11=RX1_1 and on PA2=TX2, PA3=RX2 + // (two instances will cost 132/136 bytes more flash/ram than one instance) + #define SERIAL_UART_INSTANCES 2 // select 1 or 2 instances +#endif + +#if (SERIAL_UART_INSTANCES==1) + // If using only one UART inactance, select which to use: UART1 or UART2 + #ifndef SERIAL_UART_INSTANCE + // #define SERIAL_UART_INSTANCE 1 // UART1: PA10=TX1_1, PA11=RX1_1 + #define SERIAL_UART_INSTANCE 2 // UART2: PA2=TX2, PA3=RX2 + #endif +#else + // multiple instances, max 2 for CH32X033F8P SSOP20 + // NOTE: do not define SERIAL_UART_INSTANCE when using multiple instances! + #undef SERIAL_UART_INSTANCE + #define ENABLE_HWSERIAL1 1 + #define ENABLE_HWSERIAL2 1 #endif + // Default pin used for generic 'Serial' instance // Mandatory for Firmata -// For CH32X033F8P6 serial pins RX2=PA3, TX2=PA2 -#ifndef PIN_SERIAL_RX - #define PIN_SERIAL_RX PA3 // PB11 -#endif -#ifndef PIN_SERIAL_TX - #define PIN_SERIAL_TX PA2 // PB10 +// For CH32X033F8P6 serial pins RX2=PA3/TX2=PA2 or alternative RX1_1=PA11/TX1_1=PA10 + +// Pins used for Serial2 instance (used by HardwareSerial constructor) +#if (SERIAL_UART_INSTANCES==1) + // one single UART instance, specify which oins to be used + #if (SERIAL_UART_INSTANCE==1) + // Use UART1 alternative pins RX1_1/TX1_1 (PA11/PA10) + #ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA11 + #endif + #ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA10 + #endif + #elif (SERIAL_UART_INSTANCE==2) + // Use UART2 RX2/TX2 (PA3/PA2) + #ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA3 + #endif + #ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 + #endif + #endif +#else + // multiple instances. Define each pin for each UART (Serial=Serial2) + #define Serial Serial2 // specify which UART to use as 'Serial' + #ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA11 // supported: PA3=RX2, alternative PA11=RX1_1 (X035: PB11) + #endif + #ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA10 // supported: PA2=TX2, alternative PA10=TX1_1 (X035: PB10) + #endif + #ifndef PIN_SERIAL_RX2 + #define PIN_SERIAL_RX2 PA3 // supported: PA3=RX2, alternative PA11=RX1_1 (X035: PB11) + #endif + #ifndef PIN_SERIAL_TX2 + #define PIN_SERIAL_TX2 PA2 // supported: PA2=TX2, alternative PA10=TX1_1 (X035: PB10) + #endif #endif + + /*---------------------------------------------------------------------------- * Arduino objects - C++ only *----------------------------------------------------------------------------*/ From c42649d0b0ea31ae842ed2f6fb804009604bce05 Mon Sep 17 00:00:00 2001 From: Maxint R&D Date: Tue, 6 May 2025 12:50:03 +0200 Subject: [PATCH 14/14] Enable all peripherals when IDE_MENU_PERIPHERALS is not defined [committed once more] --- variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h index d119a1c..9079f2b 100644 --- a/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h +++ b/variants/CH32X035/CH32X033F8P/variant_CH32X033F8P.h @@ -13,11 +13,13 @@ #pragma once /* ENABLE Peripherals */ -//#define ADC_MODULE_ENABLED -//#define UART_MODULE_ENABLED -//#define SPI_MODULE_ENABLED -//#define I2C_MODULE_ENABLED -//#define TIM_MODULE_ENABLED +#ifndef IDE_MENU_PERIPHERALS // defined when peripherals are enabled/disabled via the IDE menu +#define ADC_MODULE_ENABLED +#define UART_MODULE_ENABLED +#define SPI_MODULE_ENABLED +#define I2C_MODULE_ENABLED +#define TIM_MODULE_ENABLED +#endif /* CH32VX033F8P6 Pins */ #define PA0 PIN_A0