Dear Team
First of all 非常感谢你门 for attempting of opening your PDK up to the public!🙏
Our team at LibreSilicon (libresilicon.com) however noticed, when we wanted to introduce initial support for your process in our LibrePDK component generator and Standard Cell Generator, that you're not providing the basic design rules for doing so. What we need is the minimum widths of the diffusion areas, etc. so that we can generate transistors and so.
LibrePDK: https://gitlab.libresilicon.com/generator-tools/librepdk
Standard Cell Generator: https://gitlab.libresilicon.com/generator-tools/standard-cell-generator
Please provide those DRC rules in any format you have it (中文没问题)🤝
Thanks!🙏
Dear Team
First of all 非常感谢你门 for attempting of opening your PDK up to the public!🙏
Our team at LibreSilicon (libresilicon.com) however noticed, when we wanted to introduce initial support for your process in our LibrePDK component generator and Standard Cell Generator, that you're not providing the basic design rules for doing so. What we need is the minimum widths of the diffusion areas, etc. so that we can generate transistors and so.
LibrePDK: https://gitlab.libresilicon.com/generator-tools/librepdk
Standard Cell Generator: https://gitlab.libresilicon.com/generator-tools/standard-cell-generator
Please provide those DRC rules in any format you have it (中文没问题)🤝
Thanks!🙏