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tests: zephyr: drivers: comparators: Add support for nRF7120
Add all support required for nRF7120 to compile tests successfully, can't be tested with FPGA. Signed-off-by: Robert Robinson <[email protected]>
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CONFIG_TEST_COMP_SE_PSEL_AIN_INDEX=0
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CONFIG_TEST_COMP_SE_EXTREFSEL_AIN_INDEX=5
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CONFIG_TEST_COMP_DIFF_PSEL_AIN_INDEX=1
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CONFIG_TEST_COMP_DIFF_EXTREFSEL_AIN_INDEX=0
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/* Two loopbacks are used
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* Each loopback is between analog input and GPIO.
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* first-gpios (P0.02) -> AIN1 (P0.01)
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* second-gpios (P0.03, AIN3) -> (P0.00, AIN0)
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* AIN5 (P0.05) -> VDD
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*/
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/ {
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aliases {
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test-comp = &comp;
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};
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zephyr,user {
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first-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
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second-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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};
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};
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&gpio0 {
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status = "okay";
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};
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&comp {
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status = "okay";
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psel = "AIN4";
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refsel = "AREF";
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extrefsel= "AIN3";
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sp-mode = "LOW";
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th-up = <36>;
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th-down = <30>;
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isource = "DISABLED";
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enable-hyst;
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};

tests/zephyr/boards/nrf/comp/testcase.yaml

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platform_allow:
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- nrf54lv10dk/nrf54lv10a/cpuapp
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- [email protected]/nrf54lv10a/cpuapp
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- nrf7120pdk/nrf7120/cpuapp
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integration_platforms:
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- nrf54lv10dk/nrf54lv10a/cpuapp
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- nrf7120pdk/nrf7120/cpuapp
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#include <zephyr/dt-bindings/gpio/gpio.h>
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/*
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* P0.03 looped back to P0.00
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*/
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/ {
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aliases {
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test-comp = &comp;
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};
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zephyr,user {
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test-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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};
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};
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&gpio0 {
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status = "okay";
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};
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&comp {
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main-mode = "SE";
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psel = "AIN0"; /* P0.00 */
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refsel = "INT_1V2";
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sp-mode = "HIGH";
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th-up = <63>;
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th-down = <59>;
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isource = "DISABLED";
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status = "okay";
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};
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&comp {
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compatible = "nordic,nrf-lpcomp";
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psel = "AIN0"; /* P0.00 */
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refsel = "VDD_4_8";
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status = "okay";
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};

tests/zephyr/drivers/comparator/gpio_loopback/testcase.yaml

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- nrf54lv10dk/nrf54lv10a/cpuapp
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- [email protected]/nrf54lv10a/cpuapp
1111
- nrf54lv10dk/nrf54lv10a/cpuapp/ns
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- nrf7120pdk/nrf7120/cpuapp
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integration_platforms:
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- nrf54lv10dk/nrf54lv10a/cpuapp
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- nrf7120pdk/nrf7120/cpuapp
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tests:
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nrf.extended.drivers.comparator.gpio_loopback.nrf_comp:
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extra_args:

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