[kernel][x86] Add support for spinlock

bherrera · bherrera · commit 1f98c562681b · 2025-05-27T11:07:19.000-03:00
diff --git a/slipstream/kernel/arch/x86/spin_lock.zig b/slipstream/kernel/arch/x86/spin_lock.zig
@@ -0,0 +1,70 @@
+//! Copyright 2025 The Drift Authors. All rights reserved.
+//! Use of this source code is governed by a BSD-style license that can be
+//! found in the LICENSE file.
+
+const std = @import("std");
+const assert = @import("../../kernel/assert.zig");
+const mp = @import("mp.zig");
+const arch = @import("../../lib/arch/x86/intrin.zig");
+const ArchSpinLock = @import("../../kernel/arch/SpinLock.zig");
+
+inline fn archSpinLockCore(lock: *ArchSpinLock, val: u32) void {
+    var expected: u32 = 0;
+    while (!lock.value.cmpxchgWeak(&expected, val, .acquire, .monotonic)) {
+        expected = 0;
+        while (lock.value.load(.monotonic) != 0) {
+            arch.yield();
+        }
+    }
+
+    //assert_lock_held
+    assert.assert(@src(), lock.value.load(.monotonic) == val);
+}
+
+/// Non-instrumented spinlock acquisition
+pub fn archSpinLockNonInstrumented(lock: *ArchSpinLock) void {
+    const percpu = mp.x86_get_percpu();
+    const val = percpu.cpu_num + 1;
+    archSpinLockCore(lock, val);
+    percpu.num_spinlocks += 1;
+}
+
+/// Trace-instrumented spinlock acquisition
+pub fn archSpinLockTraceInstrumented(lock: *ArchSpinLock, _: u32) void {
+    const percpu = mp.x86_get_percpu();
+    const val = percpu.cpu_num + 1;
+
+    // If this lock acquisition is trace instrumented, try to obtain the lock once
+    // before we decide that we need to spin and produce spin trace events.
+    var expected: u32 = 0;
+    if (lock.value.cmpxchgWeak(&expected, val, .acquire, .monotonic)) {
+        percpu.num_spinlocks += 1;
+        //assert_lock_held
+        assert.assert(@src(), lock.value.load(.monotonic) == val);
+        return;
+    }
+
+    // TODO: Add spin tracing
+    archSpinLockCore(lock, val);
+    // TODO: Finish spin tracing
+
+    percpu.num_spinlocks += 1;
+}
+
+/// Try to acquire spinlock without waiting
+pub fn archSpinTryLock(lock: *ArchSpinLock) bool {
+    const percpu = mp.x86_get_percpu();
+    const val = percpu.cpu_num + 1;
+
+    var expected: u32 = 0;
+    if (lock.value.cmpxchgWeak(&expected, val, .acquire, .monotonic)) {
+        percpu.num_spinlocks += 1;
+        return true;
+    }
+    return false;
+}
+
+pub fn archSpinUnlock(lock: *ArchSpinLock) void {
+    mp.x86_get_percpu().num_spinlocks -= 1;
+    lock.value.store(0, .release);
+}
diff --git a/slipstream/kernel/kernel/arch/SpinLock.zig b/slipstream/kernel/kernel/arch/SpinLock.zig
@@ -0,0 +1,42 @@
+//! Copyright 2025 The Drift Authors. All rights reserved.
+//! Use of this source code is governed by a BSD-style license that can be
+//! found in the LICENSE file.
+
+const std = @import("std");
+const builtin = @import("builtin");
+const cpu = @import("../cpu.zig");
+const arch = @import("../arch/mp.zig").Impl;
+const spin_tracing_config = @import("../spin_tracing_config.zig");
+const SpinLock = @This();
+
+const CpuNum = cpu.CpuNum;
+
+pub const Impl = if (builtin.cpu.arch == .x86_64)
+    @import("../../arch/x86/spin_lock.zig")
+else
+    @compileError("Unsupported architecture: " ++ @tagName(builtin.cpu.arch));
+
+value: std.atomic.Value(CpuNum),
+
+impl: Impl = .{},
+
+pub inline fn archSpinLock(self: *SpinLock) void {
+    if (comptime std.builtin.mode == .Debug) {
+        //const elid = spin_tracing.EncodedLockId{
+        //    .lock_type = .spinlock,
+        //    .lock_id = @intFromPtr(self),
+        //    .class_id = fxt.InternedString.invalid_id,
+        //};
+        //self.impl.spinLockInstrumented(self, elid);
+    } else {
+        self.impl.archSpinLockNonInstrumented(self);
+    }
+}
+
+pub inline fn spinLockHolderCpu(lock: *const SpinLock) CpuNum {
+    return lock.value.load(.monotonic) - 1;
+}
+
+pub inline fn spinLockHeld(lock: *const SpinLock) bool {
+    return spinLockHolderCpu(lock) == arch.currCpuNum();
+}
diff --git a/slipstream/kernel/kernel/spin_lock.zig b/slipstream/kernel/kernel/spin_lock.zig
@@ -0,0 +1,110 @@
+//! Copyright 2025 The Drift Authors. All rights reserved.
+//! Use of this source code is governed by a BSD-style license that can be
+//! found in the LICENSE file.
+
+const std = @import("std");
+const assert = @import("assert.zig");
+const cpu = @import("cpu.zig");
+const ArchSpinLock = @import("arch/SpinLock.zig");
+
+const arch = ArchSpinLock.Impl;
+
+/// Options for controlling SpinLock behavior
+pub const SpinLockOptions = packed struct(u3) {
+    /// No special options
+    none: bool = false,
+
+    /// Enable integration with the lockup_detector to monitor spinlock critical sections.
+    ///
+    /// See //zircon/kernel/lib/lockup_detector/README.md.
+    monitored: bool = false,
+
+    /// Disable tracing
+    trace_disabled: bool = false,
+};
+
+/// Base spinlock implementation with configurable options
+pub fn SpinLockBase(comptime options: SpinLockOptions) type {
+    return struct {
+        const Self = @This();
+
+        spinlock: ArchSpinLock = .{ .value = undefined },
+
+        /// Acquire the spinlock
+        /// Interrupts must already be disabled
+        pub fn acquire(self: *Self) void {
+            assert.debug_assert(@src(), !options.monitored);
+            //assert.debug_assert(@src(), arch.intsDisabled());
+            assert.debug_assert(@src(), !arch.spinLockHeld(&self.spinlock));
+
+            if (options.trace_disabled) {
+                arch.spinLockNonInstrumented(&self.spinlock);
+            } else {
+                arch.spinLockTraceInstrumented(&self.spinlock, 0); // TODO: Add lock ID
+            }
+        }
+
+        /// Acquire with monitoring
+        pub fn acquireMonitored(self: *Self, _: []const u8) void {
+            assert.debug_assert(@src(), options.monitored);
+            assert.debug_assert(@src(), arch.intsDisabled());
+            assert.debug_assert(@src(), !arch.spinLockHeld(&self.spinlock));
+
+            // TODO: Add lockup detector integration
+            if (options.trace_disabled) {
+                arch.spinLockNonInstrumented(&self.spinlock);
+            } else {
+                arch.spinLockTraceInstrumented(&self.spinlock, 0);
+            }
+        }
+
+        /// Try to acquire the spinlock without waiting
+        pub fn tryAcquire(self: *Self) bool {
+            assert.debug_assert(@src(), !options.monitored);
+            return arch.spinTryLock(&self.spinlock);
+        }
+
+        /// Try to acquire with monitoring
+        pub fn tryAcquireMonitored(self: *Self, _: []const u8) bool {
+            assert.debug_assert(@src(), options.monitored);
+            const failed = arch.spinTryLock(&self.spinlock);
+            if (!failed) {
+                // TODO: Add lockup detector integration
+            }
+            return failed;
+        }
+
+        /// Release the spinlock
+        pub fn release(self: *Self) void {
+            arch.spinUnlock(&self.spinlock);
+            if (options.monitored) {
+                // TODO: Add lockup detector integration
+            }
+        }
+
+        /// Check if held by current CPU
+        pub fn isHeld(self: *const Self) bool {
+            assert.debug_assert(@src(), arch.intsDisabled());
+            return arch.spinLockHeld(&self.spinlock);
+        }
+
+        /// Assert that lock is held
+        pub fn assertHeld(self: *const Self) void {
+            assert(@src(), self.isHeld());
+        }
+
+        /// Get CPU holding the lock
+        pub fn holderCpu(self: *const Self) u32 {
+            return arch.spinLockHolderCpu(&self.spinlock);
+        }
+    };
+}
+
+/// Standard spinlock without monitoring
+pub const SpinLock = SpinLockBase(.{ .none = true });
+
+//Spinlock with lockup detection
+pub const MonitoredSpinLock = SpinLockBase(.{ .monitored = true });
+
+// Spinlock with tracing disabled
+pub const TraceDisabledSpinLock = SpinLockBase(.{ .trace_disabled = true });
diff --git a/slipstream/kernel/kernel/spin_tracing_config.zig b/slipstream/kernel/kernel/spin_tracing_config.zig
@@ -0,0 +1,142 @@
+//! Copyright 2025 The Drift Authors. All rights reserved.
+//! Use of this source code is governed by a BSD-style license that can be
+//! found in the LICENSE file.
+
+const std = @import("std");
+
+pub const build_options = @import("build_options");
+
+pub const scheduler_lock_spin_tracing_enabled = build_options.SCHEDULER_LOCK_SPIN_TRACING_ENABLED;
+pub const scheduler_lock_spin_tracing_compressed = build_options.SCHEDULER_LOCK_SPIN_TRACING_COMPRESSED;
+
+comptime {
+    if (scheduler_lock_spin_tracing_compressed and !scheduler_lock_spin_tracing_enabled) {
+        @compileError("Error: Compress lock-spin trace records requested, but lock-spin tracing is not enabled.");
+    }
+}
+
+pub const LockType = enum(u2) {
+    spinlock = 0,
+    mutex = 1,
+    chain_lock = 2,
+    rw_lock = 3,
+};
+
+pub const FinishType = enum(u1) {
+    lock_acquired = 0,
+    blocked = 1,
+};
+
+pub const EncodedLockId = struct {
+    const Self = @This();
+
+    value: u64 = 0,
+
+    const IdBits = struct {
+        const bits: u32 = 49;
+        const shift: u32 = 0;
+        const mask: u64 = ((@as(u64, 1) << bits) - 1);
+
+        fn encode(val: u64) u64 {
+            return (val & mask) << shift;
+        }
+
+        fn decode(val: u64) u64 {
+            return (val >> shift) & mask;
+        }
+
+        fn reset(old_val: u64, new_val: u64) u64 {
+            return (old_val & ~(mask << shift)) | ((new_val & mask) << shift);
+        }
+    };
+
+    const ClassNameBits = struct {
+        const bits: u32 = 12;
+        const shift: u32 = 49;
+        const mask: u64 = ((@as(u64, 1) << bits) - 1);
+
+        fn encode(val: u16) u64 {
+            return (@as(u64, val) & mask) << shift;
+        }
+
+        fn decode(val: u64) u16 {
+            return @intCast((val >> shift) & mask);
+        }
+
+        fn reset(old_val: u64, new_val: u16) u64 {
+            return (old_val & ~(mask << shift)) | ((@as(u64, new_val) & mask) << shift);
+        }
+    };
+
+    const LockTypeBits = struct {
+        const bits: u32 = 2;
+        const shift: u32 = 61;
+        const mask: u64 = ((@as(u64, 1) << bits) - 1);
+
+        fn encode(val: LockType) u64 {
+            return (@as(u64, @intFromEnum(val)) & mask) << shift;
+        }
+
+        fn decode(val: u64) LockType {
+            return @enumFromInt(@intFromEnum((val >> shift) & mask));
+        }
+
+        fn reset(old_val: u64, new_val: LockType) u64 {
+            return (old_val & ~(mask << shift)) | ((@as(u64, @intFromEnum(new_val)) & mask) << shift);
+        }
+    };
+
+    const FinishTypeBits = struct {
+        const bits: u32 = 1;
+        const shift: u32 = 63;
+        const mask: u64 = ((@as(u64, 1) << bits) - 1);
+
+        fn encode(val: FinishType) u64 {
+            return (@as(u64, @intFromEnum(val)) & mask) << shift;
+        }
+
+        fn decode(val: u64) FinishType {
+            return @enumFromInt(@intFromEnum((val >> shift) & mask));
+        }
+
+        fn reset(old_val: u64, new_val: FinishType) u64 {
+            return (old_val & ~(mask << shift)) | ((@as(u64, @intFromEnum(new_val)) & mask) << shift);
+        }
+    };
+
+    pub fn init(lock_type: LockType, lock_id: u64, class_name_id: u16) Self {
+        return .{
+            .value = LockTypeBits.encode(lock_type) |
+                IdBits.encode(lock_id) |
+                ClassNameBits.encode(class_name_id),
+        };
+    }
+
+    pub fn invalid() Self {
+        return .{};
+    }
+
+    pub fn setLockClassId(self: *Self, class_name_id: u16) void {
+        self.value = ClassNameBits.reset(self.value, class_name_id);
+    }
+
+    pub fn finishedValue(self: *const Self, finish_type: FinishType) u64 {
+        return self.value | FinishTypeBits.encode(finish_type);
+    }
+
+    pub fn id(self: *const Self) u64 {
+        return IdBits.decode(self.value);
+    }
+
+    pub fn className(self: *const Self) u16 {
+        return ClassNameBits.decode(self.value);
+    }
+
+    pub fn lockType(self: *const Self) LockType {
+        return LockTypeBits.decode(self.value);
+    }
+
+    pub fn finishType(self: *const Self) FinishType {
+        return FinishTypeBits.decode(self.value);
+    }
+};
diff --git a/slipstream/kernel/kernel/spin_tracing_storage.zig b/slipstream/kernel/kernel/spin_tracing_storage.zig
