fix: vendor part

deepak1556 · deepak1556 · commit 05c7fbd12b78 · 2023-11-22T13:25:29.000+09:00
diff --git a/aarch64-gcc-8.5.0-glibc-2.28.config b/aarch64-gcc-8.5.0-glibc-2.28.config
@@ -155,7 +155,7 @@ CT_ARCH_ARM_SHOW=y
 CT_ARCH_ARM_PKG_KSYM=""
 CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA"
 CT_ARCH_SUFFIX=""
-# CT_OMIT_TARGET_VENDOR is not set
+CT_OMIT_TARGET_VENDOR=y
 
 #
 # Generic target options
@@ -212,7 +212,6 @@ CT_TOOLCHAIN_BUGURL=""
 #
 # Tuple completion and aliasing
 #
-CT_TARGET_VENDOR="vscode"
 CT_TARGET_ALIAS_SED_EXPR=""
 CT_TARGET_ALIAS=""
 
diff --git a/armhf-gcc-8.5.0-glibc-2.28.config b/armhf-gcc-8.5.0-glibc-2.28.config
@@ -226,7 +226,7 @@ CT_TOOLCHAIN_BUGURL=""
 #
 # Tuple completion and aliasing
 #
-CT_TARGET_VENDOR="vscode"
+CT_TARGET_VENDOR="rpi"
 CT_TARGET_ALIAS_SED_EXPR=""
 CT_TARGET_ALIAS=""
 
diff --git a/x86_64-gcc-8.5.0-glibc-2.28.config b/x86_64-gcc-8.5.0-glibc-2.28.config
@@ -155,7 +155,7 @@ CT_ARCH_X86_SHOW=y
 CT_ARCH_X86_PKG_KSYM=""
 CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA"
 CT_ARCH_SUFFIX=""
-# CT_OMIT_TARGET_VENDOR is not set
+CT_OMIT_TARGET_VENDOR=y
 
 #
 # Generic target options
@@ -204,7 +204,6 @@ CT_TOOLCHAIN_BUGURL=""
 #
 # Tuple completion and aliasing
 #
-CT_TARGET_VENDOR="vscode"
 CT_TARGET_ALIAS_SED_EXPR=""
 CT_TARGET_ALIAS=""
 

Original file line number	Diff line number	Diff line change
`@@ -155,7 +155,7 @@ CT_ARCH_ARM_SHOW=y`
`155`	`155`	`CT_ARCH_ARM_PKG_KSYM=""`
`156`	`156`	`CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA"`
`157`	`157`	`CT_ARCH_SUFFIX=""`
`158`		`-# CT_OMIT_TARGET_VENDOR is not set`
	`158`	`+CT_OMIT_TARGET_VENDOR=y`
`159`	`159`
`160`	`160`	`#`
`161`	`161`	`# Generic target options`
`@@ -212,7 +212,6 @@ CT_TOOLCHAIN_BUGURL=""`
`212`	`212`	`#`
`213`	`213`	`# Tuple completion and aliasing`
`214`	`214`	`#`
`215`		`-CT_TARGET_VENDOR="vscode"`
`216`	`215`	`CT_TARGET_ALIAS_SED_EXPR=""`
`217`	`216`	`CT_TARGET_ALIAS=""`
`218`	`217`
Original file line number	Diff line number	Diff line change
`@@ -226,7 +226,7 @@ CT_TOOLCHAIN_BUGURL=""`
`226`	`226`	`#`
`227`	`227`	`# Tuple completion and aliasing`
`228`	`228`	`#`
`229`		`-CT_TARGET_VENDOR="vscode"`
	`229`	`+CT_TARGET_VENDOR="rpi"`
`230`	`230`	`CT_TARGET_ALIAS_SED_EXPR=""`
`231`	`231`	`CT_TARGET_ALIAS=""`
`232`	`232`
Original file line number	Diff line number	Diff line change
`@@ -155,7 +155,7 @@ CT_ARCH_X86_SHOW=y`
`155`	`155`	`CT_ARCH_X86_PKG_KSYM=""`
`156`	`156`	`CT_ALL_ARCH_CHOICES="ALPHA ARC ARM AVR BPF C6X LOONGARCH M68K MICROBLAZE MIPS MOXIE MSP430 NIOS2 POWERPC PRU RISCV S390 SH SPARC X86 XTENSA"`
`157`	`157`	`CT_ARCH_SUFFIX=""`
`158`		`-# CT_OMIT_TARGET_VENDOR is not set`
	`158`	`+CT_OMIT_TARGET_VENDOR=y`
`159`	`159`
`160`	`160`	`#`
`161`	`161`	`# Generic target options`
`@@ -204,7 +204,6 @@ CT_TOOLCHAIN_BUGURL=""`
`204`	`204`	`#`
`205`	`205`	`# Tuple completion and aliasing`
`206`	`206`	`#`
`207`		`-CT_TARGET_VENDOR="vscode"`
`208`	`207`	`CT_TARGET_ALIAS_SED_EXPR=""`
`209`	`208`	`CT_TARGET_ALIAS=""`
`210`	`209`