ci fixes and error handling

Author: babayet2

tmk/tmk_vmm/src/load.rs

@@ -41,7 +41,7 @@ pub fn load_x86(
     let page_table_base = load_info.next_available_address;
     let mut page_table_work_buffer: Vec<page_table::x64::PageTable> =
         vec![page_table::x64::PageTable::new_zeroed(); page_table::x64::PAGE_TABLE_MAX_COUNT];
-    let mut page_tables: Vec<u8> = vec![0 as u8; page_table::x64::PAGE_TABLE_MAX_BYTES];
+    let mut page_tables: Vec<u8> = vec![0; page_table::x64::PAGE_TABLE_MAX_BYTES];
     let page_table_builder = page_table::x64::IdentityMapBuilder::new(
         page_table_base,
         page_table::IdentityMapSize::Size4Gb,
@@ -56,7 +56,7 @@ pub fn load_x86(
             page_tables.len() as u64 >> 12,
             "page_tables",
             loader::importer::BootPageAcceptance::Exclusive,
-            &page_tables,
+            page_tables,
         )
         .context("failed to import page tables")?;
 

vm/loader/page_table/src/aarch64.rs

@@ -713,6 +713,7 @@ mod tests {
     extern crate std;
 
     use super::*;
+    use std::vec;
 
     const DUMP_PAGE_TABLES: bool = false;
 

vm/loader/page_table/src/lib.rs

@@ -15,9 +15,11 @@ use thiserror::Error;
 /// Errors returned by the Page Table Builder
 #[derive(Debug, PartialEq, Eq, Error)]
 pub enum Error {
-    /// The page table [u8] buffer does not match the size of the [PageTable] buffer
-    #[error("bad buffer size")]
-    BadBufferSize,
+    /// The PageTableBuilder bytes buffer does not match the size of the struct buffer
+    #[error(
+        "PageTableBuilder bytes buffer size [{bytes_buf}] does not match the struct buffer size [{struct_buf}]"
+    )]
+    BadBufferSize { bytes_buf: usize, struct_buf: usize },
 }
 
 /// Size of the initial identity map

vm/loader/page_table/src/x64.rs

@@ -348,7 +348,10 @@ impl PageTableBuilder {
         flattened_page_table: &'a mut [u8],
     ) -> Result<&'a [u8], Error> {
         if flattened_page_table.len() != (page_table.len() * PAGE_TABLE_SIZE) {
-            return Err(Error::BadBufferSize);
+            return Err(Error::BadBufferSize {
+                bytes_buf: flattened_page_table.len(),
+                struct_buf: page_table.len() * PAGE_TABLE_SIZE,
+            });
         }
 
         const SIZE_512_GB: u64 = 0x8000000000;
@@ -546,7 +549,10 @@ impl IdentityMapBuilder {
         flattened_page_table: &'a mut [u8],
     ) -> Result<&'a [u8], Error> {
         if flattened_page_table.len() != (page_table.len() * PAGE_TABLE_SIZE) {
-            return Err(Error::BadBufferSize);
+            return Err(Error::BadBufferSize {
+                bytes_buf: flattened_page_table.len(),
+                struct_buf: page_table.len() * PAGE_TABLE_SIZE,
+            });
         }
         // Allocate page tables. There are up to 6 total page tables:
         //      1 PML4E (Level 4) (omitted if the address bias is non-zero)