This is the DXC side of llvm/offload-test-suite#1037
Description
DXC's SPIR-V codegen emits an Unknown image format for [RW]Buffer<uint64_t2/int64_t2> because SPIR-V has no multi-component 64-bit image format for the 2-component 64-bit element to lower to. This ultimately generates incorrect outputs in the offload-test-suite (see the discussion in llvm/offload-test-suite#1037 for more explanation on how).
Repro
https://godbolt.org/z/bWshMxheq
RWBuffer<uint64_t2> U0 : register(u0);
RWBuffer<uint64_t> Out0 : register(u1);
[numthreads(4,1,1)]
void main(uint GI : SV_GroupIndex) {
Out0[GI] = U0[GI].x;
}
OpTypeImage %ulong Buffer 2 0 0 2 Unknown
Requested Fix
DXC should pack 2-component 64-bit typed buffer elements into 4-component 32-bit images and bitcast during load/store. This matches how DirectX already handles these buffers: uint64_t2/int64_t2 elements are backed by 4x32-bit channels and reinterpreted in the shader.
This same fix is being made in Clang: llvm/llvm-project#208626
Description
DXC's SPIR-V codegen emits an
Unknownimage format for[RW]Buffer<uint64_t2/int64_t2>because SPIR-V has no multi-component 64-bit image format for the 2-component 64-bit element to lower to. This ultimately generates incorrect outputs in the offload-test-suite (see the discussion in llvm/offload-test-suite#1037 for more explanation on how).Repro
https://godbolt.org/z/bWshMxheq
Requested Fix
DXC should pack 2-component 64-bit typed buffer elements into 4-component 32-bit images and bitcast during load/store. This matches how DirectX already handles these buffers:
uint64_t2/int64_t2elements are backed by 4x32-bit channels and reinterpreted in the shader.This same fix is being made in Clang: llvm/llvm-project#208626