From f4cbe909c7e0bf505ebefc958e7d1541956b8630 Mon Sep 17 00:00:00 2001 From: Pavel Kopyl Date: Wed, 24 Jul 2024 18:53:44 +0200 Subject: [PATCH] [EraVM][AsmParser] Support basic block names in .cell directives. This resolves the issue #624. --- .../Target/EraVM/AsmParser/EraVMAsmParser.cpp | 22 ++++- llvm/test/MC/EraVM/asm-parser/jumptable.s | 83 +++++++++++++++++++ llvm/test/MC/EraVM/encoding/jump-table.ll | 11 +++ 3 files changed, 115 insertions(+), 1 deletion(-) create mode 100644 llvm/test/MC/EraVM/asm-parser/jumptable.s diff --git a/llvm/lib/Target/EraVM/AsmParser/EraVMAsmParser.cpp b/llvm/lib/Target/EraVM/AsmParser/EraVMAsmParser.cpp index 55bf3c14cc88..e1b12d2d34cb 100644 --- a/llvm/lib/Target/EraVM/AsmParser/EraVMAsmParser.cpp +++ b/llvm/lib/Target/EraVM/AsmParser/EraVMAsmParser.cpp @@ -219,6 +219,11 @@ class EraVMOperand : public MCParsedAsmOperand { Reg = RegNo; } + const MCExpr *getImm() const { + assert(Kind == k_Imm && "Invalid access!"); + return Imm; + } + static std::unique_ptr CreateToken(StringRef Str, SMLoc S) { return std::make_unique(S, S, Str); } @@ -710,12 +715,27 @@ bool EraVMAsmParser::ParseDirective(AsmToken DirectiveID) { return false; } if (DirectiveID.getString() == ".cell") { - // At now, assume exactly one signed integer follows. + // At now, assume either one signed integer or a BB name follows. // If an arbitrary MCExpr should be accepted as well, an MCTargetExpr // for 256-bit integer constant can be implemented and provided to // parseExpression machinery by overriding the parsePrimaryExpr // function in this class. + SmallVector, 1> Operands; + if (MatchOperand_Success == tryParseJumpTargetOperand(Operands)) { + assert(Operands.size() == 1); + const MCExpr *Imm = + static_cast(Operands[0].get())->getImm(); + + if (parseEOL()) + return true; + + auto *TS = getStreamer().getTargetStreamer(); + static_cast(TS)->emitJumpTarget(Imm); + + return false; + } + bool IsNegated = false; if (getTok().is(AsmToken::Minus)) { IsNegated = true; diff --git a/llvm/test/MC/EraVM/asm-parser/jumptable.s b/llvm/test/MC/EraVM/asm-parser/jumptable.s new file mode 100644 index 000000000000..36718cf86ecb --- /dev/null +++ b/llvm/test/MC/EraVM/asm-parser/jumptable.s @@ -0,0 +1,83 @@ +; RUN: llvm-mc -triple eravm -filetype=asm %s -o - | FileCheck %s + + .text + .globl test +test: + add r1, r0, r4 + add r0, r0, r1 + sub.s! 10, r3, r5 + jump.le @JTI0_0[r3] + jump @.BB0_7 +.BB0_1: + add r4, r2, r1 + ret +.BB0_2: + sub r4, r2, r1 + ret +.BB0_3: + mul r4, r2, r1, r2 + ret +.BB0_4: + sub! r2, r0, r1 + jump.eq @.BB0_5 + div r4, r2, r1, r2 +.BB0_7: + ret +.BB0_5: + add r0, r0, r1 + ret + .rodata + .p2align 5, 0x0 +JTI0_0: + .cell @.BB0_1 + .cell @.BB0_2 + .cell @.BB0_3 + .cell @.BB0_7 + .cell @.BB0_7 + .cell @.BB0_7 + .cell @.BB0_7 + .cell @.BB0_7 + .cell @.BB0_7 + .cell @.BB0_7 + .cell @.BB0_4 + +; CHECK: .text +; CHECK: .globl test +; CHECK: test: +; CHECK: add r1, r0, r4 +; CHECK: add r0, r0, r1 +; CHECK: sub.s! 10, r3, r5 +; CHECK: jump.le @JTI0_0[r3] +; CHECK: jump @.BB0_7 +; CHECK: .BB0_1: +; CHECK: add r4, r2, r1 +; CHECK: ret +; CHECK: .BB0_2: +; CHECK: sub r4, r2, r1 +; CHECK: ret +; CHECK: .BB0_3: +; CHECK: mul r4, r2, r1, r2 +; CHECK: ret +; CHECK: .BB0_4: +; CHECK: sub! r2, r0, r1 +; CHECK: jump.eq @.BB0_5 +; CHECK: div r4, r2, r1, r2 +; CHECK: .BB0_7: +; CHECK: ret +; CHECK: .BB0_5: +; CHECK: add r0, r0, r1 +; CHECK: ret +; CHECK: .rodata +; CHECK: .p2align 5, 0x0 +; CHECK: JTI0_0: +; CHECK: .cell @.BB0_1 +; CHECK: .cell @.BB0_2 +; CHECK: .cell @.BB0_3 +; CHECK: .cell @.BB0_7 +; CHECK: .cell @.BB0_7 +; CHECK: .cell @.BB0_7 +; CHECK: .cell @.BB0_7 +; CHECK: .cell @.BB0_7 +; CHECK: .cell @.BB0_7 +; CHECK: .cell @.BB0_7 +; CHECK: .cell @.BB0_4 diff --git a/llvm/test/MC/EraVM/encoding/jump-table.ll b/llvm/test/MC/EraVM/encoding/jump-table.ll index 49cbbca38e48..3f2529f45a47 100644 --- a/llvm/test/MC/EraVM/encoding/jump-table.ll +++ b/llvm/test/MC/EraVM/encoding/jump-table.ll @@ -1,6 +1,9 @@ ; RUN: llc < %s | FileCheck %s ; RUN: llc -filetype=obj -o %t.o < %s ; RUN: llvm-readelf --sections --relocs --syms %t.o | FileCheck --check-prefix=ELF %s +; RUN: llc -filetype=asm -o %t.s < %s +; RUN: llvm-mc -arch=eravm -filetype=obj -o %t2.o < %t.s +; RUN: llvm-readelf --sections --relocs --syms %t2.o | FileCheck --check-prefix=ASM-ELF %s target datalayout = "E-p:256:256-i256:256:256-S32-a:256:256" target triple = "eravm" @@ -55,6 +58,14 @@ default: ; ELF-NEXT: 0000005e 00000202 R_ERAVM_16_SCALE_8 00000000 .text + 50 ; ELF-NEXT: 0000007e 00000202 R_ERAVM_16_SCALE_8 00000000 .text + 60 +; JTI0_0 is filled by R_ERAVM_16_SCALE_8 relocations +; ASM-ELF: Relocation section '.rela.rodata' at offset {{0x[0-9a-f]+}} contains 4 entries: +; ASM-ELF-NEXT: Offset Info Type Sym. Value Symbol's Name + Addend +; ASM-ELF-NEXT: 0000001e 00000202 R_ERAVM_16_SCALE_8 00000000 .text + 20 +; ASM-ELF-NEXT: 0000003e 00000202 R_ERAVM_16_SCALE_8 00000000 .text + 40 +; ASM-ELF-NEXT: 0000005e 00000202 R_ERAVM_16_SCALE_8 00000000 .text + 50 +; ASM-ELF-NEXT: 0000007e 00000202 R_ERAVM_16_SCALE_8 00000000 .text + 60 + ; JTI0_0 starts at zero offset inside .rodata, as expected by the above checks ; ELF: Symbol table '.symtab' contains {{[0-9]+}} entries: ; ELF: Num: Value Size Type Bind Vis Ndx Name