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Update SPI host #129

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@rivos-eblot

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@rivos-eblot

Update SPI host implementation to support V3 features:

  • single CONFIGOPTS register
  • larger transfert width and refactored COMMAND register
  • SPI event signalling (from edge to level) and INTR_STATE behavior
  • initial TX issue has been fixed

Check:

  • STATUS.active management?
  • TXFIFO length? (HW discrepancy in reported depth was not emulated in QEMU, so likely no change to support)

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