Closed
Description
Update SPI host implementation to support V3 features:
- single
CONFIGOPTS
register - larger transfert width and refactored
COMMAND
register - SPI event signalling (from edge to level) and
INTR_STATE
behavior - initial TX issue has been fixed
Check:
STATUS.active
management?- TXFIFO length? (HW discrepancy in reported depth was not emulated in QEMU, so likely no change to support)