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arichardsonarichardson
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Regenerate test checks for tests affected by D141060
1 parent 83c4227 commit e86d6a4

20 files changed

+518
-392
lines changed

‎llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll

+14-11
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals --version 3
12
; RUN: llc -march=amdgcn -mcpu=gfx900 -O3 --amdgpu-lower-module-lds-strategy=module < %s | FileCheck -check-prefix=GCN %s
23
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
34
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
@@ -31,19 +32,20 @@ define protected amdgpu_kernel void @test(ptr addrspace(1) nocapture %ptr.coerce
3132
; GCN-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[2:3]
3233
; GCN-NEXT: global_store_byte v0, v1, s[0:1]
3334
; GCN-NEXT: s_endpgm
34-
; CHECK-LABEL: @test(
35+
; CHECK-LABEL: define protected amdgpu_kernel void @test(
36+
; CHECK-SAME: ptr addrspace(1) nocapture [[PTR_COERCE:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
3537
; CHECK-NEXT: entry:
3638
; CHECK-NEXT: store i8 3, ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, align 4, !alias.scope !1, !noalias !4
37-
; CHECK-NEXT: tail call void @llvm.memcpy.p3.p3.i64(ptr addrspace(3) noundef align 1 dereferenceable(3) getelementptr inbounds (%llvm.amdgcn.kernel.test.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, i32 0, i32 2), ptr addrspace(3) noundef align 1 dereferenceable(3) @llvm.amdgcn.kernel.test.lds, i64 3, i1 false), !alias.scope !6, !noalias !7
38-
; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr addrspace(3) getelementptr inbounds (%llvm.amdgcn.kernel.test.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, i32 0, i32 2), align 4, !alias.scope !4, !noalias !1
39-
; CHECK-NEXT: [[CMP_I_I:%.*]] = icmp eq i8 [[TMP4]], 3
39+
; CHECK-NEXT: tail call void @llvm.memcpy.p3.p3.i64(ptr addrspace(3) noundef align 1 dereferenceable(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_TEST_LDS_T:%.*]], ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, i32 0, i32 2), ptr addrspace(3) noundef align 1 dereferenceable(3) @llvm.amdgcn.kernel.test.lds, i64 3, i1 false), !alias.scope !6, !noalias !7
40+
; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr addrspace(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_TEST_LDS_T]], ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, i32 0, i32 2), align 4, !alias.scope !4, !noalias !1
41+
; CHECK-NEXT: [[CMP_I_I:%.*]] = icmp eq i8 [[TMP0]], 3
4042
; CHECK-NEXT: store i8 2, ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, align 4, !alias.scope !1, !noalias !4
41-
; CHECK-NEXT: tail call void @llvm.memcpy.p3.p3.i64(ptr addrspace(3) noundef align 1 dereferenceable(3) getelementptr inbounds (%llvm.amdgcn.kernel.test.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, i32 0, i32 2), ptr addrspace(3) noundef align 1 dereferenceable(3) @llvm.amdgcn.kernel.test.lds, i64 3, i1 false), !alias.scope !6, !noalias !7
42-
; CHECK-NEXT: [[TMP9:%.*]] = load i8, ptr addrspace(3) getelementptr inbounds (%llvm.amdgcn.kernel.test.lds.t, ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, i32 0, i32 2), align 4, !alias.scope !4, !noalias !1
43-
; CHECK-NEXT: [[CMP_I_I19:%.*]] = icmp eq i8 [[TMP9]], 2
44-
; CHECK-NEXT: [[TMP10:%.*]] = and i1 [[CMP_I_I19]], [[CMP_I_I]]
45-
; CHECK-NEXT: [[FROMBOOL8:%.*]] = zext i1 [[TMP10]] to i8
46-
; CHECK-NEXT: store i8 [[FROMBOOL8]], ptr addrspace(1) [[PTR_COERCE:%.*]], align 1
43+
; CHECK-NEXT: tail call void @llvm.memcpy.p3.p3.i64(ptr addrspace(3) noundef align 1 dereferenceable(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_TEST_LDS_T]], ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, i32 0, i32 2), ptr addrspace(3) noundef align 1 dereferenceable(3) @llvm.amdgcn.kernel.test.lds, i64 3, i1 false), !alias.scope !6, !noalias !7
44+
; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr addrspace(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_TEST_LDS_T]], ptr addrspace(3) @llvm.amdgcn.kernel.test.lds, i32 0, i32 2), align 4, !alias.scope !4, !noalias !1
45+
; CHECK-NEXT: [[CMP_I_I19:%.*]] = icmp eq i8 [[TMP1]], 2
46+
; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[CMP_I_I19]], [[CMP_I_I]]
47+
; CHECK-NEXT: [[FROMBOOL8:%.*]] = zext i1 [[TMP2]] to i8
48+
; CHECK-NEXT: store i8 [[FROMBOOL8]], ptr addrspace(1) [[PTR_COERCE]], align 1
4749
; CHECK-NEXT: ret void
4850
;
4951
entry:
@@ -64,7 +66,8 @@ entry:
6466
declare void @llvm.memcpy.p3.p3.i64(ptr addrspace(3) noalias nocapture writeonly, ptr addrspace(3) noalias nocapture readonly, i64, i1 immarg) #1
6567

6668
;.
67-
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
69+
; CHECK: attributes #[[ATTR0]] = { "amdgpu-lds-size"="7" }
70+
; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
6871
;.
6972
; CHECK: [[META0:![0-9]+]] = !{i64 0, i64 1}
7073
; CHECK: [[META1:![0-9]+]] = !{!2}

‎llvm/test/CodeGen/AMDGPU/lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll

+16-11
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
22
; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds < %s | FileCheck %s
33

44
; Not reached by a non-kernel function and therefore not changed by this pass
@@ -33,7 +33,7 @@
3333

3434

3535
define amdgpu_kernel void @kernel_only() {
36-
; CHECK-LABEL: @kernel_only() {
36+
; CHECK-LABEL: define amdgpu_kernel void @kernel_only() {
3737
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [0 x double], ptr addrspace(3) @dynamic_kernel_only, i32 0, i32 0
3838
; CHECK-NEXT: store double 3.140000e+00, ptr addrspace(3) [[ARRAYIDX]], align 8
3939
; CHECK-NEXT: ret void
@@ -45,7 +45,7 @@ define amdgpu_kernel void @kernel_only() {
4545

4646
; The accesses from functions are rewritten to go through the llvm.amdgcn.dynlds.offset.table
4747
define void @use_shared1() {
48-
; CHECK-LABEL: @use_shared1() {
48+
; CHECK-LABEL: define void @use_shared1() {
4949
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
5050
; CHECK-NEXT: [[DYNAMIC_SHARED1:%.*]] = getelementptr inbounds [5 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
5151
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[DYNAMIC_SHARED1]], align 4
@@ -60,7 +60,8 @@ define void @use_shared1() {
6060
}
6161

6262
define void @use_shared2() #0 {
63-
; CHECK-LABEL: @use_shared2() #0 {
63+
; CHECK-LABEL: define void @use_shared2(
64+
; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
6465
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
6566
; CHECK-NEXT: [[DYNAMIC_SHARED2:%.*]] = getelementptr inbounds [5 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
6667
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[DYNAMIC_SHARED2]], align 4
@@ -77,7 +78,8 @@ define void @use_shared2() #0 {
7778
; Include a normal variable so that the new variables aren't all at the same absolute_symbol
7879
@static_shared = addrspace(3) global i32 poison
7980
define void @use_shared4() #0 {
80-
; CHECK-LABEL: @use_shared4() #0 {
81+
; CHECK-LABEL: define void @use_shared4(
82+
; CHECK-SAME: ) #[[ATTR0]] {
8183
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
8284
; CHECK-NEXT: store i32 4, ptr addrspace(3) @llvm.amdgcn.module.lds, align 4
8385
; CHECK-NEXT: [[DYNAMIC_SHARED4:%.*]] = getelementptr inbounds [5 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
@@ -94,7 +96,8 @@ define void @use_shared4() #0 {
9496
}
9597

9698
define void @use_shared8() #0 {
97-
; CHECK-LABEL: @use_shared8() #0 {
99+
; CHECK-LABEL: define void @use_shared8(
100+
; CHECK-SAME: ) #[[ATTR0]] {
98101
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
99102
; CHECK-NEXT: [[DYNAMIC_SHARED8:%.*]] = getelementptr inbounds [5 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
100103
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[DYNAMIC_SHARED8]], align 4
@@ -110,7 +113,7 @@ define void @use_shared8() #0 {
110113

111114
; The kernels are annotated with kernel.id and llvm.donothing use of the corresponding variable
112115
define amdgpu_kernel void @expect_align1() {
113-
; CHECK-LABEL: @expect_align1() !llvm.amdgcn.lds.kernel.id !2
116+
; CHECK-LABEL: define amdgpu_kernel void @expect_align1() !llvm.amdgcn.lds.kernel.id !2 {
114117
; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_align1.dynlds) ]
115118
; CHECK-NEXT: call void @use_shared1()
116119
; CHECK-NEXT: ret void
@@ -120,7 +123,7 @@ define amdgpu_kernel void @expect_align1() {
120123
}
121124

122125
define amdgpu_kernel void @expect_align2() {
123-
; CHECK-LABEL: @expect_align2() !llvm.amdgcn.lds.kernel.id !3
126+
; CHECK-LABEL: define amdgpu_kernel void @expect_align2() !llvm.amdgcn.lds.kernel.id !3 {
124127
; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_align2.dynlds) ]
125128
; CHECK-NEXT: call void @use_shared2()
126129
; CHECK-NEXT: ret void
@@ -130,7 +133,8 @@ define amdgpu_kernel void @expect_align2() {
130133
}
131134

132135
define amdgpu_kernel void @expect_align4() {
133-
; CHECK-LABEL: @expect_align4() #1 !llvm.amdgcn.lds.kernel.id !4 {
136+
; CHECK-LABEL: define amdgpu_kernel void @expect_align4(
137+
; CHECK-SAME: ) #[[ATTR1:[0-9]+]] !llvm.amdgcn.lds.kernel.id !4 {
134138
; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_align4.dynlds) ]
135139
; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.module.lds) ]
136140
; CHECK-NEXT: call void @use_shared4()
@@ -142,7 +146,7 @@ define amdgpu_kernel void @expect_align4() {
142146

143147
; Use dynamic_shared directly too.
144148
define amdgpu_kernel void @expect_align8() {
145-
; CHECK-LABEL: @expect_align8() !llvm.amdgcn.lds.kernel.id !5 {
149+
; CHECK-LABEL: define amdgpu_kernel void @expect_align8() !llvm.amdgcn.lds.kernel.id !5 {
146150
; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_align8.dynlds) ]
147151
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [0 x i64], ptr addrspace(3) @dynamic_shared8, i32 0, i32 9
148152
; CHECK-NEXT: store i64 3, ptr addrspace(3) [[ARRAYIDX]], align 4
@@ -157,7 +161,8 @@ define amdgpu_kernel void @expect_align8() {
157161

158162
; Note: use_shared4 uses module.lds so this will allocate at offset 4
159163
define amdgpu_kernel void @expect_max_of_2_and_4() {
160-
; CHECK-LABEL: @expect_max_of_2_and_4() #1 !llvm.amdgcn.lds.kernel.id !6 {
164+
; CHECK-LABEL: define amdgpu_kernel void @expect_max_of_2_and_4(
165+
; CHECK-SAME: ) #[[ATTR1]] !llvm.amdgcn.lds.kernel.id !6 {
161166
; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.expect_max_of_2_and_4.dynlds) ]
162167
; CHECK-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.module.lds) ]
163168
; CHECK-NEXT: call void @use_shared2()

‎llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll

+16-11
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
12
; RUN: opt -S -mtriple=amdgcn--amdhsa -passes=amdgpu-lower-module-lds < %s --amdgpu-lower-module-lds-strategy=table | FileCheck -check-prefix=OPT %s
23
; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s --amdgpu-lower-module-lds-strategy=table | FileCheck -check-prefix=GCN %s
34

@@ -30,7 +31,7 @@
3031

3132

3233
define void @f0() {
33-
; OPT-LABEL: @f0(
34+
; OPT-LABEL: define void @f0() {
3435
; OPT-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
3536
; OPT-NEXT: [[V02:%.*]] = getelementptr inbounds [3 x [4 x i32]], ptr addrspace(4) @llvm.amdgcn.lds.offset.table, i32 0, i32 [[TMP1]], i32 0
3637
; OPT-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[V02]], align 4
@@ -71,7 +72,7 @@ define void @f0() {
7172
}
7273

7374
define void @f1() {
74-
; OPT-LABEL: @f1(
75+
; OPT-LABEL: define void @f1() {
7576
; OPT-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
7677
; OPT-NEXT: [[V12:%.*]] = getelementptr inbounds [3 x [4 x i32]], ptr addrspace(4) @llvm.amdgcn.lds.offset.table, i32 0, i32 [[TMP1]], i32 1
7778
; OPT-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[V12]], align 4
@@ -112,7 +113,7 @@ define void @f1() {
112113
}
113114

114115
define void @f2() {
115-
; OPT-LABEL: @f2(
116+
; OPT-LABEL: define void @f2() {
116117
; OPT-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
117118
; OPT-NEXT: [[V22:%.*]] = getelementptr inbounds [3 x [4 x i32]], ptr addrspace(4) @llvm.amdgcn.lds.offset.table, i32 0, i32 [[TMP1]], i32 2
118119
; OPT-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[V22]], align 4
@@ -153,7 +154,7 @@ define void @f2() {
153154
}
154155

155156
define void @f3() {
156-
; OPT-LABEL: @f3(
157+
; OPT-LABEL: define void @f3() {
157158
; OPT-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
158159
; OPT-NEXT: [[V32:%.*]] = getelementptr inbounds [3 x [4 x i32]], ptr addrspace(4) @llvm.amdgcn.lds.offset.table, i32 0, i32 [[TMP1]], i32 3
159160
; OPT-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[V32]], align 4
@@ -195,7 +196,8 @@ define void @f3() {
195196

196197
; Doesn't access any via a function, won't be in the lookup table
197198
define amdgpu_kernel void @kernel_no_table() {
198-
; OPT-LABEL: @kernel_no_table() #0 {
199+
; OPT-LABEL: define amdgpu_kernel void @kernel_no_table(
200+
; OPT-SAME: ) #[[ATTR0:[0-9]+]] {
199201
; OPT-NEXT: [[LD:%.*]] = load i64, ptr addrspace(3) @llvm.amdgcn.kernel.kernel_no_table.lds, align 8
200202
; OPT-NEXT: [[MUL:%.*]] = mul i64 [[LD]], 8
201203
; OPT-NEXT: store i64 [[MUL]], ptr addrspace(3) @llvm.amdgcn.kernel.kernel_no_table.lds, align 8
@@ -218,8 +220,9 @@ define amdgpu_kernel void @kernel_no_table() {
218220

219221
; Access two variables, will allocate those two
220222
define amdgpu_kernel void @k01() {
221-
; OPT-LABEL: @k01() #0 !llvm.amdgcn.lds.kernel.id !1 {
222-
; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k01.lds) ]
223+
; OPT-LABEL: define amdgpu_kernel void @k01(
224+
; OPT-SAME: ) #[[ATTR0]] !llvm.amdgcn.lds.kernel.id !1 {
225+
; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k01.lds) ], !alias.scope !2, !noalias !5
223226
; OPT-NEXT: call void @f0()
224227
; OPT-NEXT: call void @f1()
225228
; OPT-NEXT: ret void
@@ -256,8 +259,9 @@ define amdgpu_kernel void @k01() {
256259
}
257260

258261
define amdgpu_kernel void @k23() {
259-
; OPT-LABEL: @k23() #1 !llvm.amdgcn.lds.kernel.id !7 {
260-
; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k23.lds) ]
262+
; OPT-LABEL: define amdgpu_kernel void @k23(
263+
; OPT-SAME: ) #[[ATTR1:[0-9]+]] !llvm.amdgcn.lds.kernel.id !7 {
264+
; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k23.lds) ], !alias.scope !8, !noalias !11
261265
; OPT-NEXT: call void @f2()
262266
; OPT-NEXT: call void @f3()
263267
; OPT-NEXT: ret void
@@ -295,8 +299,9 @@ define amdgpu_kernel void @k23() {
295299

296300
; Access and allocate three variables
297301
define amdgpu_kernel void @k123() {
298-
; OPT-LABEL: @k123() #2 !llvm.amdgcn.lds.kernel.id !13 {
299-
; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k123.lds) ]
302+
; OPT-LABEL: define amdgpu_kernel void @k123(
303+
; OPT-SAME: ) #[[ATTR2:[0-9]+]] !llvm.amdgcn.lds.kernel.id !13 {
304+
; OPT-NEXT: call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernel.k123.lds) ], !alias.scope !14, !noalias !17
300305
; OPT-NEXT: call void @f1()
301306
; OPT-NEXT: [[LD:%.*]] = load i8, ptr addrspace(3) getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_K123_LDS_T:%.*]], ptr addrspace(3) @llvm.amdgcn.kernel.k123.lds, i32 0, i32 1), align 2, !alias.scope !20, !noalias !21
302307
; OPT-NEXT: [[MUL:%.*]] = mul i8 [[LD]], 8

‎llvm/test/Transforms/AtomicExpand/PowerPC/cmpxchg.ll

+18-18
Original file line numberDiff line numberDiff line change
@@ -14,35 +14,35 @@ define i1 @test_cmpxchg_seq_cst(ptr %addr, i128 %desire, i128 %new) {
1414
; CHECK-NEXT: [[TMP1:%.*]] = lshr i128 [[NEW]], 64
1515
; CHECK-NEXT: [[NEW_HI:%.*]] = trunc i128 [[TMP1]] to i64
1616
; CHECK-NEXT: call void @llvm.ppc.sync()
17-
; CHECK-NEXT: [[TMP3:%.*]] = call { i64, i64 } @llvm.ppc.cmpxchg.i128(ptr [[ADDR:%.*]], i64 [[CMP_LO]], i64 [[CMP_HI]], i64 [[NEW_LO]], i64 [[NEW_HI]])
17+
; CHECK-NEXT: [[TMP2:%.*]] = call { i64, i64 } @llvm.ppc.cmpxchg.i128(ptr [[ADDR:%.*]], i64 [[CMP_LO]], i64 [[CMP_HI]], i64 [[NEW_LO]], i64 [[NEW_HI]])
1818
; CHECK-NEXT: call void @llvm.ppc.lwsync()
19-
; CHECK-NEXT: [[LO:%.*]] = extractvalue { i64, i64 } [[TMP3]], 0
20-
; CHECK-NEXT: [[HI:%.*]] = extractvalue { i64, i64 } [[TMP3]], 1
19+
; CHECK-NEXT: [[LO:%.*]] = extractvalue { i64, i64 } [[TMP2]], 0
20+
; CHECK-NEXT: [[HI:%.*]] = extractvalue { i64, i64 } [[TMP2]], 1
2121
; CHECK-NEXT: [[LO64:%.*]] = zext i64 [[LO]] to i128
2222
; CHECK-NEXT: [[HI64:%.*]] = zext i64 [[HI]] to i128
23-
; CHECK-NEXT: [[TMP4:%.*]] = shl i128 [[HI64]], 64
24-
; CHECK-NEXT: [[VAL64:%.*]] = or i128 [[LO64]], [[TMP4]]
25-
; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i128, i1 } poison, i128 [[VAL64]], 0
23+
; CHECK-NEXT: [[TMP3:%.*]] = shl i128 [[HI64]], 64
24+
; CHECK-NEXT: [[VAL64:%.*]] = or i128 [[LO64]], [[TMP3]]
25+
; CHECK-NEXT: [[TMP4:%.*]] = insertvalue { i128, i1 } poison, i128 [[VAL64]], 0
2626
; CHECK-NEXT: [[SUCCESS:%.*]] = icmp eq i128 [[DESIRE]], [[VAL64]]
27-
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i128, i1 } [[TMP5]], i1 [[SUCCESS]], 1
28-
; CHECK-NEXT: [[SUCC:%.*]] = extractvalue { i128, i1 } [[TMP6]], 1
27+
; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { i128, i1 } [[TMP4]], i1 [[SUCCESS]], 1
28+
; CHECK-NEXT: [[SUCC:%.*]] = extractvalue { i128, i1 } [[TMP5]], 1
2929
; CHECK-NEXT: ret i1 [[SUCC]]
3030
;
3131
; PWR7-LABEL: @test_cmpxchg_seq_cst(
3232
; PWR7-NEXT: entry:
33+
; PWR7-NEXT: [[TMP0:%.*]] = alloca i128, align 8
34+
; PWR7-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP0]])
35+
; PWR7-NEXT: store i128 [[DESIRE:%.*]], ptr [[TMP0]], align 8
3336
; PWR7-NEXT: [[TMP1:%.*]] = alloca i128, align 8
3437
; PWR7-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP1]])
35-
; PWR7-NEXT: store i128 [[DESIRE:%.*]], ptr [[TMP1]], align 8
36-
; PWR7-NEXT: [[TMP3:%.*]] = alloca i128, align 8
37-
; PWR7-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP3]])
38-
; PWR7-NEXT: store i128 [[NEW:%.*]], ptr [[TMP3]], align 8
39-
; PWR7-NEXT: [[TMP5:%.*]] = call zeroext i1 @__atomic_compare_exchange(i64 16, ptr [[ADDR:%.*]], ptr [[TMP1]], ptr [[TMP3]], i32 5, i32 5)
40-
; PWR7-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP3]])
41-
; PWR7-NEXT: [[TMP6:%.*]] = load i128, ptr [[TMP1]], align 8
38+
; PWR7-NEXT: store i128 [[NEW:%.*]], ptr [[TMP1]], align 8
39+
; PWR7-NEXT: [[TMP2:%.*]] = call zeroext i1 @__atomic_compare_exchange(i64 16, ptr [[ADDR:%.*]], ptr [[TMP0]], ptr [[TMP1]], i32 5, i32 5)
4240
; PWR7-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP1]])
43-
; PWR7-NEXT: [[TMP7:%.*]] = insertvalue { i128, i1 } poison, i128 [[TMP6]], 0
44-
; PWR7-NEXT: [[TMP8:%.*]] = insertvalue { i128, i1 } [[TMP7]], i1 [[TMP5]], 1
45-
; PWR7-NEXT: [[SUCC:%.*]] = extractvalue { i128, i1 } [[TMP8]], 1
41+
; PWR7-NEXT: [[TMP3:%.*]] = load i128, ptr [[TMP0]], align 8
42+
; PWR7-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP0]])
43+
; PWR7-NEXT: [[TMP4:%.*]] = insertvalue { i128, i1 } poison, i128 [[TMP3]], 0
44+
; PWR7-NEXT: [[TMP5:%.*]] = insertvalue { i128, i1 } [[TMP4]], i1 [[TMP2]], 1
45+
; PWR7-NEXT: [[SUCC:%.*]] = extractvalue { i128, i1 } [[TMP5]], 1
4646
; PWR7-NEXT: ret i1 [[SUCC]]
4747
;
4848
entry:

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